JPS63202943A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the generation of cracks in a semiconductor chip due to the stepped section of the surface, and to improve quality and reliability by forming a bump with the flat surface. CONSTITUTION:A predetermined pattern electrode 3 consisting of a metal such as Al is shaped onto a semiconductor substrate 1 through an insulating film 2; an insulating film 4 for passivation coating the electrode 3 is formed; an opening section for connection is shaped to the upper section of the electrode 3; and metallic layers 5, 6 for adhesion and for preventing a diffusion composed of at least two layers coating the exposed surface of the electrode 3 are formed. A bump 7 with the flat surface is shaped by a photolithographic method with a plating solution, to which at least a surface active agent is added, and with ACs or pulse waveform applied currents. Accordingly, the deterioration of the quality and reliability of a semiconductor device due to the generation of cracks, etc. is prevented.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a semiconductor device.

[Conventional technology]

In a conventional semiconductor device, a protruding electrode (hereinafter referred to as a bump) formed on a pad electrode through a window of a passivation film has a structure as shown in FIG.

In this conventional example, Ae
A passivation film consisting of an insulating film 4 of about 0.5 μm thick and covering the periphery of the electrode 3 and having connection openings is formed. Then, diffusion prevention metals 5 and 6 are sequentially formed for bonding the bump 7'' and the electrode 3 and for preventing mutual diffusion between Af of the electrode 3 and gold as the bump metal. Bread 17 by electrolytic plating such as
After forming the metal layers 5 and 6, the metal layers 5 and 6 are removed using the pan 17 as a mask. The structure of this bump is generally in the shape of a mushroom, although it depends on the thickness of the photoresist film used in the photolithography method. However, the central part of the surface of this pan 17'' is recessed from the peripheral part due to a step equal to the thickness of the insulating film 4, and furthermore, this recess is smaller than the thickness of the insulating film 4 due to the throwing power of gold plating. It is normal for it to grow larger.

Here, the metal layers 5 and 6 for adhesion and diffusion prevention include two layers such as a Ti-Pd layer each having a thickness of about 1000 layers, and
A three-layer structure such as a Cr-Cu-Au layer may also be used.

[Problem that the invention seeks to solve]

In the conventional semiconductor device described above, the central part of the bump surface is recessed, so if you try to connect the leads by, for example, TAB type bulk bonding (hereinafter referred to as gigantic bonding), the pressure and heat during bonding will cause damage. The connection part of the bread 17'' to the lead 10 is deformed and crushed as shown in Figure 6, and the highest stress is applied to the high part around the bump and the deformation is the largest, and cracks occur from the part below. It has the disadvantage that the quality and reliability of semiconductor devices are significantly reduced due to the above reasons.

In order to prevent this, a conventional method has been considered to form bumps inside the step of the insulating film, but when etching the adhesive and diffusion prevention metal layer using the bumps as a mask, Since the surface of the electrode 3 may be exposed and exposed to the etching solution, there are many problems if left as is, and if we try to solve this problem, the manufacturing process will become extremely long due to the addition of a photolithography process, which will significantly reduce production efficiency. The disadvantage was that it decreased.

[Means for solving problems]

The method for manufacturing a semiconductor device of the present invention includes the step of forming a first conductive layer in a predetermined pattern on the surface of a semiconductor substrate via a first insulating film, and forming a second insulating film on the first conductive layer. a step of forming a connection window by opening a portion of the second insulating film on the first conductor layer; and at least two layers including an adhesion layer and a diffusion prevention layer that cover the window. and forming a protruding electrode on the second conductor layer using a plating solution containing at least a surfactant, the protruding electrode having a flat surface. .

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view of a semiconductor chip for explaining a first embodiment of a semiconductor device of the present invention.

In the semiconductor device according to this embodiment, an electrode 3 of a predetermined pattern made of, for example, Ae is formed on a semiconductor substrate 1 via an insulating film 2, and an insulating film 4 for passivation covering the electrode 3 is formed. A connecting hole was provided in the upper part, at least two adhesive and diffusion preventing metal layers 5 and 6 were formed to cover the exposed surface of the electrode 3, and a photolithography method and at least a surfactant were added. A bump 7 with a flat surface is formed by applying a plating solution and an applied current in an alternating current or pulsed waveform.Finally, a metal layer 8 is formed on the exposed surface of the bump 7 to improve bonding, and then photolithography is performed using the bump 7 as a mask. It is formed by removing the photoresist film used in the lithography method and the underlying metal layers 5 and 6.

Here, the metal layer 8 was formed on the surface of the bump 7 by using a plating solution containing a surfactant and an applied current in an alternating current or pulsed waveform.The bump 7 has a smooth, glossy surface and high hardness. This is because direct bonding is difficult, so bonding can be done well.

FIG. 2 is a sectional view of a semiconductor chip for explaining a second embodiment of the semiconductor device of the present invention.

In the semiconductor device according to this embodiment, an insulating film 2, an electrode 3, and an insulating film 4 for passivation are sequentially formed on a semiconductor substrate 1, as in the semiconductor device shown in FIG. ' and 6' are formed, and further a bump 7' with a flat surface is formed by the same method as in the first embodiment,
Metal layer 8a' for good boarding on the surface of the pan 17'
After sequentially forming metal layers 5' and 8b', portions other than predetermined portions of metal layers 5' and 6' are removed using pan 17' as a mask.

Here, the reason why the metal layer 8a' and 8b' on the surface of the pan 17' is made into two layers is to prevent mutual diffusion between the metal layer 8b' and the pan 77' due to heat treatment during bonding, etc. It is.

FIGS. 3A to 3C are cross-sectional views of a semiconductor chip shown in the order of steps for explaining an embodiment of the method for manufacturing a semiconductor device of the present invention.

In this embodiment, first, as shown in FIG. 3(a), a predetermined pattern, for example, A! After forming an electrode 3 consisting of a passivation insulating film 4 and providing an opening for connection thereto, an adhesive and diffusion prevention metal such as Cr-Cu or Ti-Pd is formed. layers 5 and 6 from 1000 to 200
Form to a thickness of 0 people. Here, the metal layers 5 and 6 are not necessarily limited to two layers, and may be two or more layers as long as they include a metal layer for adhesion and diffusion prevention.

Next, as shown in FIG. 3(b), a photoresist film 9 having a predetermined pattern having a window wider than the opening of the insulating film 4 is formed.

Next, as shown in FIG. 3(C), using the photoresist film 9 as a mask, the bumps 7 with flat surfaces are formed to a thickness of about 20 μm using a plating solution containing at least a surfactant or an applied current with an alternating current or pulse waveform. Form in thickness. here,
For example, in the case of copper plating, the plating solution is basically a copper plating solution containing copper sulfate and sulfuric acid, a surfactant such as polyoxyethylene-polyoxypropylene glycol, and 2-mercaptobenzothymazole. A compound containing a sulfur-containing compound such as 8-propanesulfonic acid or a nitrogen-containing compound is used.

FIG. 4 is a characteristic diagram showing the dependence of the step t on the bump surface on the amount of surfactant added.

This was done with a constant current density, and the amount of surfactant added was about 1.0 mM (millimol), so the bump surface was almost flat.

Finally, add 1 to improve bonding on the surface of bump 7.
After forming a metal layer 8 with a thickness of approximately μm, a photoresist film 9 is applied using the bump 7 as a mask. By sequentially removing metal layers 6 and 5, a first embodiment of the semiconductor device of the present invention can be obtained.

Therefore, in the present invention, for example, a two-layer structure with different plating conditions, in which the bump metal is made of shiny gold with a thickness of about 20 μm and the surface metal layer is matte, low-hardness gold, or the bump metal is copper, and the surface metal layer is made of copper. It becomes possible to create structures using solder or gold.

〔Effect of the invention〕

As explained above, the present invention prevents cracks in semiconductor chips due to surface steps by forming bumps with flat surfaces, greatly improves quality and reliability, and improves the quality and reliability of semiconductor chips by forming bumps with flat surfaces. By changing the gloss and hardness of the material, or by changing the material itself, it is possible to realize a bump structure that is flexible depending on the purpose, such as a bump that can be bonded well and is inexpensive.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIGS. 1 and 2 each show a first diagram of a semiconductor device of the present invention.
3(a) to 3(C) are cross-sectional views of a semiconductor chip for explaining a second embodiment, and FIGS. A cross-sectional view of the chip, FIG. 4 is a characteristic diagram showing the dependence on the amount of surfactant added on the step on the bump surface, and FIGS. 5 and 6 show an example of a conventional semiconductor device and an example of its use, respectively. FIG. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Insulating film, 3... Electrode,
4... Insulating film, 5.5', 6.6'... Metal layer,
7.7'. 7”--bump, 8.8a', 8b'-metal layer,
9... Photoresist film, 10... Lead, 11...
・Crack, t...step. Figure 3

Claims (1)

[Claims] a step of forming a first conductor layer in a predetermined pattern on the surface of a semiconductor substrate via a first insulating film; a step of forming a second insulating film on the first conductor layer; and a step of forming a second insulating film on the first conductor layer. a step of forming a connection window by opening a hole on the first conductor layer; a step of forming at least two second conductor layers, including one for adhesion and one for diffusion prevention, covering the window; and a step of forming a protruding electrode on the second conductor layer using a plating solution containing at least a surfactant, and forming the protruding electrode with a flat surface.