JPS6318866A - Facsimile equipment - Google Patents

Abstract

PURPOSE:To contrive to miniaturize an outer shape, to lower manufacturing cost and to attain general-use by forming a high density integrated circuit consisting of many functional circuits related to a picture signal processing to be used as a picture signal processing circuit, providing an external input terminal and an external output terminal at the external part of the circuit, and obtaining the constitution of the device capable of connecting other circuits. CONSTITUTION:A sample holding circuit 60, an AGC circuit 61, an A/D converter 62, a reading control gate array 63, a ROM 64 and a RAM 65 are formed into integrated circuit as one module and constituted a picture signal processing circuit 600. At both edges of the picture signal processing circuit 600, an external input terminal 601 and an external output terminal 602 are respectively provided. The picture signal processing circuit 600 is detachably connected to a signal line between a CCD 1 and a picture signal PIX bus by the external input terminal 601 and the external output terminal 602. For this reason, the number of parts is decreased, the considerable miniaturization of a control part 6 can be executed, the replacement for the picture signal processing circuit 600, other I/O for processing other picture signal, etc., can be connected by outside installation.

Description

Detailed Description of the Invention [Object of the Invention] (Industrial Application Field) The present invention provides a large number of functional circuits constituting an image signal processing section
The present invention relates to a facsimile machine equipped with a control section implemented as an LSI (very large scale integrated circuit).

(Prior Art) A general conventional facsimile machine is configured as shown in FIG. 2, and its main components include a CCD (charge coupled device) 1 for reading a document
, a thermal head 2 for recording an image on recording paper, a mechanical unit 3 consisting of a motor, a sensor, etc. for transporting a document or recording paper, and for detecting passage, and an NCU for controlling communication line connections, etc. (Network control unit) 4, an operation panel 5 consisting of operation buttons for commanding operations, a display for displaying command contents, etc., and a control section 6 for controlling the overall operation. .

Further, each of the control sections 6 has a configuration including a large number of functional circuits as shown in the figure, and controls the overall operation as described below.

First, when the facsimile machine is in the transmission mode, the original to be sent is read by the CCDI and converted into an analog image signal, and then the sample and hold circuit 60, AGC (auto
gain control) circuit 61, A/D (analog/
The image signal is converted into a digital image signal via a digital) converter 62.

This digital image signal is then sent to the read control gate array 6.
3, ROM (read only memory) 64, RA
After being subjected to processing such as shading correction of a light source for reading scanning, such as a fluorescent lamp, in a reading control section consisting of a random access memory (M) 65, the signal is output to a PIX (picture signal) bus.

Here, the PIX bus is used by the CPU to handle image signals at high speed.
(Central Fist Processing ◆Unit) This unit is provided separately from the bus, and the CPU bus includes multiple image signals I10 (input/output) such as the inter-bus interface circuit 66 and the compression/expansion LSI 67.
connected through a circuit.

In the transmission mode as described above, the digital image signal output from the reading control unit to the PIX bus is input from the PIX bus to the compression/expansion LSI 67 of the image signal 110 circuits, and is subjected to redundant compression processing. After being converted into a code signal, it is output to the CPU bus.

The code signal thus output to the CPU bus is -danR
The code is input to the modem section consisting of the modem gate array 70 and the modem LSI 71 via the code buffer of the AM79, and is subjected to modulation processing suitable for the communication line. It is sent out to the communication line.

On the other hand, when the facsimile machine is in the reception mode, the incoming signal from the communication line is inputted to the modem unit mentioned above via the NCU 4 and the filter 72, and is demodulated by the modem LSI 71 and the modem gate array 70. After being extracted as a code signal, the CPU
The code is temporarily stored in the code buffer of RAM 79 via the bus.

This code signal is then sent from the RAM 79 to the compression/expansion LSI 67 via the CPU bus, converted into a raw image signal by expansion processing, and then further input to the recording control circuit 68 via the PIX bus.

Then, the recording control circuit 68 selectively drives the heating resistor of the thermal head 2 based on the image signal to record an image similar to that of the original on, for example, thermal recording paper.

Incidentally, this recording control circuit 68 also controls recording density and the like in accordance with the above-mentioned image recording.

As for other components, first, a PIO (parallel I10) 69 is provided as a control section of the mechanical section 3.

Here, in the above-mentioned transmission/reception mode, P4O10 performs driving control of motors corresponding to each of the originals and thermal recording paper in accordance with the original sending operation and receiving operation, and controls passage detection sensors, etc. Various operations are controlled based on the outputs of various detectors.

Further, the PI 073 is provided to perform display control on the display on the operation panel based on the transmission/reception mode selection operation, operation start operation, etc. by the operation panel 5.

The image signal processing in the transmission/reception mode described above and the operation control according to P1069.73 are performed by the CPU, respectively.
This is executed by software processing between the CPU 74, DMA (direct memory access) controller 75, interrupt controller 76, timer 77, and mask ROM 78 connected to the bus.

By the way, as a recent technological trend, there has been an increasing demand for smaller devices, and facsimile machines are no exception, and some attempts have already been made to address this type of demand. It's here.

For example, in the control unit 6, various functional circuits centered on the CPU 74 are generally constructed of general-purpose LSIs, SS (small scale integrated circuits), and MSIs (medium scale integrated circuits). In order to achieve as much miniaturization as possible by customizing SSISMSI class ICs as gate arrays, such as the control gate array 63 and modem gate array 7o, and by fully customizing them, such as the compression expansion LSI 67 and modem LSI 71. efforts have been made.

As is well known, with general integration technology, customization or full customization is only possible if the original circuit is SSI or MSI.
In particular, in the case of full customization, further integration was difficult due to the enormous development cost and development period.

However, recently, as VLSI technology has been put into practical use and it has become possible to integrate at even higher density, for example, C
A new idea is emerging to integrate the so-called image signal processing section for processing the output of the CDI to obtain an image signal at a high density and further downsizing it.

As is clear from FIG. 2, the image signal processing section includes a sample hold circuit 60, an SAGC circuit 61, an A/D
Converter 62, read control gate array 63, ROM6
4. It consists of 65 RAM, which has many component parts and has to be large, but it also has many connection pins, which makes the connection process complicated and increases the manufacturing cost. It is a place where you can

However, in conventional facsimile machines of this type, when the image signal processing section in the control section 6 is highly integrated using VLSI technology based on the 114th concept, the image signal processing function is fixed. For example, it cannot easily handle high-speed image signal processing by a high-speed machine such as a 64-speed machine, making it less versatile. The problem was that it could not be achieved.

(Problems to be Solved by the Invention) As described above, in the conventional facsimile machine described above, due to the functional limitation that it does not have versatility for high-speed image signal processing, etc., The reality is that it has not been possible to achieve miniaturization.

The present invention has been made in view of the above circumstances, and
It is an object of the present invention to provide a facsimile device which can be made smaller and less expensive by integrating an image signal processing section in a control section using integrated technology, and which is also highly versatile.

[Structure of the Invention (Means for Solving Problems)] The facsimile apparatus of the present invention processes the output of the image reading means and includes a large number of functional circuits for image signal processing to obtain an image signal corresponding to the read image. In addition to high-density integration as a circuit, the image signal processing circuit is placed outside the image signal processing circuit.
The control section is provided with an external input terminal and an external output terminal for removably connecting to the signal line between the image reading means and the side bar signal bus.

(Function) In the facsimile apparatus of the present invention, even if the image signal processing circuit is configured by converting each functional circuit related to image signal processing in the control section into a VLSI, the image signal processing circuit is connected to the external input terminal and the external input terminal. The output terminal can be used to exchange and connect with other circuits with different functions, or to connect other circuits with different functions as an option, thereby ensuring versatility for high-speed image signal processing, etc. Become.

(Example) Hereinafter, an example of the present invention will be described in detail based on the accompanying drawings.

FIG. 1 is a block diagram showing an embodiment of a facsimile device according to the present invention, and parts that perform the same functions as those of the conventional facsimile device shown in FIG. 2 are designated by the same reference numerals. There is.

In the facsimile machine of the present invention, the sample bold circuit 60. An AGC circuit 61, an A/D converter 62, a read control gate array 63, a ROM 64, and a RAM 65 are integrated as one module to constitute an image signal processing circuit 600.

Here, we briefly touch on integration technologies using the standard cell system and mega cell system, which have recently been attracting particular attention.

First, the standard cell method is a technology in which SSI and MSI class macro cells are registered in a computer as a library, and an LSI is designed by combining these macro cell libraries.

The mega cell method is an evolution of the standard cell method, in which LSI class macro cells are registered in the computer as libraries, and VLS
It is a technology for designing I.

The above-described image signal processing circuit 600 includes, for example, a sample and hold circuit 60 made up of an analog switch or a FET (field effect transistor), an AGC circuit 61 made up of an operational amplifier, a transistor, etc., an A/D converter 62, a read control gate array 63, ROM64, R.A.
V using M65 and 3 mega cell type integration technology
It is constructed by converting it into an LSI.

When converting these discrete analog circuits, gate arrays, ROM% RAM, etc. into VLSI, external input terminals 601 and external output terminals 602 are provided at both ends of the image signal processing circuit 600, respectively.

In FIG. 1, the image signal processing circuit 600 is removably connected to the signal line between the CCDI and the PIX bus through the external input terminal 60'l and the external output terminal 602 described above.

In the image signal processing circuit 600 having such a configuration, CC
The image signal read by the DI is input to the sample and hold circuit 60 via an external input terminal 601 and sampled and held at the clock cycle given from the read control gate array 63.

Next, the image signal sampled and held by the sample and hold circuit 60 is controlled to match the signal level to the peak value by the AGC circuit 61, and then the A/D
The converter 62 converts the analog signal into a digital signal.

Further, the read control gate array 63 includes an A/D converter 6
Processing such as processing correction is performed on the digital signal output from 2, and the processed digital signal is output to the PIX bus via an external output terminal 602.

In the processing of the read control gate array 63, the ROM
64 and RAM 65 are each shading/A
It is used for GC correction and shading/ACC (auto contrast control) correction.

The read control gate array 63 also performs CCDI drive control in addition to the control described above.

The image signal processing circuit 60 uses analog circuits, gate arrays, ROM, RAM, etc.
As a result of integration as a single module with zero, the number of parts is reduced and the control unit 6 can be significantly miniaturized.

Furthermore, since the number of connection pins is also reduced, connection processing becomes easier and manufacturing costs can be expected to be reduced.

Furthermore, in the present invention, since the image signal processing circuit 600 is provided with an external input terminal 601 and an external output terminal 602, it is possible to replace each image signal processing circuit 600 or to replace the Il for other image signal processing.
For example, by selectively using a device suitable for high-speed image signal processing, it becomes possible to easily make it compatible with high-end machines such as the 04 model.

[Effects of the Invention] As explained above, according to the facsimile apparatus of the present invention, a large number of functional circuits related to image signal processing are integrated at high density as an image signal processing circuit, and an external device is connected to the outside of the image signal processing circuit. By providing an input terminal and an external output terminal, the image signal processing circuit can be replaced and other circuits can be optionally connected, resulting in a significant reduction in the external shape by reducing the number of parts and connection pins. This method has excellent advantages in that it is possible to reduce manufacturing costs and to construct a highly versatile device that can also handle high-speed image signal processing.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a facsimile device according to the present invention, and FIG. 2 is a block diagram showing an example of the configuration of a conventional facsimile device. 1... CCD, 2... Thermal head, 3... Mechanical section, 4... NCU, 5... Operation panel, 6...
-Control unit 600...image signal processing circuit, 601...external input terminal, 602...external output terminal.

Claims (1)

[Claims] A plurality of functional circuits for processing the output of the image reading means and obtaining an image signal corresponding to the read image are highly integrated as an image signal processing circuit, and the image signal processing circuit is provided externally to the image signal processing circuit. A facsimile apparatus comprising: a control section provided with an external input terminal and an external output terminal for removably connecting a circuit to a signal line between the image reading means and the image signal bus.