JPS6316472A - Reproducing device - Google Patents

Abstract

PURPOSE:To delete return components produced between fs/4 (fs: sampling frequency) and fs/2 and to improve the sound quality by switching the cut-off frequency of a digital filter to a frequency fs/4 when the number of errors occurring every second data word exceed the prescribed value. CONSTITUTION:When the errors occurring every second data word exceed a prescribed value, i.e., in a normal reproduction mode, data on either one of two tracks A and B drops out due to a head clock or a burst error, etc. When the quantity of data to be dropped out exceeds a prescribed level, the variable speed reproduction is performed to reproduce only one of both tracks A and B. In such a variable speed reproduction mode, a digital filter 4 having a cutoff frequency fs/2 is switched to a digital filter 11 of a cutoff frequency fs/4. Thus the return components produced between frequencies fs/4 and fs/2 are deleted and the sound quality is improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a playback device suitable for use in, for example, a digital audio tape recorder.

[Summary of the invention]

The present invention provides a reproducing apparatus that supplies reproduced data from a recording medium to a digital filter that performs error correction and oversampling, converts the output of this digital filter into D/AI, and extracts it through a low-pass filter. When the number of errors in a word exceeds a predetermined value, the cutoff frequency of the digital filter is set to Is/
4 (fs- is the sampling frequency), aliasing components occurring between fs/4 and fs/2 are removed and the sound quality is improved.

[Conventional technology]

As a conventional playback device, one shown in FIG. 6, for example, has been proposed. fl) is an input terminal to which reproduced data from a recording medium (not shown) is supplied, and the reproduced data from this input terminal (1) is error-corrected by an error correction circuit (2). Then, the error data that cannot be corrected by the error correction circuit (2) is subjected to average value interpolation by the average value interpolation circuit (3), and is oversampled by a digital filter (4) having a cutoff frequency of fs/2, for example. .

The output of the digital filter (4) is the D/A converter (5)
The digital signal is converted into an analog signal, harmonic components are removed by a low-pass filter (6), and the signal is output to an output terminal (7).

Figure 7 shows the digital filter (41, 0/A converter (
5) and a low-pass filter (6), the digital filter (4) is given data at a sampling rate fs as shown in FIG. 7A. s(, in FIG. 7A is the spectrum of the same frequency band as the transmitted analog information, 31.52... is the spectrum distribution added by sampling, fs, 2rs, 3fs...
The distribution appears to be folded back at ・. Digital filters also have similar folding characteristics. Therefore, it is impossible in principle to leave only the spectrum So of the original signal and suppress the other spectra S1, S2, etc. using a digital filter. Therefore, in order to extract only SQ, an analog low-pass filter with steep attenuation characteristics is generally required after D/A conversion.

Therefore, in the digital filter (4), first, oversampling processing is performed to shift the data sampling rate to yrS. For example, if y is 2, this is a task of interpolating data O every other sample data, and as a result, the sampling rate is as shown in Figure 7B.
It is shifted to 2rs as follows. Note that data O is invalid (undefined) data, and the spectral distribution of the transmission signal does not change due to this oversampling, and the spectral distribution SQ is the same as in FIG. 7A.
, 51, . . . are saved.

Next, in the digital filter (4), filtering processing is performed to suppress the shaded area in FIG. 7B. The hardware may be, for example, an FIR type digital filter as shown in FIG.
8-2) (E13)... (8-N) and a multiplier (9-1) (9-2) (9 -3) ... (9
-'N) and an adder (10) that adds the outputs of each multiplication. Delay unit (8-1) (8-
2) ... (8-N) is shift register, RAM
etc., and its operating clock is y times fs (2fs in this example).

This digital filter (4) suppresses the shaded area in FIG. 7B, and extracts a signal with a spectrum distribution shown by the solid line in FIG. 7C. The attenuation characteristic of the filter is rs
appears symmetrically with respect to the original signal spectrum s(,
The aliasing component corresponding to 2 fs remains in the lower sideband of 2 fs. The filter output is supplied to the D/A converter (5), and D/A conversion is performed at a rate of 2fs based on the clock yfs (2fs). The output of the D/A converter (5) is supplied to a low-pass filter (6) with the characteristics shown in Figure 7, and the necessary spectral wideband s shown in Figure 7E is extracted, and harmonic components are suppressed. be done.

As shown in Figure 7, the low-pass filter (6) has a roll-off frequency above the upper limit f s / 2 of the band of the original signal, and a band above 2 fs-□ in which aliasing components of the original signal remain is sufficient. The attenuation slope may be gentle enough to obtain a suitable amount of attenuation. Therefore, the necessary characteristics can be obtained with an analog filter having a very simple configuration.

[Problem that the invention seeks to solve]

By the way, in a playback device such as a digital audio tape recorder using a rotary head, even data and odd data are alternately inked on the A track by scanning with one rotary head and the B trunk by scanning with the other rotary head. The two tracks form one piece of data information. Therefore, at the time of head clog, burst error, or variable speed reproduction, only half of the data may be usable for reproduction. In such a case, the average value interpolation circuit (3) performs average value interpolation to generate apparently missing data.

However, for example, during variable speed playback, the digital filter (4
), the frequency spectrum of the data supplied to As shown, folding components appear,
There is an inconvenience that the sound quality deteriorates.

The present invention has been made in view of the above, and an object thereof is to provide a playback device that can improve sound quality by removing aliasing components.

[Means for solving problems]

The reproducing apparatus according to the present invention supplies reproduced data from a recording medium to a digital filter that performs error correction and oversampling, and converts the output of this digital filter into a D/
In a playback device that performs A conversion and extracts data through a low-pass filter, the cutoff frequency of the digital filter is set to fs/4 (fs is the sampling frequency) when every other data word has more than a predetermined number of errors. It consists of

[Effect]

When the number of errors in every other data word exceeds a predetermined value, that is, during normal playback, data in one track of A track or B) rack is missing due to head clog or burst error, and the amount of data is reduced. When the value exceeds a predetermined value, and variable speed playback only plays one track out of the A track and B) rack, and the other track is not played, when such variable speed playback occurs, the cutoff frequency is set. The state in which a digital filter with a cutoff frequency of fs/2 is used is changed to the state in which a digital filter with a cutoff frequency of fs/4 is used. As a result, aliasing components occurring between fs/4 and fs/2 are removed, improving sound quality.

〔Example〕

Hereinafter, one embodiment of the present invention will be described in detail based on FIGS. 1 to 5.

FIG. 1 shows the circuit configuration of this embodiment. In the figure, parts corresponding to those in FIG. 6 are denoted by the same reference numerals, and detailed explanation thereof will be omitted.

In this embodiment, a digital filter (11) with a cutoff frequency of fs/4 is used.
It is provided in parallel with a digital filter (4) having a filter of s/2. In addition, these digital filters (11) and (4)
) have cutoff frequencies of f s / 4 and s /
The coefficients of the multiplier (not shown) are set in advance so that the number is 2. (12) is a digital filter (
4) and (11), and during normal reproduction, if the error data of each track is not above a predetermined value, it is connected to the contact a side, and when it is above the predetermined value, it is switched to the contact side. Also, during variable speed playback, it remains connected to the contact side.

The switch (13) is connected to the contact A side when the data from the average value interpolation circuit (3) is true data without any interpolation, and is switched to the contact A side when the data is interpolated data.
Instead of the interpolated data, "0" data is given to the digital filter (11).

A determination circuit (14) is provided for switching the switches (12) and (13). A part of the output of the error correction circuit (2) is supplied to the 0 determination circuit (14), and the normal reproduction mode and variable speed reproduction are also supplied. A mode switching signal is provided for switching the mode. The determination circuit (14) operates according to the flowchart shown in FIG. Step (
The operation starts in step (b), and in step (b) it is determined whether the mode switching signal is the variable speed playback mode signal, and if so, the process proceeds to step (c), where the switch (12) is switched to the contact side and the switch is switched. (13) If the data from the average value interpolation circuit (3) is true data without any interpolation, contact a
Connect to the side and feed the true data as it is to the digital filter (11), and if it is interpolated data, switch (11)
3) to the contact side and replace the interpolated data with “O”.
``'' data is given to the digital filter (11).

Note that the determination circuit (14) determines whether the data from the average value interpolation circuit (3) is interpolated data or not because a flag is set at the output of the error correction circuit (2) when interpolation is necessary. It can be determined by detecting this.

Further, in step (b), if it is not a variable speed reproduction mode signal, it is treated as a normal reproduction mode signal, and in step (d), the number of errors in data reproduced from each track is counted. If the number of errors counted in step (claw) is greater than or equal to the predetermined value TI, proceed to step (go), and similarly to step (c), switch (12) is switched to the contact side and switch (13) is set to the average value. Interpolation circuit (
3) Switch according to the content of the data. Step (
If the number of errors counted in step (d) is not greater than the predetermined value Th, the switch (12) is connected to the contact a side, and the data from the average value interpolation circuit (3) is supplied to the digital filter (4).

Figure 4 shows the input/output state of the digital filter (4) when the switch (12) is switched to the contact a side. Impulse responses sampled at T/4 intervals are input as coefficients, and during normal playback, these coefficients are read out every other coefficient. Therefore, in FIG. 4, for example, every other coefficient among coefficients a4 to a6 is a4. a-Shizuku+ a-2+ aQ 1a 2 + a 4 +
The coefficients of only a s are read and multiplied by the input data. That is, when a data signal is input to the first delay device (not shown) of the digital filter (4) at time t=Q, each data 0. L2,0. L
3. O, L4 are input manually, and by multiplying each of these data by the corresponding coefficient, the result is Ll ・a-s+
L2 ・a-2+L3 ・a2+L4 ・a6 is output L
o1 to the output side of an adder (not shown). When data 0 is input to the first delay device of the digital filter (4) at time t=1, each data Ll, 0 . L2,0. Ll, 0 is input,
By multiplying each of these data by the corresponding coefficient, the result is Ll ・a−<+L2 ・aQ+L3 ・a
4 is taken out to the output side of the adder as output LO2.

When data Lo is input to the first delay device of the digital filter (4) at time t=T, each data, O, L1+o, is input to the subsequent delay devices.

L2.0. Ll is input, and the result is obtained by multiplying each of these data by the corresponding coefficient.

'a-e+Lx °a -2+ L 2 8a 2
+L3°a6 is taken out as output LO3 to the output side of the adder.

Note that the delay time of each delay device is T/2.

Therefore, in this case, while the input side has a sampling frequency of fS, the output side has a sampling frequency of 2fs, which means that twice oversampling has been performed.

Also, Figure 5 shows the digital filter (11) during variable speed playback when the switch (12) is switched to the contact side.
Indicates the input/output status of In this case as well, impulse responses sampled at regular T/4 intervals are input to the ROM of the digital filter (11) as coefficients, and are read out continuously and in order. Therefore, in FIG. 5, for example, coefficients a-4 to a are read out in order and multiplied by the input data.

That is, at time t=Q, the digital filter (11
) When data L1 is input to the first delay device (not shown), subsequent delay devices receive each data 0°0 (L2 was interpolated data, so it was set to “0”), O ,Ll,
O, O (L4 was interpolated data, so "O" was set), 0. Ls is input, and by multiplying each of these data by the corresponding coefficient, the result is Ll ・a
-4+ L 3 ・ao+Ls ・a4 is output Lo
t to the output side of an adder (not shown).

When data 0 is input to the first delay device of the digital filter (11) at time t=-, each data L1.0.0 (L2 is interpolated data, so “θ ' was set), 0.Ll, 0.O (L4 was interpolated data, so "0" was set).

0 is input, and by multiplying each of these data by the corresponding coefficient, L□.a-3→L3.a is taken out as the output LO2 to the output side of the adder. At time t=T, data O (Lo is interpolated data, so "0" is input to the first delay device of the digital filter (11).
”) is input, each data 0.L1.0゜0 (L2 was interpolated data, so “0” was set), O, Ll, O is input to the subsequent delay device. , O (L4 was interpolated data, so "0" was set) are input, and the result is obtained by multiplying each of these data by the corresponding coefficient, so that ・a −2+ L 3 ・a2 The output LO3 is taken out to the output side of the adder.The same process is carried out at times t=-T and 2T, and the outputs LO41LO5 are taken out to the output side of the adder.In this case as well, the output of each delay device is taken out. The delay time is T/2.

Therefore, in this case, while the input side has a sampling frequency of f s /2, the output side has a sampling frequency of 2rS, which means that oversampling has been performed by a factor of 4.

At this time, the digital filter (11) has the characteristics shown in Figure 2B, and the harmonic components centered around 2fs are suppressed by the low-pass filter (6), and the output terminal (7) is f s / 4 ~ indicated by diagonal lines in Fig. 2C
f s / which does not include the aliasing component between f s / 2
Data having only components of 4 or less is output, improving sound quality.

In addition, in the practical example described above, two digital filters with cutoff frequencies of f s / 2 and f S / 4 are respectively provided, but both can be used by simply reading every other coefficient from the ROM. Since the difference is whether the data are read out continuously or sequentially, it is also possible to use a single digital filter by considering the readout timing.

〔Effect of the invention〕

As described above, according to the present invention, the cutoff frequency of the digital filter is switched to fs/4 when the number of errors in every other data word exceeds a predetermined value. / It is possible to remove the folding component that occurs between the two, thereby improving the sound quality.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIGS. 2 to 5 are diagrams for explaining the operation of the present invention, FIG. 6 is a block diagram showing an example of a conventional device, and FIG. The figure is an explanatory diagram of its operation, and FIG. 8 is a block diagram of a conventional FIR type digital filter. (2) is an error correction circuit, (3) is an average value interpolation circuit, (4
). (11) is a digital filter, (5) is a D/A converter, (6) is a low-pass filter, (12), (13)
) is a switch, and (14) is a determination circuit.

Claims (1)

[Scope of Claims] A playback device that supplies playback data from a recording medium to a digital filter that corrects errors and performs oversampling, converts the output of the digital filter from digital to analog, and takes it out through a low-pass filter, comprising: When the number of errors in data words exceeds a predetermined value, the cutoff frequency of the digital filter is set to f.
A playback device characterized by having a sampling frequency of _s/4 (f_s is a sampling frequency).