JPS63136673A - Manufacture of thin film semiconductor device - Google Patents

Abstract

PURPOSE:To control a threshold voltage of a TFT and to prevent a decrease of breakdown strength of a gate voltage by making a gate insulating film thin so that it may not exceed 500Angstrom , thereby providing the third semiconductor film on the gate insulating film. CONSTITUTION:A glass substrate where, for example, a process at a temperature of 550 deg.C is available is used an insulating substrate 1. At the first semiconductor film 2, a-Si is deposited through a CVD process and is annealed by a beam energy 10. As a result, the first semiconductor film 2 is crystallized and turns into a recrystallized semiconductor film 21. After patterning its film 21 by a photolithographic technology, the second semiconductor film 3 as well as an insulating film 4 are deposited and source and drain regions are manufactured by the photolithographic technology. At the second semiconductor film 3, for example, a-Si added with impurities is deposited through a plasma CVD process. At the insulating film 4, SiOX is deposited through the plasma CVD process. At the second insulating film 5 in the source and drain regions, for example, SiNX is deposited through the plasma CVD process and at the third semiconductor film 6, a-Si added with the impurities is deposited in the form of thick film and then gate, source, and drain electrodes 7, 8 and 9 are formed after manufacturing contact holes of the source and drain regions by the photolithographic technology.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method of fabricating a TFT on an insulating substrate.

[Summary of the invention]

The present invention is a method of manufacturing a TFT on an insulating substrate by beam annealing, and by making the gate insulating film as thin as 500 Å or less, the dark voltage (VTll) of the TFT is controlled and the withstand voltage of the gate voltage is reduced. In order to prevent this, a third semiconductor film is provided on the gate insulating layer.

[Conventional technology]

Conventionally, as shown in FIG.
In order to maintain the voltage above 0V, the gate insulating film 5 was required to have a thickness of 2000 Å or more. Therefore, VTM shifted negatively due to the influence of fixed charges in the gate insulating film 5, and the TFT entered depletion operation.

[Problem that the invention seeks to solve]

When using a low-temperature process at 550°C or lower, as shown in Figure 2, if the gate insulating film 5 is thick and fixed charges are present in the film, the VTM of the TFT will shift significantly from Ov, causing a problem. Ta.

[Means for solving problems]

As shown in Figure 1 (cl), by making the gate insulating film 5 thinner than 500 Å, the V
Control T+4 near Ov. Further, a third semiconductor film 6 was provided on the gate insulating film 5 in order to prevent a decrease in breakdown voltage of the gate electrode.

[Effect]

By making the gate insulating film 5 thinner, fixed charges in the film are reduced, and the shift in VTH is also reduced.

Furthermore, by providing the third semiconductor film 6 on the gate insulating film,
The withstand voltage of the gate does not decrease.

[Example] The present invention will be explained below with reference to the drawings. Figure 1 +al~(
C1 is a sectional view for explaining the steps of the embodiment of the present invention. FIG. 1 (al) is a step in which a first semiconductor film 2 is deposited on an insulating substrate l and annealed with an energy beam 10. Examples of the insulating substrate 1 include a film containing impurities such as quartz, non-alkali glass, and alkali. There are also types of glass whose surface is coated with an insulating material to prevent impurities from diffusing from the glass.

Here, a glass substrate that can be used in a 550° C. process was used.

Next, as an example of the first semiconductor film 2, there are various films and deposition methods, but here, a method of depositing a-3t by plasma CVD method will be explained. Deposition temperature ranges from room temperature to approximately 400℃
The source gas is mainly silane (SiHa) or disilane (SiiHa). Also, the film thickness is set between 500 and 3000 people.

Next, an example in which the first semiconductor film 2 is annealed with a beam energy of 10 will be described. There are many energy sources for annealing, such as lasers, electron beams, lamps, heaters, etc., but here we will describe an annealing method using an Ar laser.

In general, a-3T deposited by plasma CVD contains hydrogen gas, so performing pre-annealing to remove this gas improves the crystallinity after recrystallization annealing, which will be described later. It is known that the pre-annealing method can remove hydrogen gas in a-Si at a temperature of about 500° C. or higher, and any annealing method that can raise the temperature to above this temperature can be used. For example, it can be carried out in a vacuum or in a nitrogen or inert gas atmosphere by scanning an energy beam lO of a laser at an energy density that does not melt a-5i. Also, 550℃ in nitrogen atmosphere
, it is sufficient to do it for one hour. Subsequently, recrystallization annealing is performed. As in the pre-annealing process, an Ar laser is used in a vacuum or in a nitrogen or inert gas atmosphere to scan the energy beam 10 at an energy density that melts a-5i from which hydrogen has been removed. As a result, the first semiconductor film 2 is crystallized and becomes a recrystallized semiconductor film 21.

FIG. 1 (bl) shows that after patterning the recrystallized semiconductor film 21 by photolithography, a second semi-dedicated film [3] and an insulating film 4 are deposited;
This is a process in which the source and drain regions are manufactured using photolithography technology. An example of the second semiconductor film 3 is a-
There is Si. By the plasma CVD method described above, S i I
PH3 or B 2 II of 0.1χ to lχ in ta
, deposit between 100 and 1000 with addition of gas.

Next, an example of depositing the insulating film 4 will be described. plasma CV
SiOx is deposited to a thickness of 0.1 μm to 0.5 μm using D. 5iHn, N, and O are used as raw material gases.

After patterning, the second semiconductor film 3 is
Annealing is performed to reduce the resistance. The annealing conditions are the pre-annealing conditions described above. Figure 1 (C) shows the gate vP
After depositing the i-edge film 5 and the third semiconductor film 6, source and drain contact holes are formed, and gate electrodes 7. Source electrode8. This is the process of manufacturing the drain electrode 9. Second
As an example of the insulating film 5, SiNx is deposited by plasma CVD. The raw material gases are mainly 5iHa and NHff, the deposition temperature is between room temperature and 550°C, and the film thickness is between 100 and 500 degrees centigrade. Making the film as thin as possible reduces fixed charges in the film and improves its characteristics. The third semiconductor film 6 is formed by plasma CVD of a-5S doped with impurities in the same manner as the second semiconductor 3.
D is deposited at a film thickness of 500 to 2000. After forming contact holes for the source and drain regions using photolithography, each electrode is deposited. Examples of deposition include various spatter and vapor deposition methods.
Deposit m. When this metal is patterned by photolithography, gate electrode 7, source electrode 8, and drain electrode 9 can be formed as shown in FIG. 1 (C1).

〔Effect of the invention〕

As explained in the above embodiment, this invention reduces the fixed charges in the film by reducing the thickness of the gate insulating film to 500 Å or less when manufacturing a TFT by beam annealing a semiconductor film. It is possible to control the dark value voltage.

[Brief explanation of the drawing]

FIG. 1 (al to tc+ are cross-sectional views for explaining the process order of the embodiment of the TFT of the present invention. FIG. 2 is a cross-sectional view for explaining the conventional structure. 1... Insulating substrate 2... First semiconductor film 3... Second semiconductor film 4... Insulating film 5... Gate insulating film 21... Recrystallized semiconductor film 6... Third semiconductor film 10... Energy Beam or more of the present invention) Technique of a greeting? -Display T Section B Figure 1 1 χ final energy 7
. Figure 2

Claims (2)

[Claims] (1) After depositing a first semiconductor film on an insulating substrate, the first semiconductor film is annealed with an energy beam to form a recrystallized semiconductor film, and the source and drain regions have a resistivity of 0.
．． After depositing a second semiconductor film and an insulating film with a low resistance of 1 Ωcm or less, the second semiconductor film is activated by an energy beam to further lower the resistance, and the recrystallized semiconductor is etched in order to separate the TFT elements. The gate insulating film is deposited to a thickness of 500 Å or less, and the resistivity is 0.
．． After depositing a third semiconductor film with a low resistance of 1 Ωcm or less,
A method for manufacturing a thin film semiconductor device, which includes the steps of forming contact holes in the source and drain portions using photolithography to fabricate gate electrodes, source electrodes, and drain electrodes. (2) The method for manufacturing a thin film semiconductor device according to claim 1, wherein all of the steps are performed at 550° C. or lower.