JPS63136341U - - Google Patents
Info
- Publication number
- JPS63136341U JPS63136341U JP2796987U JP2796987U JPS63136341U JP S63136341 U JPS63136341 U JP S63136341U JP 2796987 U JP2796987 U JP 2796987U JP 2796987 U JP2796987 U JP 2796987U JP S63136341 U JPS63136341 U JP S63136341U
- Authority
- JP
- Japan
- Prior art keywords
- package
- semiconductor device
- lead terminal
- semiconductor circuit
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 9
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第１図は、本考案に係る半導体装置の一実施例
を示す正面図である。第２図は、本考案に係る半
導体装置の別の実施例を示す正面図である。第３
図は、本考案に係る半導体装置の更に別の実施例
を示す正面図である。第４図は、従来の半導体装
置の一例を示す斜視図である。第５図は、従来の
半導体装置の別の例を示す斜視図である。
１〜３……リード端子、１０……パツケージ、
１０Ａ……パツケージ正面、２０，２１，３０…
…識別表示、３１〜３８……リード端子。
FIG. 1 is a front view showing an embodiment of a semiconductor device according to the present invention. FIG. 2 is a front view showing another embodiment of the semiconductor device according to the present invention. Third
The figure is a front view showing still another embodiment of the semiconductor device according to the present invention. FIG. 4 is a perspective view showing an example of a conventional semiconductor device. FIG. 5 is a perspective view showing another example of a conventional semiconductor device. 1 to 3...Lead terminal, 10...Package,
10A...Package front, 20, 21, 30...
...Identification display, 31-38...Lead terminal.
Claims (1)
回路に接続された複数のリード端子をパツケージ
から突設してなる半導体装置において、パツケー
ジ外面の前記リード端子基部近傍に各リード端子
の役割を果たす識別表示を付したことを特徴とす
る半導体装置。 In a semiconductor device in which a semiconductor circuit is built in a package and a plurality of lead terminals connected to the semiconductor circuit are protruded from the package, an identification mark that serves as each lead terminal is placed near the base of the lead terminal on the outer surface of the package. A semiconductor device characterized by being attached with.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2796987U JPS63136341U (en) | 1987-02-26 | 1987-02-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2796987U JPS63136341U (en) | 1987-02-26 | 1987-02-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63136341U true JPS63136341U (en) | 1988-09-07 |
Family
ID=30830499
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2796987U Pending JPS63136341U (en) | 1987-02-26 | 1987-02-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63136341U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS492258B1 (en) * | 1970-05-26 | 1974-01-19 | ||
| JPS5634344B2 (en) * | 1971-08-31 | 1981-08-10 |
-
1987
- 1987-02-26 JP JP2796987U patent/JPS63136341U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS492258B1 (en) * | 1970-05-26 | 1974-01-19 | ||
| JPS5634344B2 (en) * | 1971-08-31 | 1981-08-10 |