JPS63124770U - - Google Patents
Info
- Publication number
- JPS63124770U JPS63124770U JP1452787U JP1452787U JPS63124770U JP S63124770 U JPS63124770 U JP S63124770U JP 1452787 U JP1452787 U JP 1452787U JP 1452787 U JP1452787 U JP 1452787U JP S63124770 U JPS63124770 U JP S63124770U
- Authority
- JP
- Japan
- Prior art keywords
- chip
- circuit
- pair
- boards
- shaped
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 2
- 239000004020 conductor Substances 0.000 claims 3
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Combinations Of Printed Boards (AREA)
Description
第１図は本考案の一実施例を示す簡略断面図、
第２図は従来の一例を示す簡略断面図である。
１ａ，１ｂ……は基板、２ａ，２ｂ，２ｃ，２
ｄ……はリードレスタイプのチツプ状回路素子、
４ａ，４ｂ……はリードレスタイプのチツプ状接
続用部品である。
FIG. 1 is a simplified sectional view showing an embodiment of the present invention;
FIG. 2 is a simplified sectional view showing a conventional example. 1a, 1b... are substrates, 2a, 2b, 2c, 2
d... is a leadless type chip-shaped circuit element,
4a, 4b... are leadless type chip-shaped connection parts.
Claims (1)
ｂ……を取付けた基板１ａ，１ｂ……を重ねて回
路を作る場合において、相対する平行な一対の面
Ａ，Ｂ……を有し、その両面Ａ，Ｂ……のいずれ
をもリードレスタイプのチツプ状回路素子２ｂ，
２ｃ……と同一実装工法により基板１ａ，１ｂ…
…に取付けることができる外形形状を有し、その
両面の表面に導体が少なくとも一部分以上存在し
、かつその両面Ａ，Ｂ……の導体部分の間に配線
回路が設けてあると見なせるリードレスタイプの
チツプ状接続用部品４ａ，４ｂ……を使用し、そ
の平行な一対の面Ａ，Ｂ……を基板１ａ，１ｂ…
…でこのチツプ状接続用部品４ａ，４ｂ……を挾
み込み、そのチツプ状接続用部品４ａ，４ｂ……
と接している一対の基板１ａ，１ｂ……の配線回
路導体部を接続してなる面実装工法による重ね基
板回路。 Leadless type chip-shaped circuit elements 2a, 2
When making a circuit by stacking boards 1a, 1b... on which b... is attached, it has a pair of opposing parallel surfaces A, B..., and both surfaces A, B... are leadless. type chip-shaped circuit element 2b,
Boards 1a, 1b... using the same mounting method as 2c...
A leadless type that has an external shape that can be attached to..., has at least a portion of conductors on both surfaces, and can be considered to have a wiring circuit between the conductor portions of both surfaces A, B... chip-shaped connecting parts 4a, 4b... are used, and a pair of parallel surfaces A, B... are connected to substrates 1a, 1b...
Insert the chip-shaped connecting parts 4a, 4b... into the chip-shaped connecting parts 4a, 4b...
A stacked board circuit formed by connecting the wiring circuit conductor parts of a pair of boards 1a, 1b... which are in contact with each other.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1452787U JPS63124770U (en) | 1987-02-02 | 1987-02-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1452787U JPS63124770U (en) | 1987-02-02 | 1987-02-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63124770U true JPS63124770U (en) | 1988-08-15 |
Family
ID=30804597
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1452787U Pending JPS63124770U (en) | 1987-02-02 | 1987-02-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63124770U (en) |
-
1987
- 1987-02-02 JP JP1452787U patent/JPS63124770U/ja active Pending
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