JPS6285443A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enhance electromigration resistance by sequentially forming a lower layer, an intermediate layer and an upper layer using a specific material on a semiconductor substrate to form a laminated film, and heat treating the intermediate layer. CONSTITUTION:A lower layer made of pure aluminum layer or Al-Si 0.5-5wt% alloy layer, an intermediate layer made of at least one of lithium, beryllium, magnesium, manganese, iron, cobalt, nickel, Cu, palladium, platinum, lanthanum and cellium, and an upper layer made of pure aluminum or Al-Si 0.5-5wt% alloy layer are formed. Thereafter, the material of the intermediate layer is heat treated to be diffused in the aluminum. Thus, the element for enhancing electromigration resistance of aluminum wirings can be diffused uniformly in the aluminum wiring film and particularly in crystal grain boundary to increase a current density.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a method of manufacturing a semiconductor device having a wiring film on a semiconductor substrate, and particularly to a method of forming a wiring film.

[Background of the invention]

Conventionally, materials for wiring films of semiconductor devices include pure aluminum (AQ) or aluminum containing silicon (AQ-8i).
) alloys have been used. However, JP-A-58-447
As described in Publication No. 30, pure AI2 or A
The wiring film made of Q-8i alloy has the drawback of being susceptible to electromigration.

In order to make electromigration less likely to occur, the entire wiring film is made of aluminum containing copper.゛、'、'、SAQ-Cu）The wiring must be formed using an alloy.

A part of the film is formed from an AQ-C11 alloy, as described in, for example, U.S. Pat. The AQ-Cu alloy wiring film is formed as an AQ-C11 alloy directly on a semiconductor substrate by sputtering using an alloy target, for example.

According to the US patent specification, Cu in the AQ alloy is
The intermetallic compound Cu A Q 2 is produced, and the CuA12z particles are interposed at the grain boundaries of AQ to prevent atomic migration of AQ and improve electromicrobial resistance.

However, as a result of the research conducted by the present inventors, C11A Q 2 particles tend to segregate in the AQ-Cu alloy wiring film.

It was found that electromigration is likely to occur in areas where CuAQ2 is not precipitated.

[Purpose of the invention]

An object of the present invention is to provide a method for manufacturing a semiconductor device that can improve electromigration resistance compared to a method of directly forming an AQ-8j alloy wiring film or an AQ-Cs1 alloy wiring film on a semiconductor substrate. be.

[Summary of the invention]

The present invention is to form a wiring film of a semiconductor device by the following steps (1) and (2).

(1) Pure AQ layer or AQ-8i0.5 on semiconductor substrate l]
Lower layer consisting of ~5% by weight alloy layer, lithium (Li), beryllium (Be), magnesium (Mg), manganese (Mn), iron (Fθ), cobalt (Co), nickel (Ni), Cu, and palladium (Pd) and platinum (P L
) and at least one of lanthanum (La) and cerium (Ce), and a pure AQ layer or AQ-8
Step of forming a 111-part layer consisting of an i 0.5-5 % alloy layer.

(2) Thereafter, in step 1, heat treatment is performed to diffuse the material of the intermediate layer into AQ.

In the present invention, a three-layer laminated film consisting of a lower layer, an intermediate layer, and a part of the -I layer is made, and then heat-treated. This is based on the discovery that it can be spread and uniformly dispersed.

In the material of the intermediate layer, the solid solution in AQ combines with AQ to form an intermetallic compound, which prevents the atomic movement of 8Ω and improves the electromicration resistance.

■, i, Bθ, Mg, Mn as intermediate layer materials.

Fat Co, Ni, Cu, Pd, Pt, La and Ce
was selected after confirming its effectiveness through experiments.

When the amount of the intermediate layer material in the total weight of the wiring film increases, the electrical resistance of the wiring film increases, and the intermetallic compound formed by the reaction between AQ and the intermediate layer material has a particularly high electrical resistance. This increases the current density and shortens the life of the wiring film. From this, it is desirable that the material of the intermediate layer has an amount of 0.05 to 5% by weight based on the total weight of the laminated film. By doing so, the finally obtained wiring film contains 0.05 to 5% by weight of the intermediate layer component.

As materials for the intermediate layer, zinc and cadmium from group Nb of the periodic table, titanium, zirconium, and hafnium from group IVa,
Experiments were conducted using vanadium and niobium from the Va group, and chromium, molybdenum, and tungsten from the VIa group, but they had little effect on preventing electromigration.

When electromigration occurs, a raised portion is generated in a part of the wiring film, and a depression is generated in the vicinity of the raised portion. As a result, the resistance of the wiring film increases, and the wiring film tends to melt when a current with a high current density is passed. In severe cases of electromigration, the wiring film will be disconnected.

According to the present invention, an element that improves the electromigration resistance of AQ wiring can be uniformly dispersed in the Δ-pathic wiring film, particularly at the grain boundaries.
The current density can be increased compared to alloy wiring number J.

In the manufacturing method of the present invention, it is preferable that the heat treatment to be applied to the laminated film is performed after patterning the laminated film into a predetermined shape by etching the wiring film. By heat-treating the wiring film after patterning, the crystal structure becomes uniform, the width of the wiring film can be reduced to 1 μm or less, and the degree of integration of the semiconductor substrate can be increased. As a result, it is possible to reduce the packaging density of the semiconductor substrate, and to prevent premature destruction of the device due to electromigration.

The advantages of first forming a wiring film or structure as a laminated film, and applying heat treatment to the wiring film pattern after processing to diffuse it into a uniform alloy film will be described below.

When forming an AQ alloy film using an alloy target by a conventional sputtering method, the sputtering rate differs depending on the AQ and the additive element. Therefore, the composition of the resulting film is difficult to stabilize.
Further, even on the surface of a semiconductor wafer, the distribution of additive elements is difficult to achieve uniformly, and the problem of segregation of additive elements remains. If the arsenic additive element is not uniformly distributed, local cells will be formed everywhere during dry etching of the AQ film to form a fine pattern, making it impossible to form a fine pattern.

On the other hand, according to the present invention, the film is a laminated film during etching, and non-uniformity in patterning due to dry etching is less likely to occur. Furthermore, since the elements are uniformly distributed in the film after diffusion by heat treatment, it exhibits good migration resistance.

In the manufacturing method of the present invention, the grain boundaries of the AQ film serve as diffusion paths for elements in the intermediate layer, and diffusion of additive elements occurs due to grain boundary diffusion. Therefore, the grain boundaries are mainly strengthened, and the base of the AQ grains is only minimally affected. This means that the increase in electrical resistance by 1 due to solid solution of foreign atoms in the Afi base is minimized. Therefore, the heat generation in the wiring portion is not much different from that of the conventional one, and the element temperature does not rise much more than the conventional one. On the other hand, the reliability of the wiring itself has been significantly improved because the grain boundaries, which are susceptible to damage due to migration, have been strengthened. Furthermore, since the distribution of the additive elements is uniform, there are no weak spots, which improves the reliability of the entire device.

Now, in the present invention, an AQ or Si-containing AQ layer is placed below 1, and r, i, 13a, Mg, and Mn are placed between them.

A film is formed by sandwiching metal layers of one or more of Fe, Co, Ni, Cu, Pd, Pt, La, and Go. The film is formed by vacuum evaporation, electron beam evaporation, sputtering, or chemical vapor deposition (hereinafter referred to as CVD) for forming the lower layer (AQ or Si-containing AQ layer) that makes ohmic contact with the semiconductor substrate. Formed by means of. The thickness of the lower film is 0.1-1μ
It is desirable to set it to m.

Next, the material for the intermediate layer is vacuum deposited on the lower layer 1-.

It is formed by electron beam evaporation, sputtering, or Cvr') method. Since the intermediate layer is added to prevent electromigration, its thickness may be thin, and a thickness of 0.001 to 0.1 μm is sufficient.

Thereafter, an AQ or Si-containing AQ layer is deposited on -L of the intermediate layer by vacuum evaporation, electron beam evaporation, sputtering, or CVD to a thickness of 0.1 to 1 .mu.m in the same manner as the lower layer.

Nao-! The two-layer Afl or Si-containing Afl layer preferably contains 0.001 to 2% by weight of one or more of Pd and PT in order to improve moisture resistance and reliability. If it is less than o, ooi weight %, the effect of improving moisture resistance is small, and if it is more than 2 weight %, coarse precipitates are deposited, and corrosion due to pitting is more likely to occur from the surrounding area due to local battery action. Upper layer also contains Pd or pt
There are two plows. One of these functions is to reduce the hydrogen atoms that have entered the AQ protective film through catalytic action, thereby preventing intergranular corrosion caused by hydrogen precipitating at the grain boundaries of AQ.

Another function is Pd.

Since pt can be uniformly dissolved in Afl, AQ
Since the bases are uniformly anodically polarized and the oxidation protective film on the AQ surface is strengthened, it is possible to prevent the ΔQ bases on the F base from dissolving.

In addition, in the present invention, the lower layer and the -L part layer or Sj constituting the laminated film may be included, but in that case, S
The hardness is 0.5 to 5% heavy acid.

If it is less than 0.5% by weight, the solid solubility limit of Si in AQ is about 0.5% by weight at 500°C, so when heat-treating the Si wafer, Si will be removed at the conductive part between the AQ wiring and the Si substrate. AQ
It becomes a solid solution in the wiring, and in extreme cases, it may cause penetration of the diffusion layer. If it is more than 5% by weight, the resistance becomes too high by 1:1 to be impractical.

Next, the etching properties of the wiring film according to the present invention to a wiring pattern will be described. Dry etching using a chlorine-based gas is usually performed for fine wiring with a wiring width of 2 μm or less. At that time, if different elements are unevenly distributed in the AQ base, local batteries will be formed due to the density of the distribution, leading to extreme corrosion in some parts and deteriorating the precision of the wiring pattern. There are some things that cannot be formed. -6 In the present invention, a laminated film is formed during etching, and the distribution of the additive elements in the plane direction is uniform. Further, although the distribution in the depth direction is layered, etching proceeds uniformly in the depth direction and the layer of the additive element is thin, so etching can be performed without any particular problem. P is directly mixed into the AQ layer to improve moisture resistance reliability.
d. Since Pt is uniformly dispersed in the form of atoms in AQ, no problem occurs during dry etching.

After the laminated film consisting of the lower layer, the intermediate layer, and the part layer is patterned into a predetermined wiring film shape, a heat treatment is then performed to diffuse the components of the intermediate layer into the AQ. The temperature of the heat treatment is preferably in the range of 300 to 500°C. If the heat treatment temperature is lower than 300°C, sufficient diffusion will not occur.
The state of the film changes when it goes through the post-process. When the temperature is higher than 500°C, crystal grains tend to become coarse.

The heat treatment time is preferably 15 minutes to 5 hours.

After the heat treatment of the laminated film is completed and the wiring film is completed, a protective film such as plasma Sin, sputtered 5JOz, polyimide resin (PIQ), phosphor glass, etc. is formed on the wiring film -I-, and the Si chip is metal-plated. It is mounted on a hard frame or a ceramic mold 1-. Thereafter, bonding is performed using either Au, ICII, or AQ wires, followed by molding to produce a product.

The semiconductor device obtained by the present invention is suitable for use in which the AQ alloy wiring film is in contact with a synthetic resin. The synthetic resin reacts with moisture in the atmosphere and liberates corrosive substances such as chlorine ions and amines, which corrode AM. AQ of the present invention
This type of semiconductor device is made of gold alloy synthetic resin.
Epoxy resin, phenolic resin, melamine resin, urea resin.

diallyl phthalate resin, unsaturated polyester resin, urethane resin, addition type polyimide resin, silicone resin,
Thermosetting resins such as polyparavinylphenol resin, fluororesin, polyphenylene sulfide, polyethylene,
Thermoplastic resins such as polystyrene, polyamide, polyether, polyester, polyamide ether, and polyamide ester are used. Epoxy resin is particularly preferred as the sealing material used in the semiconductor device of the present invention.

[Embodiments of the invention]

Hereinafter, the present invention will be explained in detail with reference to Examples.

FIG. 1 is a sectional view showing the structure of an embodiment of the present invention.

In Fig. 1, ■ is a semiconductor substrate (Si substrate, Ga-A
s substrate, etc.), 2 is an impurity (e.g. P, As, B, AQ
etc.), and 3 is a window-opened insulator (for example, a Si0g film with a thickness of 0.1 to 0.5 μm or a PSG film).
[ ) and 4 are formed of pure AQ or Si-containing AQ layers (for example, by vapor deposition or sputtering).

It is deposited to a thickness of 0.1 to 1 μm by CVD method or the like. ), and is in contact with the diffusion layer 2 through a contact 5. 6 is Li, Be.

Mg, Mn, Fe, Co, Ni, Cu, Pd.

An intermediate layer made of one or more of Pt, T, a, and Go (for example, deposited to a thickness of 0.001.-0, 1 μm by vapor deposition, sputtering, CVD, etc.), 7 is pure AQ or Si. Entering AQ, or Pd or Pt
Formed with an AQ layer containing 0.001 to 2% by weight of
μm is deposited. ) is the upper layer. 8 is a protective film that protects the surface of the element (for example, S with a thickness of 0.5 to 2.0 μm).
i('')x, phosphor glass, PIQ film), a bonding pad portion 9 is opened. 10 is a bonding wire.

FIG. 2 is a graph for explaining the present invention in detail,
As a wiring material, conventional Si-containing AQ (Si content double %
) shows the life of the wiring in a high temperature current test when using the alloy wiring of the present invention and when using the alloy wiring of the present invention. The life span was expressed as the time required for half of the wiring film on the semiconductor substrate to break.

In FIG. 2, everything except Si-containing AQ is according to the present invention. In the wiring film of the present invention, a lower layer made of pure A is formed by sputtering, an intermediate layer made of a predetermined single material is formed on the I- by sputtering, and then a lower layer made of pure A is formed by sputtering.
Q [some layers are formed by sputtering, then
It was manufactured by heating in the range of 300 to 500°C for 15 to 180 minutes. In order to represent the wiring film manufactured in this way in a simplified form in FIG.
It was described as T-i or Afl-]%Mn, etc. All percentages in FIG. 2 mean percentages by weight.

As is clear from FIG. 2, the Af1 alloy wiring according to the present invention is more stable for a long time than the Si-containing AQ.

The reason for this will be explained next. The activation energy for electromigration of AQ is approximately 1.2 to 1. ,
3 eV, whereas at grain boundaries it is extremely low at about 0.5 eV. This corresponds to the fact that interconnect fracture due to electromigration is caused by grain boundary diffusion. Therefore, if a wiring film in which grain boundaries are intensively strengthened is used, grain boundary diffusion of AQ bases is suppressed, and the life of the wiring can be extended.

Figure 3 shows an accelerated life test (2-atmosphere saturated water vapor storage test) to investigate the corrosion life of the AQ-1%Pd alloy wiring according to the present invention and the conventional AQ-2%Si alloy wiring when Si chips are resin-molded. ) is shown. The disconnection rate was determined from the presence or absence of electrical continuity of the 10 μm wide wiring. Third
As is clear from the figure, the AQ alloy wiring according to the present invention has better moisture resistance and reliability than the conventional Si-containing AQ wiring, and has a service life five times longer.

The reason for this is that Pd
Or, in a wiring in which PT is uniformly dissolved in solid solution and part of 1 is covered with 8AQ, grain boundary corrosion by hydrogen is prevented by the catalytic action of Pt, and P(1 or Pt is an electrochemically sensitive metal, and when it is uniformly dissolved in solid solution, the AQ base is uniformly polarized as an anode, and the oxidation protective film on the AQ surface is strengthened, which prevents the underlying AQ base from dissolving. -Because you can.

To summarize the above, it is considered that according to the present invention, two requirements, reliability against electromigration and reliability against moisture, can be satisfied.

In addition, the bonding pad part is made of Aff, which has corrosion resistance.
By forming the wire in layers, it is easy to bond any Au, Aff, or Cu wire, and the bonding stability is maintained even when thermal cycles are applied after the wiring is formed.
A highly reliable semiconductor element can be manufactured when ceramic molding or resin molding is performed.

Next, the structure of the AM wiring film will be described in detail. FIG. 4 shows the life span of the AQ wiring film in a high-temperature current test. The crystal grain size of the conventional AQ film is 3 to 10μ.
m, but in the AQ film of the present invention, the crystal grain size is 0.3 μm.
The smaller the degree, the longer the lifespan. The reason why the crystal grain size becomes smaller is that the intermediate layer crystal can be prevented from recrystallizing. The reason why the wiring life is extended is because the grain size is smaller than the wiring width, so even if one grain boundary breaks in a 1 μm wiring, the entire wiring will not be disconnected.

Next, in order to compare the layered film structure during etching with the film structure after heat treatment, the cross section of the 1 μm wiring was examined after dry etching with chlorine gas. It was confirmed that the pattern accuracy of the laminated film according to the present invention was superior, and that the one after heat treatment was corroded along the grain boundaries, resulting in poor pattern accuracy.

Among the intermediate materials according to the invention, Li, Rθ.

Mg, La and Ce are 1μ! It is particularly excellent in terms of processability into fine patterns of n or less and uniform dispersibility, and considering these points in addition to electromigration resistance, it is optimal as an intermediate material for wiring.

A semiconductor wiring film that can be easily processed into a pattern is obtained. As a result, the present invention can be applied to high-density, fine patterns of resin-molded or ceramic-molded semiconductor elements, and the reliability of semiconductor devices can be improved.

[Brief explanation of drawings]

Fig. 1 is a cross-sectional view showing the structure of an embodiment of the present invention, Fig. 2 is a characteristic diagram showing the electromigration resistance of various wiring film materials, and Fig. 3 is a test of moisture resistance reliability of the wiring film. Figure 4 is a characteristic diagram showing the results of a high temperature current test. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Diffusion layer, 3... Insulator, 4... Lower layer, 6... Intermediate layer, 7... L part layer,
8... Protective film, 10... Bonding wire.

Claims (1)

[Scope of Claims] 1. A method for manufacturing a semiconductor device having a wiring film on a semiconductor substrate, the method comprising the following wiring film forming steps (1) and (2). (1) A lower layer consisting of a pure aluminum layer or an aluminum alloy layer containing 0.5 to 5% by weight of silicon on a semiconductor substrate, lithium, beryllium, magnesium, manganese,
An intermediate layer made of at least one of iron, cobalt, nickel, copper, palladium, platinum, lanthanum, and cerium, and an upper layer made of a pure aluminum layer or an aluminum alloy layer containing 0.5 to 5% by weight of silicon are sequentially formed. (2) After forming the laminated film, heat treatment is performed to diffuse the material of the intermediate layer into aluminum. 2. A method for manufacturing a semiconductor device according to claim 1, wherein the laminated film is formed by any one of vacuum evaporation, electron beam evaporation, sputtering, and chemical vapor deposition. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the material of the intermediate layer has an amount of 0.05 to 5% by weight of the total weight of the laminated film. 4. The method of manufacturing a semiconductor device according to claim 1, wherein the thickness of the lower layer is 0.1 to 1 μm. 5. The method of manufacturing a semiconductor device according to claim 1, wherein the intermediate layer has a thickness of 0.001 to 0.1 μm. 6. A method for manufacturing a semiconductor device according to claim 1, wherein the thickness of the upper layer is 0.1 to 1 μm. 7. A method for manufacturing a semiconductor device according to claim 1, characterized in that the heating temperature of the heat treatment is 300 to 500°C. 8. A method for manufacturing a semiconductor device, which includes the following wiring film forming steps (1) to (3) in manufacturing a semiconductor device having a wiring film on a semiconductor substrate. (1) A lower layer consisting of a pure aluminum layer or an aluminum alloy layer containing 0.5 to 5% by weight of silicon on a semiconductor substrate, lithium, beryllium, magnesium, manganese,
An intermediate layer made of at least one of iron, cobalt, nickel, copper, palladium, platinum, lanthanum, and cerium, and an upper layer made of a pure aluminum layer or an aluminum alloy layer containing 0.5 to 5% by weight of silicon are sequentially formed. (2) etching the laminated film into a predetermined wiring film shape; and (3) after the etching, performing heat treatment to diffuse the intermediate layer material into aluminum. 9. A method for manufacturing a semiconductor device according to claim 8, characterized in that the etching is performed by dry etching. 10. The method of manufacturing a semiconductor device according to claim 8, wherein the material of the intermediate layer has an amount of 0.05 to 5% by weight of the total weight of the laminated film. 11. A method for manufacturing a semiconductor device according to claim 8, characterized in that the heating temperature of the heat treatment is 300 to 500°C. 12. A method for manufacturing a semiconductor device, which includes the following wiring film forming steps (1) to (3) in manufacturing a semiconductor device having a wiring film on a semiconductor substrate. (1) A lower layer consisting of a pure aluminum layer or an aluminum alloy layer containing 0.5 to 5% by weight of silicon on a semiconductor substrate, lithium, beryllium, magnesium, manganese,
an intermediate layer made of at least one of iron, cobalt, nickel, copper, palladium, platinum, lanthanum, and cerium; and at least one of palladium and platinum in an amount of 0.001
~2% by weight of an aluminum layer or at least one of palladium and platinum, and 0.001% to 2% by weight of silicon;
(2) etching the laminated film into a predetermined wiring film shape; (3) after the etching, the step of etching the laminated film into a predetermined wiring film shape; A heat treatment process that diffuses the intermediate layer material into aluminum. 13. Claim 12, wherein the lower layer has a thickness of 0.1 to 1 μm, and the intermediate layer has a thickness of 0.001 μm.
~0.1 μm and the thickness of the top layer is 0.1-1 μm
A method for manufacturing a semiconductor device, characterized by comprising the following steps. 14. The method of manufacturing a semiconductor device according to claim 12, wherein the material of the intermediate layer accounts for 0.05 to 5% by weight of the total weight of the laminated film. 15. The method of manufacturing a semiconductor device according to claim 12, wherein the laminated film is formed by any one of vacuum evaporation, electron beam evaporation, sputtering, and chemical vapor deposition. 16. A method for manufacturing a semiconductor device according to claim 12, characterized in that the heating temperature of the heat treatment is 300 to 500°C.