JPS6279629A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS6279629A JPS6279629A JP22063485A JP22063485A JPS6279629A JP S6279629 A JPS6279629 A JP S6279629A JP 22063485 A JP22063485 A JP 22063485A JP 22063485 A JP22063485 A JP 22063485A JP S6279629 A JPS6279629 A JP S6279629A
- Authority
- JP
- Japan
- Prior art keywords
- film
- glass film
- phosphorus glass
- insulating film
- dampproof
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Formation Of Insulating Films (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は半導体装置の製造方法における半導体基板上
に形成された凹凸パターンの表面を平坦化する方法に関
するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for flattening the surface of a concavo-convex pattern formed on a semiconductor substrate in a method of manufacturing a semiconductor device.
第2図は従来の41の方法によって表面を平坦化した半
導体基体を示す断面図で、半導体基板(1)の上に膜形
成、写真製版及びエツチングによって所要パターンの第
1の絶縁膜(2)膜形成すると表面に凹凸が生じる。こ
の上に直接アルミニワム(At)配線を形成すると、凹
凸のエツジが急峻であるので、上記At配線に断線を生
じ易い。これを回避するために、第1の絶縁膜(2)に
よる凹凸面をなるべく平坦にするのに、その上にリンガ
ラスPM (3)k形成する方法が古くから用いられて
いた。FIG. 2 is a cross-sectional view showing a semiconductor substrate whose surface has been flattened by the conventional method 41, in which a first insulating film (2) of a desired pattern is formed on the semiconductor substrate (1) by film formation, photolithography and etching. When the film is formed, the surface becomes uneven. If an aluminum (At) wiring is formed directly on this, the At wiring is likely to be disconnected because the edges of the unevenness are steep. To avoid this, a method of forming phosphorus glass PM (3)k on the first insulating film (2) has been used for a long time to make the uneven surface of the first insulating film (2) as flat as possible.
第3図は従来の第2の方法によって表面全平坦化した半
導体基体を示す断面図で、第2図の従来例におけるリン
ガラス膜(3)の代りにボロンリンガラス膜(4)膜形
成するもので、これはリンガラスよりも流れがよく一層
平坦化が可能である。このようなリンガラス膜(3)ま
たはボロンリンガラス膜(4)による平坦化は今後要求
されるより尚密度な半導体素子の形成、多層配線の形成
の場合の下地の平坦化に不可欠なものでろるO
〔発明が解決しようとする問題点〕
しかし、このリンガラス膜やボロンリンガラス胱は耐湿
性が不足し、特にボロンリンガラス膜はリンガラス膜よ
りもさらに劣るという問題点があった。FIG. 3 is a cross-sectional view showing a semiconductor substrate whose surface has been completely planarized by the second conventional method, in which a boron phosphorus glass film (4) is formed in place of the phosphorus glass film (3) in the conventional example shown in FIG. This material has a better flow than phosphorus glass and can be made even more flat. Flattening using such a phosphorus glass film (3) or a boron phosphorus glass film (4) will be essential for the formation of semiconductor elements with higher density, which will be required in the future, and for flattening the base when forming multilayer wiring. [Problems to be Solved by the Invention] However, the phosphorus glass membrane and the boron phosphorus glass membrane lack moisture resistance, and in particular, the borophosphorus glass membrane has a problem that it is even worse than the phosphorus glass membrane.
この発明は以上のような問題点を解消するためになされ
たもので、リンガラス膜またはボロンリンガラス膜を用
い、しかも耐湿性のよい表面の平坦化を行う方法を提供
することを目的とする。This invention was made to solve the above-mentioned problems, and an object of the present invention is to provide a method for flattening a surface using a phosphorus glass film or a boron phosphorus glass film and having good moisture resistance. .
この発明における半導体装置の製造方法ではリンガラス
膜またはボロンリンガラス膜で表面を平坦化した後に、
その上に耐湿性絶縁膜を形成する・ものである。In the method of manufacturing a semiconductor device according to the present invention, after flattening the surface with a phosphorus glass film or a boron phosphorus glass film,
A moisture-resistant insulating film is formed thereon.
この発明ではリンガラス膜またはポロンリンガラスで所
要の表面平坦化が可能で、これらに欠ける耐湿性をその
上に耐湿性絶縁膜を形成することによって達成させるこ
とができる。In the present invention, the required surface flattening can be achieved using a phosphorus glass film or a phosphorus glass film, and the moisture resistance lacking in these films can be achieved by forming a moisture resistant insulating film thereon.
〔実施例〕
第1図はこの発明の一実施例の方法によって表面を平坦
化した半導体基体を示す断面図で、従来例と同一符号は
同等部分を示す。第3図の第2の従来例と同様に、半導
体基板(1)の上に所要パターンのilの絶縁膜(2)
全形成して表面に生じた凹凸を、その上にボロンリンガ
ラス膜(4)全形成して熱処理を施して平坦化した後に
、更にその上に酸化膜などの耐湿性の第2の絶縁膜(5
)をCVD法またはスパッタ法で形成する。これによっ
て、上面は更に平坦化され、耐湿性も著しく向上する。[Embodiment] FIG. 1 is a sectional view showing a semiconductor substrate whose surface has been planarized by a method according to an embodiment of the present invention, and the same reference numerals as in the conventional example indicate equivalent parts. Similar to the second conventional example shown in FIG.
After completely forming the boron phosphorus glass film (4) on the uneven surface that has formed on the surface and flattening it by heat treatment, a second moisture-resistant insulating film such as an oxide film is further applied on top of it. (5
) is formed by CVD or sputtering. This further flattens the top surface and significantly improves moisture resistance.
なお、上記実施例ではボロンリンガラス膜を用いたがリ
ンガラス膜を用いてもよい。In addition, although the boron phosphorus glass film was used in the above embodiment, a phosphorus glass film may also be used.
以上説明したようにこの発明では凹凸パターンを有する
半導体基体の表面の上にリンガラスitだはボロンリン
ガラス膜を形成することによって表面の平坦化が容易に
可能であり、更に、その上に耐湿性の絶縁膜を形成する
ので耐湿性の間頭のない平坦表面が得られ、その上に金
属配線全形成しても断線の発生などが避けられる。As explained above, in the present invention, by forming a phosphorus glass film or a boron phosphorus glass film on the surface of a semiconductor substrate having an uneven pattern, the surface can be easily flattened. Since a transparent insulating film is formed, a moisture-resistant flat surface with no head can be obtained, and even if all metal wiring is formed thereon, occurrence of disconnection can be avoided.
第1図はこの発明の一実施例の方法によって表面を平坦
化した半導体基体の断面図、第2図及び第3図はそれぞ
れ従来の第1及び第2の方法によって表面全平坦化した
半導体基体の断面図である。
図において、(1)は半導体基板、(2)は凹凸パター
ン(第1の絶縁膜)、(3)はリンガラス膜、(4)は
ポロ/リンガラス膜、(5)は耐湿性絶縁膜(第2の絶
縁膜)であるー
なお、図中同一符号は同一または相当部分を示す。FIG. 1 is a sectional view of a semiconductor substrate whose surface has been planarized by the method of one embodiment of the present invention, and FIGS. 2 and 3 are semiconductor substrates whose surfaces have been completely planarized by the conventional first and second methods, respectively. FIG. In the figure, (1) is a semiconductor substrate, (2) is an uneven pattern (first insulating film), (3) is a phosphor glass film, (4) is a polo/phosphor glass film, and (5) is a moisture-resistant insulating film. (Second insulating film) - Note that the same reference numerals in the figures indicate the same or corresponding parts.
Claims (2)
ンガラス膜またはボロンリンガラス膜を形成し所要の熱
処理を施した後に、更に、その上に耐湿性絶縁膜を形成
する工程を備えたことを特徴とする半導体装置の製造方
法。(1) After forming a phosphorus glass film or a boron phosphorus glass film on the uneven pattern formed on the semiconductor substrate and subjecting it to the necessary heat treatment, the method further includes the step of forming a moisture-resistant insulating film thereon. A method for manufacturing a semiconductor device, characterized in that:
特許請求の範囲第1項記載の半導体装置の製造方法。(2) The method for manufacturing a semiconductor device according to claim 1, characterized in that an oxide film is used as the moisture-resistant insulating film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22063485A JPS6279629A (en) | 1985-10-03 | 1985-10-03 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22063485A JPS6279629A (en) | 1985-10-03 | 1985-10-03 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6279629A true JPS6279629A (en) | 1987-04-13 |
Family
ID=16754042
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP22063485A Pending JPS6279629A (en) | 1985-10-03 | 1985-10-03 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6279629A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0276231A (en) * | 1988-09-13 | 1990-03-15 | Toshiba Corp | Chemical semiconductor device and manufacture thereof |
US5077238A (en) * | 1988-05-18 | 1991-12-31 | Mitsubishi Denki Kabushiki Kaisha | Method of manufacturing a semiconductor device with a planar interlayer insulating film |
JP4997682B2 (en) * | 2000-06-30 | 2012-08-08 | ソニー株式会社 | Semiconductor device and manufacturing method thereof |
-
1985
- 1985-10-03 JP JP22063485A patent/JPS6279629A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5077238A (en) * | 1988-05-18 | 1991-12-31 | Mitsubishi Denki Kabushiki Kaisha | Method of manufacturing a semiconductor device with a planar interlayer insulating film |
JPH0276231A (en) * | 1988-09-13 | 1990-03-15 | Toshiba Corp | Chemical semiconductor device and manufacture thereof |
JP4997682B2 (en) * | 2000-06-30 | 2012-08-08 | ソニー株式会社 | Semiconductor device and manufacturing method thereof |
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