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JPS6266974A - Drive circuit - Google Patents

Drive circuit

Info

Publication number
JPS6266974A
JPS6266974A JP20751685A JP20751685A JPS6266974A JP S6266974 A JPS6266974 A JP S6266974A JP 20751685 A JP20751685 A JP 20751685A JP 20751685 A JP20751685 A JP 20751685A JP S6266974 A JPS6266974 A JP S6266974A
Authority
JP
Japan
Prior art keywords
voltage
control signal
voltage control
drive
delay means
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20751685A
Other languages
Japanese (ja)
Inventor
Eiichi Ebihara
海老原 栄一
Haruyuki Nishikawa
西川 晴幸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP20751685A priority Critical patent/JPS6266974A/en
Publication of JPS6266974A publication Critical patent/JPS6266974A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To constitute a simple drive circuit at lower cost wherein a power source is set to one system, by a method wherein, in order to perform voltage control and drive control by the same control signal, a printing head is driven after the boosting of voltage has been stabilized by a first delay means and driving is delayed behined the OFF-time of voltage control by a second delay means t increase a voltage drop speed. CONSTITUTION:Voltage Vh is generated at the output terminal of a booster circuit 10 during printing operation in the OFF-state of a voltage control signal 14 and a printing head 2 is selectively operated by said voltage. When the printing of one line is finished, the voltage control signal 14 comes to an H-level and a diode D1 is turned OFF and the booster circuit 10 begins to raise voltage to Vm. The diode D2 is cut OFF by said voltage control signal 14 and TR1 is turned ON on the basis of a time constant R3.C so as to be delayed by a ton time. When the voltage control signal 14 is cut OFF, voltage drop is started but TR1 is turned OFF on the basis of a time constant R2.C so as to be delayed by a toff time and, therefore, the charge of the load capacitance of the booster circuit is discharged and a voltage drop speed can be increased.

Description

【発明の詳細な説明】 〔概要〕 駆動期間および駆動電圧の相異なる電気部材を電圧制御
可能な同一電源で動作させる駆動回路であって、 該電気部材の駆動電圧に昇圧する電圧制御信号を第1の
遅延回路で遅延せしめて該電気部材をオンとし、該電圧
制御信号がオフして降圧せしめるとき、第2の遅延回路
により遅延せしめて該電気部材をオフする簡易な駆動回
路を提供するもので、電源の昇圧速度に対応せしめて駆
動するとともに降圧速度を速める効果がある。
[Detailed Description of the Invention] [Summary] A drive circuit that operates electrical members having different drive periods and drive voltages using the same voltage controllable power supply, the drive circuit comprising: a voltage control signal that boosts the drive voltage of the electrical member; To provide a simple drive circuit that turns on the electrical member by delaying it with a first delay circuit, and turns off the electrical member by delaying it with a second delay circuit when the voltage control signal is turned off to lower the voltage. This has the effect of driving in accordance with the step-up speed of the power supply and increasing the step-down speed.

〔産業上の利用分野〕[Industrial application field]

本発明は駆動回路の改良に関する。 The present invention relates to improvements in drive circuits.

プリンタにおけるように、複数の機構を駆動する装置で
は、駆動電圧が異なる場合が多く、電源が複数組必要と
なって、コスト高の一因となっている。
In devices that drive multiple mechanisms, such as in printers, the driving voltages are often different, and multiple sets of power supplies are required, contributing to increased costs.

しかし印字ヘッドの退避/接近(エスケープ/アプロー
チ)駆動と印字ヘッド駆動のごとく互いに駆動期間が重
複しない場合は電圧制御を行って電源を1系統にするこ
とが考えられるが、電源を小型化すると電圧制御の応答
性が悪く、電圧制御に対する駆動のタイミングを制御す
る必要が生じる。
However, if the drive period does not overlap with each other, such as print head escape/approach drive and print head drive, it may be possible to perform voltage control and use a single power supply system, but if the power supply is made smaller, the voltage Control responsiveness is poor, and it is necessary to control drive timing relative to voltage control.

このため上記駆動タイミングを制御して電源を1系統に
する簡易な駆動回路が求められている。
Therefore, there is a need for a simple drive circuit that controls the drive timing and uses a single power supply system.

〔従来の技術〕[Conventional technology]

以下感熱式プリンタにおける印字ヘッド駆動と印字ヘッ
ドのエスケープ/アプローチ駆動を例として従来例を説
明する。
A conventional example will be described below using print head drive and print head escape/approach drive in a thermal printer as examples.

第3図(a)はエスケープ/アプローチ動作説明図であ
って、+11はヘッド部分の前面図、(2)は側断面図
、(3)は動作タイムチャート図である。
FIG. 3(a) is an explanatory diagram of the escape/approach operation, in which +11 is a front view of the head portion, (2) is a side sectional view, and (3) is an operation time chart.

感熱式プリンタでは一方向印字が行われ、第3図(a)
 −(1)に示すように、印字へラド2はプラテンlに
対してアプローチし、A方向にスペーシングしつつ印字
し、リターン時は印字ヘッド2をエスケープして〔第3
図(al −(21の2“〕B方向にリターンする。
Thermal printers perform unidirectional printing, as shown in Figure 3(a).
- As shown in (1), the print head 2 approaches the platen l, prints while spacing in the A direction, and when returning, escapes the print head 2 and
Figure (al-(21 of 2") Return to direction B.

上記印字ヘッド2のエスケープ/アプローチ動作は、プ
ランジャーマグネット4の一方向動作が保持機構3に保
持されるとともに回転伝達されて行われるものであって
、第3図+81− +31に示すように、プランジャー
マグネット4は駆動電圧Vm(11V程度)が期間Tl
印可されてエスケープまたはアプローチ動作が行われ、
スペーシング時およびキャリッジリターン時はプランジ
ャーマグネット4はオフとなっている。
The escape/approach operation of the print head 2 is performed by the unidirectional movement of the plunger magnet 4 being held by the holding mechanism 3 and rotationally transmitted, as shown in FIG. 3 +81-+31. The plunger magnet 4 has a driving voltage Vm (about 11V) for a period Tl.
is applied and an escape or approach operation is performed,
The plunger magnet 4 is off during spacing and carriage return.

一方印字ヘッド2はカラム方向に24組設けられ、印字
文字パターンに基づき選択されて印字ヘッド駆動電圧V
h (7〜9V)が印可される。
On the other hand, 24 sets of print heads 2 are provided in the column direction, and the print head drive voltage V is selected based on the print character pattern.
h (7-9V) is applied.

上記2組の駆動回路は、第3図(kl)に示すように、
電池9よりそれぞれ昇圧回路5.7によりそれぞれ電圧
Vm、Vhを発生し、スイッチ6および8によりプラン
ジャーマグネット4.印字ヘッド2を駆動している。
The above two sets of drive circuits are as shown in FIG. 3 (kl).
Voltages Vm and Vh are generated from the battery 9 by booster circuits 5 and 7, respectively, and plunger magnets 4 and 4 are generated by switches 6 and 8, respectively. The print head 2 is driven.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

以上説明したように、プランジャーマグネットの駆動電
圧Vmと印字ヘッド駆動電圧vhとをそれぞれ発生させ
る昇圧回路を設けると、コスト高になるという問題点が
あった。
As explained above, there is a problem in that the cost increases when a booster circuit is provided to generate the drive voltage Vm of the plunger magnet and the drive voltage vh of the print head, respectively.

プランジャーマグネット4と印字ヘッド2との駆動期間
は重複しないため、電圧制御を行って1組の昇圧回路で
駆動することが考えられるが、昇圧回路を小型化すると
昇降に時間を要し、駆動タイミングを制御する必要があ
る。
Since the driving periods of the plunger magnet 4 and the print head 2 do not overlap, it is possible to control the voltage and drive them with one set of booster circuits, but if the booster circuit is made smaller, it will take time to raise and lower the drive. You need to control the timing.

そのため本発明は前記問題点を解決する簡易な駆動回路
を提供することを目的としている。
Therefore, an object of the present invention is to provide a simple drive circuit that solves the above problems.

〔問題点を解決するための手段〕[Means for solving problems]

上記目的のため、本発明の駆動回路は第1図原理説明図
に示すように、 ゛電源を第1の電気部材の駆動電圧に設定して駆動せし
めるとともに、電圧制御信号(14)入力により第2の
電気部材の駆動電圧に昇圧せしめる手段(11)と、 前記電圧制御信号の立ち上がりおよび立ち下がりをそれ
ぞれ遅延せしめる第1(12)、第2 (13)の遅延
手段を備え、第1.第2の遅延手段により該電圧制御信
号を遅延せしめて第2の電気部材を駆動する手段と を備える。
For the above purpose, the drive circuit of the present invention, as shown in the principle explanatory diagram of FIG. means (11) for boosting the driving voltage of the electric member of the second electric member; and first (12) and second (13) delay means for respectively delaying the rise and fall of the voltage control signal; and means for delaying the voltage control signal by a second delay means to drive the second electric member.

(作用〕 即ち、同一の制御信号により電圧制御と駆動制御とを行
うために第1の遅延手段(12)により電圧の昇圧が安
定した後駆動し、第2の遅延手段(13)により電圧制
御のオフよりも駆動を遅延させて降圧速度を速めるもの
である。
(Function) That is, in order to perform voltage control and drive control using the same control signal, the first delay means (12) performs driving after the voltage boost is stabilized, and the second delay means (13) performs voltage control. This speeds up the step-down speed by delaying the drive compared to when the switch is turned off.

〔実施例〕〔Example〕

本発明の詳細を第2図に示す実施例に従って説明する。 The details of the present invention will be explained according to the embodiment shown in FIG.

第2図(alは動作タイムチャート図、第2図(′b)
は本発明の駆動回路ブロック図である。
Figure 2 (al is an operation time chart, Figure 2 ('b)
FIG. 2 is a block diagram of a drive circuit according to the present invention.

第2図(alに示すように、電圧制御信号14を電源に
入力すると図示のごとく昇圧の立上がりが遅れる。その
ためプランジャーマグネット4の駆動はton時間遅ら
す必要がある。また電圧制御信号14をオフとして降圧
せしめるとき、駆動信号15をt off時間遅らせて
オフとすると電源の降圧速度を速めることができる。
When the voltage control signal 14 is input to the power supply as shown in FIG. When lowering the voltage as shown in FIG.

本発明は上記動作を同一の制御信号で達成せしめるもの
である。
The present invention accomplishes the above operations using the same control signal.

第2図(b)において、 10は電池Eを電圧VmおよびVh (Vm>Vh)に
昇圧可能な昇圧回路であって、電圧制御信号14オフ(
Lレベル)のとき抵抗R1とR2とによって電圧vhを
発生し、電圧制御信号14オン(Hレベル)のときダイ
オードDlがカットオフとなって電圧Vmを発生するも
の、 TRIはトランジスタで、パワトランジスタTR2を電
流駆動し、プランジャーマグネット4を駆動するもの、 R3はコンデンサCとともにTRIの導通を遅延せしめ
第1の遅延手段を形成するもの、R4は電圧制御信号1
4がオフのとき、コンデンサCとともに第2の遅延手段
を形成するもの、である。
In FIG. 2(b), 10 is a booster circuit capable of boosting the battery E to voltages Vm and Vh (Vm>Vh), and a voltage control signal 14 is turned off (
When the voltage control signal 14 is on (L level), the voltage vh is generated by the resistors R1 and R2, and when the voltage control signal 14 is on (H level), the diode Dl is cut off to generate the voltage Vm. TRI is a transistor, and is a power transistor. TR2 is current-driven to drive plunger magnet 4; R3 is to delay the conduction of TRI together with capacitor C and forms a first delay means; R4 is voltage control signal 1;
4, which together with capacitor C form a second delay means when it is off.

なお電圧制御信号14のパルス幅は駆動信号15のパル
ス幅T1+ton以上のパルス幅を有するものである。
Note that the pulse width of the voltage control signal 14 is greater than or equal to the pulse width T1+ton of the drive signal 15.

動作は以下の通りである。The operation is as follows.

まず印字動作中は電圧制御信号14がオフ状態で、昇圧
回路10の出力は電圧vhが発生しており、印字ヘッド
2はこの電圧によって選択動作されている。
First, during the printing operation, the voltage control signal 14 is in an off state, the voltage vh is generated as the output of the booster circuit 10, and the print head 2 is selectively operated by this voltage.

一行の印字が終了すると電圧制御信号14がHレベルと
なり、ダイオードD1がオフとなって昇圧回路10はV
mに昇圧を開始する。
When one line of printing is completed, the voltage control signal 14 becomes H level, the diode D1 is turned off, and the booster circuit 10 is set to V
Start pressurizing to m.

この電圧制御信号14によりダイオードD2がカットオ
フとなり、R3・Cの時定数に基づき、TRIはton
時間遅れてオンとなる。
This voltage control signal 14 causes the diode D2 to be cut off, and based on the time constant of R3・C, TRI becomes ton.
It turns on after a time delay.

電圧制御信号14がオフ(Lレベル)となると降圧を開
始するが、TRIは時定数R2・Cによりtoff時間
遅れてオフとなり、そのため昇圧回路の負荷容量(図示
せず)に充電している電荷の放出が行われて電圧降圧速
度を速めることができる。
When the voltage control signal 14 turns off (L level), step-down starts, but TRI turns off after a toff time delay due to the time constant R2・C, so that the charge stored in the load capacitance (not shown) of the step-up circuit is reduced. can be released to increase the voltage step-down speed.

以上実施例にみるごとく、電圧制御を行って電源を1系
統にするとともに、節易な遅延手段により電圧制御に対
応して駆動せしめる駆動回路を提供することができる。
As seen in the embodiments described above, it is possible to provide a drive circuit that performs voltage control and uses a single power supply system, and that drives in response to voltage control using a simple delay means.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明は電源を1系統にする簡易
な駆動回路を提供するもので、プリンタ等におけるコス
ト低下の効果が大である。
As described above, the present invention provides a simple drive circuit that uses only one power supply system, and is highly effective in reducing costs in printers and the like.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の原理説明図、 第2図(a)は動作タイムチャート図、第2図(b)は
実施例の駆動回路ブロック図、第3図(a)はプリンタ
のエスケープ/アプローチ動作説明図であって、(1)
は前面図、(2)は側断面図、(3)は動作タイムチャ
ート図、 第3図(b)は従来の駆動回路ブロック図、である。図
中、 1はプラテン、     2は印字ヘッド、3は保持機
構、 4はプランジャーマグネット、 5はVm昇圧回路、   6,8はスイッチ、7はvh
昇圧回路、  9は電池、 lOは電源、     11は電圧制御手段、12は第
1の遅延手段、13は第2の遅延手段、R1〜R4は抵
抗、   Cはコンデンサ、TRI〜TR3はトランジ
スタ、 D1〜D2はダイオード、である。
Fig. 1 is a diagram explaining the principle of the present invention, Fig. 2 (a) is an operation time chart, Fig. 2 (b) is a block diagram of the drive circuit of the embodiment, and Fig. 3 (a) is the escape/approach of the printer. It is an operation explanatory diagram, (1)
3 is a front view, (2) is a side sectional view, (3) is an operation time chart, and FIG. 3(b) is a conventional drive circuit block diagram. In the figure, 1 is a platen, 2 is a print head, 3 is a holding mechanism, 4 is a plunger magnet, 5 is a Vm booster circuit, 6 and 8 are switches, and 7 is a vh
Booster circuit, 9 is a battery, IO is a power supply, 11 is a voltage control means, 12 is a first delay means, 13 is a second delay means, R1 to R4 are resistors, C is a capacitor, TRI to TR3 are transistors, D1 ~D2 is a diode.

Claims (2)

【特許請求の範囲】[Claims] (1)電圧制御可能な電源に接続され、それぞれ駆動期
間および駆動電圧が異なる2組の電気部材を駆動する駆
動回路であって、 前記電源を第1の電気部材の駆動電圧に設定して駆動せ
しめるとともに、電圧制御信号(14)入力により第2
の電気部材の駆動電圧に昇圧せしめる手段(11)と、 前記電圧制御信号の立ち上がりおよび立ち下がりをそれ
ぞれ遅延せしめる第1(12)、第2(13)の遅延手
段を設け、第1、第2の遅延手段により該電圧制御信号
を遅延せしめて第2の電気部材を駆動する手段とを備え
ることを特徴とする駆動回路。
(1) A drive circuit that is connected to a voltage-controllable power supply and drives two sets of electrical members each having a different drive period and drive voltage, the drive circuit being driven by setting the power supply to the drive voltage of the first electrical member. At the same time, the second voltage control signal (14) is input.
means (11) for boosting the drive voltage of the electrical member; and first (12) and second (13) delay means for respectively delaying the rise and fall of the voltage control signal; and means for delaying the voltage control signal by the delay means to drive the second electric member.
(2)1組のコンデンサを設け、前記電圧制御信号がオ
ンのとき第1の抵抗を介して該電源より該コンデンサを
充電する第1の遅延手段および該電圧制御信号がオフの
とき第2の抵抗を介して該コンデンサを放電する第2の
遅延手段であることを特徴とする特許請求の範囲第(1
)項記載の駆動回路。
(2) A set of capacitors is provided, a first delay means for charging the capacitor from the power source via a first resistor when the voltage control signal is on, and a second delay means for charging the capacitor from the power supply when the voltage control signal is off. Claim 1 is characterized in that it is a second delay means for discharging the capacitor via a resistor.
) The drive circuit described in section 2.
JP20751685A 1985-09-19 1985-09-19 Drive circuit Pending JPS6266974A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20751685A JPS6266974A (en) 1985-09-19 1985-09-19 Drive circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20751685A JPS6266974A (en) 1985-09-19 1985-09-19 Drive circuit

Publications (1)

Publication Number Publication Date
JPS6266974A true JPS6266974A (en) 1987-03-26

Family

ID=16541007

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20751685A Pending JPS6266974A (en) 1985-09-19 1985-09-19 Drive circuit

Country Status (1)

Country Link
JP (1) JPS6266974A (en)

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