JPS6243261A - Synthesizing device for picture signal - Google Patents

Abstract

PURPOSE:To attain the dynamic synthesization of fine pictures with a picture display device by providing plural coincidence detecting parts which compare the output of each color register with the output of each image memory to deliver the coincidence signal and a selecting part which selects one of the image memory outputs to use it as the output signal to be applied to the display device. CONSTITUTION:A picture signal synthesizing device is provided with color registers 21-23, the coincidence detecting parts 31-33, a selecting part 40 and a background register 51. An address (picture element to be displayed) is designated by an address signal 3. Then the picture signals corresponding to the designated addresses are delivered from image memories 11-13 respectively. These delivered picture signals are compared with the contents of the registers 21-23 through the parts 31-33 respectively. Here the coincidence signals 31a-33a delivered from the parts 31-33 deliver the selection signals 42a-45a through a priority processing part 41 according to the prescribed order in order to open just one of gate parts 42-45.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image signal synthesis device for superimposing a plurality of image information and displaying the same on a CRT or the like in an image display device.

〔overview〕

The present invention provides an image signal synthesizing device for synthesizing image information stored in a plurality of image memories, in which, as a synthesizing means, each of the image memories, excluding at least one, has a lower priority order for the stored image information. A color register that holds a reference signal for selecting an image, a match detection section that compares the output of this color register with the output of the image memory and outputs a match signal, and a match detection section that outputs a match signal from the match detection section. Based on this, it includes a selection section that selects one output from each image memory and uses it as an output signal, thereby making it possible to perform high-speed composite display of images and dynamically realize the composition of fine images. It is.

[Conventional technology]

Conventionally, in order to display multiple pieces of image information in a superimposed manner, (al) software processing calculates the signal value to be displayed for each pixel on a display device such as a CRT based on the multiple pieces of image information; A possible method for storing this information in an image memory is to prepare a dedicated image memory for each piece of image information, and to switch the image memory to be read out as a display signal for each predetermined display area.

FIG. 5 is a block diagram showing an example of a conventional image signal synthesis device using the (bl method. In FIG. 5, 1 and 2 are image memories, and 3 is an address signal for reading from the image memory. , 4.5 is an enable signal for selecting an image memory, and 6 is a CRT. To display a composite image, an address signal is updated and image signals are sequentially read out from the image memory 1.2. The enable signal 4.5 is controlled so that only image memory 1 is enabled in the address section, and only image memory 2 is enabled in other sections.

[Problem that the invention seeks to solve]

However, the above method (a) requires time for software processing and has many problems in high-speed display. Furthermore, in the fbl method described above, the display area for each image memory is specified in advance, as shown in FIG. It is not suitable for overlapping detailed images.

For this reason, there is a need for an image synthesis technique that can be displayed at high speed and that can dynamically superimpose even fine images depending on the content of the images.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and provide an image signal synthesis device that can perform composite display of multiple images at high speed and dynamically select images to be displayed based on the contents of each image. There is a particular thing.

[Means for solving problems]

An image signal synthesizing device of the present invention includes a plurality of rewritable image memories each storing predetermined image information, and a synthesizing means for synthesizing the outputs of these image memories according to a predetermined procedure. In,
The synthesizing means is provided corresponding to each of the image memories other than at least one of the image memories, and receives a reference signal for selecting a lower image in the priority order of the image information stored in each corresponding image memory. a plurality of rewritable color registers that hold , a plurality of match detection units that compare the output of each of the color registers with the output of each of the image memories and output a match signal, and a match detection unit that outputs a match signal from each of the match detection units. The present invention is characterized in that it includes a selection section that selects one of the outputs of the image memories, based on the signal, and outputs it as an output signal to the display device.

Further, in the image signal synthesis device of the present invention, it is preferable that the image memory not provided with a corresponding color register comprises a rewritable background register that holds background color information inputted from the outside.

Further, in the image signal synthesis device of the present invention, the selection section selects as an output signal the output of an image memory or a background register that does not have a corresponding color register when all the coincidence signals output from the coincidence detection section are true. It is preferable.

[Function] According to the present invention, image information with a predetermined priority is stored in an image memory, and each color register selects an image with a lower priority in the image information stored in the corresponding image memory. A transparent signal as a reference signal is stored, and a coincidence detection section compares this transparent signal with the output of the image memory, and if they match, outputs a coincidence signal.

The selection section calculates the logic of these match signals and selects the output from the image memory with a higher priority among the image memories that do not output a match signal as the output signal to the display device. It is possible to select and output the image with the highest priority among the selected image information. Moreover, the transparent signal can be arbitrarily specified from the outside for each image, and as a result, it is possible to speed up image synthesis and make fine image synthesis more dynamic.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a first embodiment of the present invention. In this embodiment, three rewritable color images are stored that correspond to three rewritable image memos January L12.13 and the image memory 11.12.13, respectively, and store transparent signals designated in advance from the outside. Register 2122.23
, three one-defeat detection units 31.32.33 that detect a match between the output of each image memo January 1.12.13 and the contents of the corresponding color registers 21.22.23, and the background color. Based on the rewritable background register 51 that holds information and the one-defeat signals 31a, 32a, and 33a output from the three match detection units 31, 32, and 33, the above image memo of January 1, 12, 13 is determined. Output and background register 51
The selection section 40 selects one of the contents of the above and outputs it as an output signal 40a, and this selection section 40 selects one of the contents of the above-mentioned coincidence signal 31 outputted from the three coincidence detection sections 31, 32, and 33 as an output signal 40a.
It is configured such that when all of a, 32a, and 33a are true, the contents of the background register 51 are outputted as the output signal 40a. In FIG. 1, 3 is an address signal for specifying the read address of each image memory IL 12, 13, 6 is an externally connected CRT for displaying the image signal selected by the selection section, and 7 is
1, 72, 73, and 74 are the color registers 2 from outside, respectively.
This is a signal line for storing signals in 1.22.23 and the background register 51.

Furthermore, in this embodiment, the selection unit 40 includes the matching detection units 31 .
32. One loss signal 31a, 32a output from 33,
33a, selection signals 42a, 43a, 44 for selecting only the output of the image memory with the highest priority other than the background register 51 or the transparent signal.
a, 45a, and selection signals 42a, 43a, 44a from this priority processing unit 41.
, corresponding to 45a, Image Memo January 1112.13
and the output signal of the background register 51.
It consists of gate parts 42, 43, 44, and 45 that control invalidation.

The feature of the present invention is that in FIG. 1, the color register 2L 2
2.23, three match detection sections, 32.33, selection section 4o and background register 51 are provided.

Next, the operation of this embodiment will be explained.

In FIG. 1, image memories 1112 and 13 each store image information, and a color register 2
1, 22, and 23 respectively have image memories 1112.
The signal value that should be used as a transparent signal for each image stored in 13 is
Further, it is assumed that the background register 51 has already stored a signal to be displayed when the output signals of all the image memories are equal to their respective transparent signals. It is also assumed that the image memories 11, 12, and 13 are assigned priorities in this order.

Here, when addresses (pixels to be displayed) on the image memory are designated by the address signal 3, image signals corresponding to the designated addresses are output from the image memories 11, 12, and 13, respectively. Each of the output image signals is compared with the contents of the color register 21, 22, 23 in the coincidence detector 31, 32, 33, respectively. Here, the coincidence signal 31a output from the coincidence detection section 31, 32, 33
, 32a, and 33a are gate units 42, 43, and 44 based on a predetermined order in the priority processing unit 41.
．． Open only one of 45 (selection signal 42a,
Outputs 43a, 44a and 45a. Note that the ranking here refers to a predetermined priority order for the image memory.

This lll for image memory 1.12.13 in the table
A truth table of the input/output relationship of the priority processing unit 41 is shown in the case where the i-th order of priority is specified.

In the table, the numbers in the input column indicate the matching signal (input signal of the priority processing unit 41), and the numbers in the output column indicate the selection signal.
Logic "l" indicates a match for input and validity for output, and "0" indicates non-match for manual input and invalidity for output. That is, when the coincidence signal 31a is logic "0" and therefore the output signal is not a transparent signal, the selection signal 42a is
becomes effective, gate 42 opens, and image memo January 1
The image signal from the selector 40 becomes the output signal 40a of the selection section 40.

Similarly, when the match signal 31a is logic "1" and the match signal 32 is logic "0", the image signal from the image memory 12 becomes the output signal 40a, and both match signals 31 and 32 are logic "1", the match signal 33 is logic "0", the image signal from Image Memo January 3 becomes the output signal 40a,
Match signals 31a, 32a, 33a are all logic rl
In the case of J, the image signal from the background register 51 becomes the output signal 40a.

Image memo January 1, 12, 13 due to the operations described above.
It is possible to select the signal with the highest priority among the outputs of the transparent signal. Thereafter, by updating the address signal 3 and sequentially setting addresses corresponding to all pixels of the display device, the three images stored in the image memory 11, 12, and 13 are processed according to the predetermined priority order. A combined image signal can be obtained.

FIGS. 2(a), (b), and [C1 are examples of images stored in the image memories 11, 12, and 13, respectively, and A-
M indicates the image signal (color). Figure 3+a) shows the case where the content of the color register 21 is "C" and the content of the color register 22 is rFJ (the content of the color register 23 is arbitrary; can be omitted)
This is a composite image of the images shown in FIGS. 2(a) to (C1).

In addition, FIG. 3 (bl is a composite image when the contents of the color registers 21.22 are rCJ and rEJ, respectively, and FIG. 3 (C) is the composite image when the contents of the color registers 21.22 are respectively "
A'' is a composite image when rFJ is used.

In the first embodiment shown in FIG. 1, when the output signals of all the image memories are respective transparent signals (input logic rl 11J shows an example in which the contents of the background register 51 are used as the display output signal) However, as in the second embodiment shown in FIG. The background register 51 in the figure, the color register 23 corresponding to the image memo January 3 with the lowest priority, the match detection section 33, and the gate section 45 are no longer necessary.In other words, this embodiment can be used as a simple image composition device. Useful.

Furthermore, although the number of image memories is three in the above embodiment, it is clear that the same effect can be obtained even if the number is two or four or more.

〔Effect of the invention〕

As described above, according to the present invention, the compositing means includes a color register that holds a reference signal for selecting a lower priority image of image information stored in image memories other than at least one; A coincidence detection section compares the output of this color register with the output of the image memory and outputs a coincidence signal, and based on the coincidence signal outputted from this coincidence detection section, selects one of the outputs of each image memory and outputs an output signal. By including a selection section that allows multiple images to be synthesized pixel by pixel, it is possible to dynamically synthesize fine images, and by externally controlling the contents of the color register, it is possible to synthesize multiple images pixel by pixel. This has the effect of making it easier to change the image signals to be combined and the content of the synthesis, that is, the image information displayed on the CRT.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention. FIGS. 2(al) to (C) are explanatory views showing examples of images to be synthesized. FIGS. 3fa) to (C) are explanatory views showing examples of combined images according to the present invention. FIG. 4 is a block diagram showing a second embodiment of the present invention. FIG. 5 is a block diagram showing a conventional example. l, 2... image memory, 3... address signal,
4.5... Enable signal, 6... CRT, 11.
12.13... Image memory, 21.22.23.
...color register, 31.32.33...match detection section,
31a, 32a, 33a...-defeat signal, 40
．． 40b... selection section, 40a... output signal, 41.
...Priority processing section, 42.43.44.45...Gate section, 42a, 43a, 44a, 45a...Selection signal, 51...Background register 71.72.73.
74...Signal line. Example Fig. 2 Embodiment Fig. 3 Conventional example Fig. 15

Claims (3)

[Claims] (1) An image signal synthesis device comprising a plurality of rewritable image memories each storing predetermined image information, and a synthesis means for synthesizing the outputs of these image memories according to a predetermined procedure, wherein the synthesis means is , a plurality of reference signals provided corresponding to the image memories other than at least one of the image memories, and holding reference signals for selecting lower priority images of the image information stored in the corresponding image memories; a rewritable color register; a plurality of coincidence detection units that compare the outputs of each of the color registers with the outputs of each of the image memories and output a coincidence signal; and based on the coincidence signals output from each of the coincidence detection units, An image signal synthesis device comprising: a selection section that selects one of the outputs of each image memory and outputs it as an output signal to a display device. (2) The image signal synthesis device according to claim (1), wherein the image memory without a corresponding color register comprises a rewritable background register that holds background color information input from the outside. (3) Claim (1) in which the selection section uses the output of an image memory or background register without a corresponding color register as an output signal when all the coincidence signals output from the coincidence detection section are true. The image signal synthesis device according to item (2) or item (2).