JPS6227481B2 - - Google Patents
Info
- Publication number
- JPS6227481B2 JPS6227481B2 JP52150573A JP15057377A JPS6227481B2 JP S6227481 B2 JPS6227481 B2 JP S6227481B2 JP 52150573 A JP52150573 A JP 52150573A JP 15057377 A JP15057377 A JP 15057377A JP S6227481 B2 JPS6227481 B2 JP S6227481B2
- Authority
- JP
- Japan
- Prior art keywords
- weight
- ceramic
- multilayer circuit
- circuit board
- firing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000000919 ceramic Substances 0.000 claims description 20
- 239000004020 conductor Substances 0.000 claims description 14
- 238000000034 method Methods 0.000 claims description 14
- 238000010304 firing Methods 0.000 claims description 13
- 239000012212 insulator Substances 0.000 claims description 11
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 10
- 239000000463 material Substances 0.000 claims description 8
- 239000000758 substrate Substances 0.000 claims description 8
- 238000004519 manufacturing process Methods 0.000 claims description 6
- 239000000203 mixture Substances 0.000 claims description 6
- 229910018072 Al 2 O 3 Inorganic materials 0.000 claims description 5
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- 239000011812 mixed powder Substances 0.000 claims description 4
- 238000007639 printing Methods 0.000 claims description 4
- 239000005388 borosilicate glass Substances 0.000 claims description 3
- KZHJGOXRZJKJNY-UHFFFAOYSA-N dioxosilane;oxo(oxoalumanyloxy)alumane Chemical compound O=[Si]=O.O=[Si]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O KZHJGOXRZJKJNY-UHFFFAOYSA-N 0.000 claims description 3
- 239000002241 glass-ceramic Substances 0.000 claims description 3
- 229910052863 mullite Inorganic materials 0.000 claims description 3
- 229910052839 forsterite Inorganic materials 0.000 claims description 2
- 239000011810 insulating material Substances 0.000 claims description 2
- HCWCAKKEBCNQJP-UHFFFAOYSA-N magnesium orthosilicate Chemical compound [Mg+2].[Mg+2].[O-][Si]([O-])([O-])[O-] HCWCAKKEBCNQJP-UHFFFAOYSA-N 0.000 claims description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- DOIRQSBPFJWKBE-UHFFFAOYSA-N dibutyl phthalate Chemical compound CCCCOC(=O)C1=CC=CC=C1C(=O)OCCCC DOIRQSBPFJWKBE-UHFFFAOYSA-N 0.000 description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 4
- 229910052681 coesite Inorganic materials 0.000 description 3
- 229910052593 corundum Inorganic materials 0.000 description 3
- 229910052906 cristobalite Inorganic materials 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 229910052682 stishovite Inorganic materials 0.000 description 3
- 229910052905 tridymite Inorganic materials 0.000 description 3
- 229910001845 yogo sapphire Inorganic materials 0.000 description 3
- VXQBJTKSVGFQOL-UHFFFAOYSA-N 2-(2-butoxyethoxy)ethyl acetate Chemical compound CCCCOCCOCCOC(C)=O VXQBJTKSVGFQOL-UHFFFAOYSA-N 0.000 description 2
- 239000001856 Ethyl cellulose Substances 0.000 description 2
- ZZSNKZQZMQGXPY-UHFFFAOYSA-N Ethyl cellulose Chemical compound CCOCC1OC(OC)C(OCC)C(OCC)C1OC1C(O)C(O)C(OC)C(CO)O1 ZZSNKZQZMQGXPY-UHFFFAOYSA-N 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 2
- WUOACPNHFRMFPN-UHFFFAOYSA-N alpha-terpineol Chemical compound CC1=CCC(C(C)(C)O)CC1 WUOACPNHFRMFPN-UHFFFAOYSA-N 0.000 description 2
- 230000008602 contraction Effects 0.000 description 2
- SQIFACVGCPWBQZ-UHFFFAOYSA-N delta-terpineol Natural products CC(C)(O)C1CCC(=C)CC1 SQIFACVGCPWBQZ-UHFFFAOYSA-N 0.000 description 2
- 229920001249 ethyl cellulose Polymers 0.000 description 2
- 235000019325 ethyl cellulose Nutrition 0.000 description 2
- 238000002156 mixing Methods 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 229940116411 terpineol Drugs 0.000 description 2
- PRXRUNOAOLTIEF-ADSICKODSA-N Sorbitan trioleate Chemical compound CCCCCCCC\C=C/CCCCCCCC(=O)OC[C@@H](OC(=O)CCCCCCC\C=C/CCCCCCCC)[C@H]1OC[C@H](O)[C@H]1OC(=O)CCCCCCC\C=C/CCCCCCCC PRXRUNOAOLTIEF-ADSICKODSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000012670 alkaline solution Substances 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000004094 surface-active agent Substances 0.000 description 1
Landscapes
- Inorganic Insulating Materials (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Conductive Materials (AREA)
Description
本発明はセラミツク多層回路基板の製法に関す
る。
従来のセラミツク多層回路基板の製法は焼成方
法や焼成回路によつて次の３通りに大別される。
第一は、未焼成の状態で多層構造体を形成し、こ
れから一回の焼成によりセラミツク多層回路基板
を製造する方法であり、第二は、ベースとなる、
焼成したセラミツク基板上に導体と絶縁体を印刷
し、一層毎に焼成する操作を繰り返して多層化す
る方法であり、第三は焼成したセラミツク基板上
に導体と絶縁体を交互に印刷し、多層化を行なつ
た後これらを同時に焼成してセラミツク多層回路
基板を製造する方法である。
これらの３通りの方法にはそれぞれ一長一短は
あるが、第三の方法は焼成回数が少なく、またベ
ースとなる基板をもつため製造されたセラミツク
多層回路基板の寸法精度が高くかつ機械的強度が
大きいという利点をもつ。しかし、この方法の欠
点は、焼成の際に、各層の信号線を接続するため
の導通孔であるバイアホールとそれを囲む絶縁体
の境界にクラツクが発生し、バイアホールと信号
層間の断線の原因となり易いことである。この原
因は、本発明者等の解明によれば、導体と絶縁体
の焼成時における収縮のモードの相違によるもの
である。即ち、絶縁体が、例えば800℃前後の焼
成温度で溶融状態となつて収縮を起さなくなつて
も、導体の方は更に高温でも依然として収縮を起
すため、バイアホールと絶縁体の境界にクラツク
が発生するものと思われる。
従つて、本発明の目的は、焼成したセラミツク
基板（例えば、アルミナ、ムライト、フオルステ
ライトなどの基板）上に導体と絶縁体を交互に印
刷して多層化した後これを同時に焼成することに
よりセラミツク多層回路基板を製造する従来方法
の上述の欠点を排除し、クラツクの発生を防止し
てバイアホールと信号線間の信頼性を高めると共
に、寸法精度及び機械的強度の高いセラミツク多
層回路基板を製造する方法を提供することにあ
る。
本発明に従えば、焼成したアルミナ、ムライト
又はフオルステライトから成るセラミツク基板上
に導体と絶縁体を交互に印刷して多層化した後こ
れを同時に焼成することによりセラミツク多層回
路基板を製造するに当り、バイアホール用導体材
料として組成がB2O34〜40重量％、SiO240〜95重
量％及びAl2O31〜10重量％であるB2O3−SiO2−
Al2O3混合物粉末を約５〜20重量％含有する金属
ペースト用い、絶縁体材料としてアルミナ50重量
％とホウケイ酸ガラス50重量％からなるガラスセ
ラミツクを用いることから成るセラミツク多層回
路基板の製法が提供される。
前記B2O3−SiO2−Al2O3混合粉末の好ましい組
成はB2O34〜40重量％、SiO240〜95重量％及び
Al2O31〜10重量％である。
このようにB2O3−SiO2−Al2O3混合粉末を添加
した金属ペーストを用いることによつて導体の収
縮モードが絶縁体の収縮モードに近づき、焼成の
過程でのクラツクの発生が効果的に防止されるの
である。前記金属ペースト中のB2O3−SiO2−
Al2O3混合粉末の量が５重量％未満の場合には、
クラツク防止効果は認められるものの、実用上満
足すべきもの、例えば目視でクラツクの発生が認
められず、信号線とバイアホールの信頼性が高
く、かつ、酸及びアルカリ溶液にセラミツク多層
回路基板を浸漬しても劣化が起らない状態のもの
が得られないので好ましくなく、また20重量％を
越える場合には導体回路の電気抵抗が高くなり、
伝送速度の遅れが大きくなつて好ましくない。
以下に本発明の実施例を説明する。
実施例 １〜８
97％アルミナ基板上に、第１表に示す様々な組
成の導体ペースト基材100重量部（予じめボール
ミルで充分混合）にエチルセルロース6.5重量
部、界面活性剤（ゾルビタントリオレート、日本
油脂OP−85R）1.0重量部、ジブチルフタレート
3.5重量部、ブチルカルビトールアセテート8.0重
量部及びテルピネオール28.0重量部を配合して調
製した導体ペースト材料と、アルミナ50.0重量
部、ホウケイ酸ガラス50.0重量部、エチルセルロ
ース7.5重量部、ジブチルフタレート8.0重量部、
ブチルカルビトールアセテート15.0重量部及びテ
ルピネオール15.0重量部を配合して調製した絶縁
体ペースト材料（ガラス−セラミツクペースト）
をスクリーン印刷法により印刷して多層化を行な
い、信号層を５層もつ回路基板未焼成体を作成し
た。この多層回路基板未焼成体を900℃で15分間
焼成して、セラミツク多層回路基板を得た。
このようにして製造したセラミツク多層回路基
板について、
(1) クラツクや剥離などの外観、
(2) 水中（水温100℃）で２時間煮沸した時の吸
水率、及び
(3) バイアホールの導体抵抗
の試験を行なつた。結果は第１表に示す通りであ
り、実施例１〜８のいずれのものも良好であつ
た。
比較例 １〜４
上記実施例で用いた導体ペースト基材に代えて
第１表に示す様々な組成の基材を用いた以外は上
記実施例と同様にしてセラミツク多層回路基板を
製造し、それについて試験を行なつた。結果は第
１表に示す通りであり、いずれも外観が不良であ
り、吸水率も0.8以上と大きく、導体抵抗も高か
つた。
The present invention relates to a method for manufacturing a ceramic multilayer circuit board. Conventional manufacturing methods for ceramic multilayer circuit boards are roughly divided into the following three types depending on the firing method and firing circuit.
The first method is to form a multilayer structure in an unfired state and then manufacture a ceramic multilayer circuit board by firing it once.
The third method is to print conductors and insulators on a fired ceramic substrate and repeat the process of firing each layer to create a multilayer structure.The third method is to print conductors and insulators alternately on a fired ceramic substrate to create a multilayer structure. In this method, a ceramic multilayer circuit board is manufactured by simultaneously firing these materials after chemical conversion. Each of these three methods has its advantages and disadvantages, but the third method requires fewer firings, and because it has a base substrate, the manufactured ceramic multilayer circuit board has high dimensional accuracy and high mechanical strength. It has the advantage of However, the disadvantage of this method is that during firing, cracks occur at the boundary between the via hole, which is a conductive hole for connecting signal lines in each layer, and the insulator surrounding it, resulting in disconnection between the via hole and the signal layer. This can easily be the cause. According to the findings of the present inventors, this is due to the difference in the mode of contraction during firing of the conductor and insulator. In other words, even if the insulator becomes molten and no longer shrinks at a firing temperature of around 800°C, the conductor still shrinks even at higher temperatures, so cracks may occur at the boundary between the via hole and the insulator. is expected to occur. Therefore, an object of the present invention is to create a ceramic material by alternately printing conductors and insulators on a fired ceramic substrate (for example, a substrate made of alumina, mullite, forsterite, etc.) to form a multilayer structure, and then firing them simultaneously. Eliminates the above-mentioned drawbacks of the conventional method of manufacturing multilayer circuit boards, prevents the occurrence of cracks, increases reliability between via holes and signal lines, and manufactures ceramic multilayer circuit boards with high dimensional accuracy and mechanical strength. The goal is to provide a way to do so. According to the present invention, a ceramic multilayer circuit board is produced by alternately printing conductors and insulators on a ceramic substrate made of fired alumina, mullite, or forstellite to form a multilayer, and then firing them simultaneously. , B2O3 - SiO2- whose composition is 4 to 40% by weight of B2O3, 40 to 95% by weight of SiO2 , and 1 to 10% by weight of Al2O3 as a conductor material for via holes .
A method for manufacturing a ceramic multilayer circuit board is disclosed, which comprises using a metal paste containing about 5 to 20% by weight of Al 2 O 3 mixture powder and glass ceramic consisting of 50% by weight of alumina and 50% by weight of borosilicate glass as an insulating material. provided. The preferred composition of the B2O3 -SiO2 - Al2O3 mixed powder is 4-40% by weight of B2O3 , 40-95% by weight of SiO2 , and
Al2O3 1-10% by weight . As described above, by using a metal paste to which B 2 O 3 -SiO 2 -Al 2 O 3 mixed powder is added, the contraction mode of the conductor approaches that of the insulator, and the occurrence of cracks during the firing process is prevented. It is effectively prevented. B 2 O 3 −SiO 2 − in the metal paste
If the amount of Al 2 O 3 mixed powder is less than 5% by weight,
Although the effect of preventing cracks has been recognized, it is practically satisfactory, for example, no cracks are visually observed, the reliability of signal lines and via holes is high, and ceramic multilayer circuit boards are immersed in acid and alkaline solutions. However, if it exceeds 20% by weight, the electrical resistance of the conductor circuit will increase;
This is undesirable because the delay in transmission speed increases. Examples of the present invention will be described below. Examples 1 to 8 On a 97% alumina substrate, 100 parts by weight of conductor paste base materials of various compositions shown in Table 1 (mixed thoroughly in advance in a ball mill), 6.5 parts by weight of ethyl cellulose, and a surfactant (zorbitan trio) were added. rate, NOF OP-85R) 1.0 parts by weight, dibutyl phthalate
A conductive paste material prepared by blending 3.5 parts by weight, butyl carbitol acetate 8.0 parts by weight, and terpineol 28.0 parts by weight, 50.0 parts by weight alumina, 50.0 parts by weight borosilicate glass, 7.5 parts by weight ethyl cellulose, 8.0 parts by weight dibutyl phthalate,
Insulator paste material (glass-ceramic paste) prepared by blending 15.0 parts by weight of butyl carbitol acetate and 15.0 parts by weight of terpineol.
A green circuit board body having five signal layers was created by printing using a screen printing method to create multiple layers. This multilayer circuit board green body was fired at 900° C. for 15 minutes to obtain a ceramic multilayer circuit board. Regarding the ceramic multilayer circuit board manufactured in this way, (1) external appearance such as cracks and peeling, (2) water absorption rate when boiled in water (water temperature 100°C) for 2 hours, and (3) conductor resistance of via holes. The test was conducted. The results are shown in Table 1, and all of Examples 1 to 8 were good. Comparative Examples 1 to 4 Ceramic multilayer circuit boards were manufactured in the same manner as in the above examples, except that base materials with various compositions shown in Table 1 were used in place of the conductive paste base materials used in the above examples. We conducted tests on the following. The results are shown in Table 1, and all had poor appearance, high water absorption of 0.8 or more, and high conductor resistance.
【表】【table】
Claims (1)
イトから選択されたセラミツクからなるセラミツ
ク基板上に導体と絶縁体を交互に印刷して多層化
した後これを同時に焼成することによりセラミツ
ク多層回路基板を製造するに当り、バイアホール
用導体材料として組成がB2O34〜40重量％、
SiO240〜95重量％及びAl2O31〜10重量％である
B2O3−SiO2−Al2O3混合粉末を約５〜20重量％含
有する金属ペーストを用い、絶縁体材料としてア
ルミナ50重量％とホウケイ酸ガラス50重量％から
なるガラスセラミツクを用いることを特徴とする
セラミツク多層回路基板の製法。1. In producing a ceramic multilayer circuit board by alternately printing conductors and insulators on a ceramic substrate made of fired ceramic selected from alumina, mullite, and forsterite to form a multilayer, and then firing them simultaneously. , the composition is B 2 O 3 4-40% by weight as a conductor material for via holes,
SiO 2 40-95% by weight and Al 2 O 3 1-10% by weight
Use a metal paste containing about 5 to 20% by weight of B 2 O 3 -SiO 2 -Al 2 O 3 mixed powder, and use glass ceramic consisting of 50% by weight of alumina and 50% by weight of borosilicate glass as the insulating material. A method for manufacturing a ceramic multilayer circuit board characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15057377A JPS5484270A (en) | 1977-12-16 | 1977-12-16 | Method of making ceramic multiilayer circuit base board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15057377A JPS5484270A (en) | 1977-12-16 | 1977-12-16 | Method of making ceramic multiilayer circuit base board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5484270A JPS5484270A (en) | 1979-07-05 |
| JPS6227481B2 true JPS6227481B2 (en) | 1987-06-15 |
Family
ID=15499833
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15057377A Granted JPS5484270A (en) | 1977-12-16 | 1977-12-16 | Method of making ceramic multiilayer circuit base board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5484270A (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58100306A (en) * | 1981-12-09 | 1983-06-15 | 松下電器産業株式会社 | Conductive paste |
| JPS6085598A (en) * | 1983-10-18 | 1985-05-15 | 松下電器産業株式会社 | Multilayer circuit board |
| JPS6122685A (en) * | 1984-07-04 | 1986-01-31 | 富士通株式会社 | Conductive paste |
| JPS62155593A (en) * | 1985-12-27 | 1987-07-10 | 松下電器産業株式会社 | Ceramic multilayer circuit board |
| DE68912932T2 (en) * | 1989-05-12 | 1994-08-11 | Ibm Deutschland | Glass-ceramic article and process for its manufacture. |
-
1977
- 1977-12-16 JP JP15057377A patent/JPS5484270A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5484270A (en) | 1979-07-05 |
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