JPS62257750A - Forming method for bump electrode - Google Patents
Forming method for bump electrodeInfo
- Publication number
- JPS62257750A JPS62257750A JP61100112A JP10011286A JPS62257750A JP S62257750 A JPS62257750 A JP S62257750A JP 61100112 A JP61100112 A JP 61100112A JP 10011286 A JP10011286 A JP 10011286A JP S62257750 A JPS62257750 A JP S62257750A
- Authority
- JP
- Japan
- Prior art keywords
- solder
- dispenser
- nozzle
- box body
- bump
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims description 13
- 229910000679 solder Inorganic materials 0.000 claims abstract description 38
- 239000000758 substrate Substances 0.000 abstract description 14
- 230000015572 biosynthetic process Effects 0.000 abstract description 5
- 239000000203 mixture Substances 0.000 abstract description 3
- 230000035485 pulse pressure Effects 0.000 abstract description 2
- 230000002093 peripheral effect Effects 0.000 abstract 1
- 238000002844 melting Methods 0.000 description 5
- 238000000151 deposition Methods 0.000 description 4
- 230000008018 melting Effects 0.000 description 4
- 238000005476 soldering Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 239000011651 chromium Substances 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 239000008151 electrolyte solution Substances 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 125000001475 halogen functional group Chemical group 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
〔概要〕
例えば、リードレスチップまたはフリップチップを実装
する回路基板上に設けるはんだバンプと呼ばれる突起電
極の形成に当たり、ディスペンサのノズルから噴出させ
た一定分量の低融点はんだを用いてハンプ形成をなす方
法が提示される。[Detailed Description of the Invention] [Summary] For example, when forming protruding electrodes called solder bumps on a circuit board on which a leadless chip or flip chip is mounted, a certain amount of low melting point solder is sprayed from a nozzle of a dispenser. A method of humping is presented.
本発明は回路基板またはフリップチップに設けるはんだ
突起の形成に係るバンプ電極の形成方法に関する。The present invention relates to a method for forming bump electrodes for forming solder protrusions on a circuit board or a flip chip.
高速コンピュータ用のIC実装基板は1例えば信号の伝
播遅延時間を短縮することが一つの課題とされており、
このため内部配線距離が大幅に短縮されたフリップチッ
プ構成のLSI素子は、ワイヤボンディングするよりも
寧ろ接続距離をとらないフェースダウンボンディングと
も呼ばれるフリッ ゛ブチツブ接続法によるはん
だ付けが好ましい。One of the challenges for IC mounting boards for high-speed computers is, for example, reducing signal propagation delay time.
For this reason, it is preferable to solder an LSI element with a flip-chip structure, which has a significantly shortened internal wiring distance, by a flip-chip connection method, also called face-down bonding, which does not require much connection distance, rather than wire bonding.
然し、はんだ付は接続には予め、基板またはフリップチ
ップ表面に、はんだバンプと呼ばれる数100μmのは
んだ付は用突起を形成する必要かある。However, in order to make a soldering connection, it is necessary to form soldering protrusions of several 100 μm called solder bumps on the substrate or flip chip surface in advance.
本発明は特にフリップチップ接続法のだめの低融点のは
んだバンプを、均一にかつ高速に行う要請に基づきなさ
れたハンプ形成方法である。The present invention is a hump forming method based on the need to form low-melting point solder bumps uniformly and at high speed, which is particularly the case with flip-chip bonding.
第3図は基板上にフェースダウンさせてフリソブチノブ
接続する基板断面図1図に従って接続構成を説明する。FIG. 3 explains the connection configuration according to FIG. 1, which is a cross-sectional view of the board in which the frisobutty knob is connected face down onto the board.
図において、20は回路基板、21は回路基t7i20
上にはんだ付2すして搭載されたフリップチップ、23
はフリップチップ21のパッド電極、及び24はバッド
電極23と接続する基板20のバンブ′電極である。In the figure, 20 is a circuit board, 21 is a circuit board t7i20
Flip chip mounted with two solders on top, 23
is a pad electrode of the flip chip 21, and 24 is a bump' electrode of the substrate 20 connected to the pad electrode 23.
ハンプ電極24は基板上の他の配線導電膜25より分厚
い暮電層が形成され、該電極24を介してフリ・7プヂ
ソプ21は例えばりフローソルダ法により基板20側に
はんだ付けされる。The hump electrode 24 is formed with a thicker conductive layer than the other wiring conductive film 25 on the substrate, and the free-seven pad 21 is soldered to the substrate 20 side via the electrode 24 by, for example, flow soldering.
はんだ付けを確実とするfこめ該基板20のハンプ電極
24は、予めメッキ法によるはんだ層を形成することが
一般的に行われている。しかしメッキ法によるはんだバ
ンプは5分厚い電極が比較的容易に形成されるが、基板
を電解液の中に浸漬するため基板の表面汚染等の懸念が
ある。To ensure reliable soldering, the hump electrodes 24 of the substrate 20 are generally formed with a solder layer in advance by plating. However, although solder bumps formed using the plating method can relatively easily form electrodes that are 5 thick, there are concerns about surface contamination of the substrate because the substrate is immersed in an electrolytic solution.
他の方法として、薄着法によるハンプ形成方法もあるが
、薄着法は配線導電膜25が形成された基板のハンプ形
成所用面を除いて基板面をマスクせねばならず、またこ
の蒸着マスクは他の導電膜25との短絡もしくは耐圧低
下の原因とならないよう基板マスク間は正確な位置合わ
せ及びはんだの回り込み(ハロー)を防くための密着が
ざnねばならない。Another method is to form a hump using a thin-deposition method, but the thin-deposition method requires masking the substrate surface except for the surface on which the wiring conductive film 25 is formed where the hump is to be formed. Accurate alignment between the substrate masks and tight adhesion to prevent solder from running around (halo) are required to avoid short circuits with the conductive film 25 or a drop in withstand voltage.
前記バンプ形成に係るメッキ法は湿式処理であるため基
板表面を汚染する愁念がある。Since the plating method for forming the bumps is a wet process, there is a concern that the surface of the substrate may be contaminated.
また薄着法はバンプ形成に通ずるはんだ濡れ性のよい合
金等の蒸着に際して、蒸着源とハンプ形成基板(または
フリップチップ)間に前記せる高精度のマスクならびに
マスク合わせを必要とする他、突起の高さを均一に被着
するごとが困TMである等の問題がある。In addition, the thin-deposition method requires a high-precision mask and mask alignment between the vapor deposition source and the hump-forming substrate (or flip chip) when vapor-depositing alloys with good solder wettability that lead to bump formation. There are problems such as difficulty in uniformly applying the coating.
フリップチップ接続法に通ずるはんだハンプ形成に際し
て。For forming solder humps for flip-chip connection methods.
フリップチップまたは回路基板の何れか一方もしくは両
方に形成されるハンプ形成下地電極面に対して溶融はん
だをディスペンサのノズルから噴出させて行う本発明の
バンブ電極の形成方法として前記の問題点を解決するこ
とができる。The above problems are solved by the bump electrode forming method of the present invention, which is performed by jetting molten solder from a nozzle of a dispenser onto the hump-forming base electrode surface formed on either or both of a flip chip or a circuit board. be able to.
フリップチップまたは回路基板の何れか一方もしくは両
方に予め形成された下地電極面に対してその上方からデ
ィスペンサによって溶融はんだを定量的に噴出させてこ
れを前記電極面上に固化させるものであるから、はんだ
組成、及びバンブ電極の突起形状が均一に形成される。This is because a dispenser quantitatively squirts molten solder from above onto a base electrode surface previously formed on either or both of a flip chip or a circuit board, and solidifies it onto the electrode surface. The solder composition and the protrusion shape of the bump electrode are formed uniformly.
この場合5回路基板側へはんだバンプを形成するものと
すれば、ディスペンサによって基板の相対的位置決めを
迅速にするため、該基板は所定の位置決め機構を具える
xYテーブル上に装着すると好都合である。In this case, if solder bumps are to be formed on the 5th circuit board side, it is convenient to mount the board on an xY table equipped with a predetermined positioning mechanism in order to speed up the relative positioning of the board using the dispenser.
本発明の一実施例を第1図と第2図に従って説明する。 An embodiment of the present invention will be described with reference to FIGS. 1 and 2.
第1図はディスペンサの構成を示す断面図、また第2図
はバンプ形成下地電極の断面図である。FIG. 1 is a cross-sectional view showing the structure of the dispenser, and FIG. 2 is a cross-sectional view of the bump-forming base electrode.
ディスペンサ10はアルミニウムからなる筒状の筺体1
2を備え、筺体12内にはバンプ形成に使用する低融点
の共晶はんだ(溶融温度183°C)あるいはインジュ
ウム・錫組成のフレーク状はんだ9が予め挿入蓄積され
る。The dispenser 10 has a cylindrical housing 1 made of aluminum.
2, and a low melting point eutectic solder (melting temperature 183° C.) used for bump formation or a flaky solder 9 having an indium/tin composition is inserted and accumulated in the housing 12 in advance.
筐体I2の外周辺は筐体内のフレーク状はんだを溶融す
るだめの例えばシーズ線ヒータ11が装着される。また
筐体ノズル端13近辺には図示19の温度制御用の熱電
対センサが設けられる。For example, a sheathed wire heater 11 is attached to the outer periphery of the casing I2 to melt the flaky solder inside the casing. Further, a thermocouple sensor 19 for temperature control is provided near the nozzle end 13 of the housing.
筐体12の下端は溶融はんだを噴出するノズル13が形
成される。A nozzle 13 for spouting molten solder is formed at the lower end of the casing 12.
また筒状筺体12の上方ば、ディスペンサのノズル13
から噴出する溶融・はんだ14を適宜定量化して回路基
板15側に供給するためのガス開閉バルブならびに窒素
ガス等の圧力源に連接される (ガス圧力源等は図示さ
れない)。即ら、ガス開閉バルブの抛作によりパルス圧
をディスペンサ10ヘツドに印加するごとにより、ノズ
ル13から噴出する溶融はんだ14の定量化がされるよ
うになっている。Moreover, the nozzle 13 of the dispenser is located above the cylindrical housing 12.
It is connected to a gas on-off valve and a pressure source such as nitrogen gas for appropriately quantifying the melted solder 14 ejected from the solder 14 and supplying it to the circuit board 15 side (the gas pressure source, etc. is not shown). That is, each time a pulse pressure is applied to the head of the dispenser 10 by operating the gas on-off valve, the amount of molten solder 14 ejected from the nozzle 13 is quantified.
ハンプ形成下地電極16を有する回路基板15は。The circuit board 15 has the hump-forming base electrode 16.
直交するXY座標軸に従って取付はステージ18が任意
に移動しうる基板位置合わせ機構を備えるテーブル17
上に固定される。The table 17 is equipped with a substrate positioning mechanism that allows the stage 18 to be moved arbitrarily according to orthogonal XY coordinate axes.
fixed on top.
但し1回路基板15取付はステージ18には基板を少な
くとも100°Cに加熱するヒータが内蔵される。However, when mounting one circuit board 15, the stage 18 has a built-in heater that heats the board to at least 100°C.
第2図はハンプ形成下地電極16の一構成例を示す断面
図であり、基材15上のアルミニウム(AI)配線導電
膜5に対して、クロム(Cr)、銅(Cu)及び金(A
u)を順次積層ずろことによりはんだ濡れ性のよいしか
も接合強度の高いフリップチップ接続に通ずる電極16
が形成される。FIG. 2 is a cross-sectional view showing an example of the structure of the hump-forming base electrode 16, in which chromium (Cr), copper (Cu), and gold (A
By sequentially laminating the electrodes 16, the electrodes 16 lead to a flip-chip connection with good solder wettability and high bonding strength.
is formed.
1;j記実施例は回路基板側に設ける本発明のはんだバ
ンプ電極形成例について述べたが、こればフリップチッ
プから汚出されるパッド電極に対してはんだハンプの突
起形成の場合でも同じである。Although the embodiments 1 and j described the formation of solder bump electrodes of the present invention provided on the circuit board side, the same applies to the formation of solder hump protrusions on pad electrodes that are contaminated from flip chips.
以上説明した本発明のはんだディスペンサによるハンプ
電極の形成方法によれば、特にフリップチップ接続のた
めの低融点のはんだハンプが均一に、かつディスペンサ
と併設される×Yテーブルの位置合わせ機構によっては
んだハングが高速に施行されると云う顕著な効果がある
。According to the method for forming a hump electrode using the solder dispenser of the present invention described above, the low melting point solder hump especially for flip-chip connection can be uniformly formed, and the solder hang can be formed uniformly by the positioning mechanism of the ×Y table installed in conjunction with the dispenser. It has the remarkable effect of being implemented quickly.
第1図は本発明のディスペンサの構成を示す断面図。
第2図はハンプ形成下地電極の断面図。
第3図は従来のフリップチップ接続基板断面図。
図中、5と25は配線導電膜、9ははんだ蓄積部。
10はディスベンザ、13ば10のノズル。
14はノズル噴出の溶融はんだ。
17は基板位置合わせをするテーブル
ハ゛ンフ“什昏或下地宜ネ盆のし六])−面F≧1゛竿
2 回
辺oフリ・ツアー升)フ乃−ε枕幕ネ反」勘〒由ゴト]
第3 匡FIG. 1 is a sectional view showing the configuration of the dispenser of the present invention. FIG. 2 is a cross-sectional view of the hump-forming base electrode. FIG. 3 is a sectional view of a conventional flip-chip connection board. In the figure, 5 and 25 are wiring conductive films, and 9 is a solder accumulation part. 10 is a disbenzer, 13 is a nozzle of 10. 14 is molten solder ejected from a nozzle. 17 is the table half for aligning the board. Goto]
3rd box
Claims (1)
方に形成されるバンプ形成下地電極面に対して溶融はん
だをディスペンサのノズルから噴出させて行うことを特
徴とするバンプ電極の形成方法。1. A method for forming bump electrodes, which comprises jetting molten solder from a nozzle of a dispenser onto a bump-forming base electrode surface formed on either or both of a flip chip or a circuit board.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61100112A JPS62257750A (en) | 1986-04-30 | 1986-04-30 | Forming method for bump electrode |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61100112A JPS62257750A (en) | 1986-04-30 | 1986-04-30 | Forming method for bump electrode |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62257750A true JPS62257750A (en) | 1987-11-10 |
Family
ID=14265284
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61100112A Pending JPS62257750A (en) | 1986-04-30 | 1986-04-30 | Forming method for bump electrode |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62257750A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5297718A (en) * | 1992-06-08 | 1994-03-29 | Eishu Nagata | Soldering method and soldering apparatus |
JP2002151534A (en) * | 2000-11-08 | 2002-05-24 | Mitsubishi Electric Corp | Method for forming electrode and semiconductor device and substrate for use therein |
US6854671B2 (en) | 2002-05-01 | 2005-02-15 | Mitsubishi Denki Kabushiki Kaisha | Nozzle for ejecting molten metal |
JP2008098671A (en) * | 2007-12-21 | 2008-04-24 | Fujitsu Ltd | Method for forming solder bump |
CN110797271A (en) * | 2019-11-06 | 2020-02-14 | 扬州万方电子技术有限责任公司 | BGA chip rapid ball mounting method |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60186027A (en) * | 1984-02-27 | 1985-09-21 | Sanken Electric Co Ltd | Forming method for solder layer and solder supply device used therefor |
JPS60240142A (en) * | 1984-05-14 | 1985-11-29 | Fujitsu Ltd | Solder-bump forming method |
-
1986
- 1986-04-30 JP JP61100112A patent/JPS62257750A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60186027A (en) * | 1984-02-27 | 1985-09-21 | Sanken Electric Co Ltd | Forming method for solder layer and solder supply device used therefor |
JPS60240142A (en) * | 1984-05-14 | 1985-11-29 | Fujitsu Ltd | Solder-bump forming method |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5297718A (en) * | 1992-06-08 | 1994-03-29 | Eishu Nagata | Soldering method and soldering apparatus |
JP2002151534A (en) * | 2000-11-08 | 2002-05-24 | Mitsubishi Electric Corp | Method for forming electrode and semiconductor device and substrate for use therein |
US6500693B2 (en) | 2000-11-08 | 2002-12-31 | Mitsubishi Denki Kabushiki Kaisha | Electrode forming method and bump electrode formable base used therefor |
KR100432325B1 (en) * | 2000-11-08 | 2004-05-22 | 미쓰비시덴키 가부시키가이샤 | Electrode forming method and bump electrode formable base used therefor |
US6854671B2 (en) | 2002-05-01 | 2005-02-15 | Mitsubishi Denki Kabushiki Kaisha | Nozzle for ejecting molten metal |
JP2008098671A (en) * | 2007-12-21 | 2008-04-24 | Fujitsu Ltd | Method for forming solder bump |
JP4558782B2 (en) * | 2007-12-21 | 2010-10-06 | 富士通セミコンダクター株式会社 | Method of forming solder bump |
CN110797271A (en) * | 2019-11-06 | 2020-02-14 | 扬州万方电子技术有限责任公司 | BGA chip rapid ball mounting method |
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