JPS62239549A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS62239549A JPS62239549A JP8302386A JP8302386A JPS62239549A JP S62239549 A JPS62239549 A JP S62239549A JP 8302386 A JP8302386 A JP 8302386A JP 8302386 A JP8302386 A JP 8302386A JP S62239549 A JPS62239549 A JP S62239549A
- Authority
- JP
- Japan
- Prior art keywords
- film
- wiring
- glass
- semiconductor device
- sio
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 8
- 239000011521 glass Substances 0.000 claims abstract description 11
- 238000000034 method Methods 0.000 claims abstract description 8
- 239000011229 interlayer Substances 0.000 claims abstract description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract 12
- 239000000377 silicon dioxide Substances 0.000 claims abstract 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 14
- 229910052782 aluminium Inorganic materials 0.000 claims description 14
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 2
- 229910052698 phosphorus Inorganic materials 0.000 claims description 2
- 239000011574 phosphorus Substances 0.000 claims description 2
- 229910000838 Al alloy Inorganic materials 0.000 claims 1
- 239000011248 coating agent Substances 0.000 claims 1
- 238000000576 coating method Methods 0.000 claims 1
- 238000005229 chemical vapour deposition Methods 0.000 abstract description 3
- 229910052681 coesite Inorganic materials 0.000 abstract 3
- 229910052906 cristobalite Inorganic materials 0.000 abstract 3
- 235000012239 silicon dioxide Nutrition 0.000 abstract 3
- 229910052682 stishovite Inorganic materials 0.000 abstract 3
- 229910052905 tridymite Inorganic materials 0.000 abstract 3
- 230000006837 decompression Effects 0.000 abstract 2
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 6
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000010410 layer Substances 0.000 description 2
- SCPYDCQAZCOKTP-UHFFFAOYSA-N silanol Chemical compound [SiH3]O SCPYDCQAZCOKTP-UHFFFAOYSA-N 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000003621 irrigation water Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体装置特にアルミの多層配線技術の平坦
化技術に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a planarization technology for semiconductor devices, particularly for aluminum multilayer wiring technology.
アルミ配線上の層間絶縁嘩として、減圧ＣＶＤ法による
５ｆｆｌｏ、＋Ｉｌもしくけ、８モル係以下のリンを含
むＰＥＧ噂を、 ６０００Å以上１ｏｏｏｏ Ｋ形成さ
れていること、その上知平坦化を目的として、スピンオ
ングラス１１１ ／＋−形成されていることを特徴とす
る、〔従来の技術〕
従来からアルミの多層配線は行なおれており。As an interlayer insulation layer on the aluminum wiring, PEG containing 5fflo, +Il is also used by low pressure CVD method, and it is rumored that it is formed with a thickness of 6000 Å or more and 100 K, and for the purpose of planarization. [Prior art] Aluminum multilayer wiring has been used for a long time.
層もオーツドックスな方法として箪２１６で説明する。The layering will also be explained in 216 as an orthodox method.
半導体基板上に形成され友、第１アルミ配線層２ａ２．
、ＥＫ膚圧ＣＶＤ法により、４〜ｆ３ モル％のリンを
含むＰ ８ ａ ＠ ２０３を、５０００°Ａ〜１ｏｏ
ｏｏ １デポジン）する。この方法ではわれやすい常圧
ｃｖＤ膜な使う之め、われにくくするため、耐湿性の劣
るＰＳＧｌ！にする必要ｈｔあること、潜圧ＣＶＤのｉ
としてステップカバレージｈ；良好でないことなどの欠
点ｈ”−ある。A first aluminum wiring layer 2a2. formed on the semiconductor substrate.
, P 8 a @ 203 containing 4 to f3 mol% phosphorus was deposited at 5000°A to 1oo by the EK skin pressure CVD method.
oo 1 deposit). This method uses normal pressure CVD membranes that are prone to cracking, but in order to make them less likely to break, PSGl, which has poor moisture resistance, must be used. There is a need to do this for latent pressure CVD.
There are disadvantages such as step coverage h; not good.
そこで、従来例のもつ２つの欠点、（１）＃−を湿性の
悪いＰＳＧ膜、（２）ステップカバレージこれらシ同時
に解決できる方法、これｈ一本発明の目的である。Therefore, it is an object of the present invention to provide a method that can simultaneously solve the two drawbacks of the conventional example: (1) PSG film having poor wettability and (2) step coverage.
単独では、常圧ＣｖＤより、ステップカバレーンの劣る
減圧ＣｖＤＩＩＩと平坦化を助ける之めスピンオングラ
スを複合して使う。When used alone, reduced pressure CvDIII, which has a lower step coverage than normal pressure CvD, and spin-on glass, which helps flattening, are used in combination.
ｌＥＩ図カー、本発明の実施例である。半導体基板１０
１上に形成され几゛真１アルミ配線１０２上に減圧ＣＶ
Ｄ法により形成し之シリケートガ→ス１０３を５ｏｏｏ
Ｌ 形成後、シリコン濃度５％のシラノール・エタノー
ル希釈スピンコードグラス１０４ヲ、スピンコート彫成
［７之。次に、完全に窒素ガス置換されたベーク炉中で
、１００℃３０分さらに、３００℃１ 時間）べ−ｑン
グを行ないスピンオングラスの含まれるエタノール及び
水分を蒸発させ、次に水素を含むｖ？ｌｚ雰囲気の拡散
炉の中で、 ４５０’Ｃ５０分のアニーリングを行ない
グラス化を行なっ九。Figure 1 is an embodiment of the present invention. semiconductor substrate 10
A low pressure CV is formed on the aluminum wiring 102 formed on the aluminum wiring 102.
The silicate gas 103 formed by method D is 5ooo
After L formation, silanol/ethanol diluted spin code glass 104 with a silicon concentration of 5% and spin coat engraving [7. Next, in a baking oven completely purged with nitrogen gas, baking was performed at 100°C for 30 minutes and at 300°C for 1 hour to evaporate the ethanol and water contained in the spin-on glass. ? The material was annealed at 450'C for 50 minutes in a diffusion furnace with an 1z atmosphere to form a glass.
次に、フォトエッチ工程により％第１アルミ配線１０２
上に’ｉ’ＩＡホール１０５を形成、さらにスパッタリ
ング４Ａ置内で、スパッターエツチング後、第２アルミ
配線１０６を形成した。Next, a photoetch process is performed to remove the first aluminum wiring 102.
An 'i' IA hole 105 was formed thereon, and a second aluminum wiring 106 was formed after sputter etching in a sputtering apparatus 4A.
ここで、木うろ明の検討中にスピンオングラスを減圧Ｃ
Ｖ Ｄ −５ｚＣ１２膜１０３上に、形成し、ベーク。Here, while considering Kiuroaki, the spin-on glass was depressurized at C.
V D -5zC12 film 103 is formed and baked.
アニールすることにより、このＢ１Ｏｘ ＩＩ！ １０
３の■尊属により、第１アルミ配線表面にアルミナ膜が
形成されろこと／ｌ”−判明した。その結果をＰＸ３図
に示す。By annealing, this B1Ox II! 10
It was found that an alumina film was formed on the surface of the first aluminum wiring due to the ascendant of No. 3. The results are shown in Figure PX3.
この図より明らかなように、Ｓｉα膜が６０００λ以下
では、Ｖ工Ａホール抵抗が高＜ 、４ｏｏｏＲ以下では
ｏｐｇＮｔ、ているこれは、スピンオングラスを形成す
る熱処叩により、シラノールもしくは工１／、−ルより
発生する一〇Ｈ基あるいけ水と、第１アルミ配線とｈｔ
反応し、アルミナ膜を形［ｉ！ｌ−ているためと考える
。これに対し、 ５ｉＯｔ膜を６０００λ以上形成した
ものは、この膜厚によりシラノールも（ぐはエタノール
を下地の第１アルミ配線に達しないようにガードしてい
る几めと考えられる。、よって本発明な実現するには、
５ｉＣｈ膜としては６０００λ以上必要である。又、一
般にこの膜厚が厚くなるトｖＩＡホールの深さも深くな
るため、ＶＩＡホール部での軍２アルミ配線の断線を心
配する必要めｔある。そこで、本発明では第２アルミ配
線の膜厚１００００λを上限とし友。As is clear from this figure, when the Siα film is less than 6000λ, the V-type A hole resistance is high, and when it is less than 4oooR, it is opgNt. - 10H group or irrigation water generated from the first aluminum wiring and ht
Reacts and forms an alumina film [i! I think it's because it's l-. On the other hand, when a 5iOt film is formed with a thickness of 6000λ or more, this film thickness is considered to be a measure to prevent silanol (and ethanol) from reaching the underlying first aluminum wiring. To achieve this,
6000λ or more is required for a 5iCh film. Additionally, as the film thickness increases, the depth of the VIA hole also increases, so there is a need to worry about disconnection of the aluminum wiring at the VIA hole. Therefore, in the present invention, the film thickness of the second aluminum wiring is set at an upper limit of 10,000λ.
従来例に比べ、ステップカバレージは格段に改善され、
しかも、ＰＳＧの入ならイｓｉ ０２ ｔｌｌも利用で
きろｔめ、耐湿性も著しく向上し之。さらに、ＶＩＡホ
ールのコンタクトは、適性な膜厚設定（６０００〜１０
０００λ）４行なうことにより、非常に安定１．７を値
を得ろことｈｔで１−Compared to the conventional example, step coverage has been significantly improved.
What's more, if you use PSG, you can also use ISI 02 TLL, and the moisture resistance will be significantly improved. Furthermore, the contact of the VIA hole should be set to an appropriate film thickness (6000 to 10
000λ) Obtain a very stable value of 1.7 by doing 4 and 1-
第１図（α）、（ｂ１＃ｉ、本発明の実施例による半導
体装置の断面図、１０４ｈ−８ＯＧ膜。
屓２図（ハ）ｌ、（ｂ）は、従来例による半導体装置断
面図。
第３図は１本実施例のＶＩＡホールに関するデータを示
す図である。
以 ト
出願人 セイコーエプソン株式会社
１１回
２ｏ１
０ 知ω
（ｏｏｏ。FIGS. 1(α) and (b1#i) are cross-sectional views of a semiconductor device according to an embodiment of the present invention, and a 104h-8OG film. FIGS. 2(c) and (b) are cross-sectional views of a semiconductor device according to a conventional example. FIG. 3 is a diagram showing data regarding the VIA hole of this embodiment. Applicant Seiko Epson Corporation 11th 2o1 0
(oooo.
Claims (2)
縁膜として、減圧ＣＶＤ法により６０００Å以上１００
００Å以下のＳｉＯ＿２ガラス膜が形成されており、前
記ＳｉＯ＿２ガラス膜上にシリカ塗布膜が形成されてい
ることを特徴とする半導体装置。(1) As an interlayer insulating film on aluminum-based (including aluminum alloy) wiring, a film with a thickness of 6,000 Å or more and 100
1. A semiconductor device characterized in that a SiO_2 glass film with a thickness of 00 Å or less is formed, and a silica coating film is formed on the SiO_2 glass film.
膜として、重量モル濃度換算で８モル％以下のリンを含
むリンＳｉＯ＿２ガラスを用いることを特徴とする特許
請求の範囲第１項記載の半導体装置。(2) The semiconductor device according to claim 1, characterized in that the SiO_2 glass film formed by the low-pressure CVD method is a phosphorus-SiO_2 glass containing 8 mol% or less of phosphorus in terms of weight molar concentration. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8302386A JPS62239549A (en) | 1986-04-10 | 1986-04-10 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8302386A JPS62239549A (en) | 1986-04-10 | 1986-04-10 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62239549A true JPS62239549A (en) | 1987-10-20 |
Family
ID=13790637
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8302386A Pending JPS62239549A (en) | 1986-04-10 | 1986-04-10 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62239549A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7585546B2 (en) * | 2003-08-11 | 2009-09-08 | Finisar Corporation | Surface passivation and sealing of micro-optics devices for improved performance in harsh environments |
-
1986
- 1986-04-10 JP JP8302386A patent/JPS62239549A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7585546B2 (en) * | 2003-08-11 | 2009-09-08 | Finisar Corporation | Surface passivation and sealing of micro-optics devices for improved performance in harsh environments |
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