JPS62222315A - Dimming device - Google Patents

Abstract

PURPOSE:To perform visually smooth dimming control by integrating the square waveform of a supply voltage waveform and subtracting the integral output from the peak value of the integral waveform to obtain a dimming characteristic signal. CONSTITUTION:A series circuit consisting of two SCRs connected in anti-parallel and an illuminating load L is connected to an AC power source AC, and phases of SCRs are controlled by a control circuit P1 in accordance with a control signal based on a sliding piece K of a fader F to perform the dimming control. In this case, a phase signal generating part U is provided to integrate the square waveform of the supply voltage waveform, and the integral output is subtracted from the peak value of the integral waveform to obtain the dimming characteristic signal. Angles of conduction of SCRs are set by this dimming characteristic signal and said control signal. Thus, the set quantity of the fader F and the quantity of light of the illuminating load L correspond to each other linearly to perform the visually smooth dimming control.

Description

[Detailed description of the invention] Technical field The present invention relates to a light control device.

BACKGROUND TECHNOLOGY Silicon controlled rectifying elements (hereinafter referred to as SCRs) such as so-called triacs and thyristors are used to control the phase of the conduction angle of the SCR to change the amount of power energized to the lighting load.
Dimmer devices that change the amount of light are used for stage lighting in theaters, halls, and banquet halls.

FIG. 8 is a circuit diagram of a light control device using SCR according to the prior art. Two 5CR8II, 81 connected in antiparallel
AC WL@AC is connected to the series circuit between 5CRSI1.2 and the lighting load, and each 5CRSI1. Secondary coils Tll and T12 of the pulse transformer ST are individually connected to the date of S12. A DC voltage is applied to the control circuit pH via the rectifier B, and the sliding piece K of the 7eg F connected to the control circuit pH is changed to change the base potential of the trannostar Qli, which consists of the trannostars Qll and Q12. Activate the pulse generation circuit and set the pulse transformer ST to 0°~180°.
``1llll'' generates a date pulse signal with an arbitrary pulse width, and passes it through the secondary coils T11 and T12 to the 5C
R3I 1. Light control is performed by setting the conduction angle of S12, controlling the energization time of the lighting load, and changing the power energization amount.

However, the light control characteristics obtained by the circuit of the light control device according to the prior art described above are as follows:
The position on the sliding piece of Aigue F is 7, which is 20 on the entire scale of Aigue F.
Between 80% and 80%, the light amount changes significantly, and the scale is 20%.
When the ratio is less than 80% or more than 80%, a characteristic is shown in which the change in the amount of light decreases. This is because although the change in the conduction angle that controls the 5CR8I 1.312 changes linearly in response to the change in the sliding piece of the 7AgF, the power supply voltage given from the AC DAC is a sine wave. It does not correspond linearly to changes in the moving piece. This is because it changes gradually at first, the rate of change increases in the range of 20 to 80% of the target, and the rate of change decreases again after 80%.

Moreover, the load of an incandescent light bulb is 1.3 of the applied voltage.
This is because it is known to be proportional to 38*, which further aggravates the above-mentioned non-correspondence.

For this reason, the operator may use the sliding piece K of the 7Ague F for the purpose of dimming.
Even if the operation is repeated, the change in the amount of light does not follow, and there is a problem that the amount of operation and the amount of change do not match visually. Further, the prior art circuit shown in Figure 8 of the Plate has a problem in that if the power supply voltage of the AC power source 1fiAc fluctuates, the voltage applied to the lighting load also fluctuates.

Purpose The purpose of the present invention is to solve the above-mentioned technical problems, to have a characteristic of visually changing the amount of illumination linearly, and to keep the output voltage constant even if the power supply voltage changes. It is an object of the present invention to provide a light control device that can be controlled as follows.

Embodiment FIG. 1 is a circuit diagram of the one side of the present invention. An alternating current power supply AC is connected to the series circuit between the two 5CRSIs, S2, and the lighting load, which are connected in antiparallel, and the secondary coils Tl, T2 of the pulse transformer ST are connected to the dates of each 5CR3I, S2.
are individually connected. The control circuit P1 has PtrJ.
A DC voltage is applied through the rectifier B1 of line 1, and the sliding piece K of 7eg F connected to the control circuit P1 is operated to change the DC potential e' of line 1, which is used to create a phase signal. The signal is input to the phase signal generating section U. The operation of the phase signal generating rlt section U will be described later.

A phase signal is created by the phase signal generator U, and is given to the trannostar Q1 through the line 2, and the conduction angle of 5CR5I and S2 is set in the pulse transformer ST connected to the trannostar Q1. Generates a date pulse signal. The date pulse signal is passed through the secondary coils T1 and T2 of the pulse transformer ST to 5CR3I and S2.
5CRSI and S2 control the energization time of the lighting load according to the set conduction angle and turn on the power!
Light control is performed by changing ffi.

What should be noted in this embodiment is the provision of a phase signal generator U, which makes it possible to obtain a change in the amount of light that visually corresponds linearly to the movement of the sliding piece of the 7-Aeg F. Furthermore, even if the power supply voltage of AC power source 1fiAc fluctuates, a constant output voltage can be obtained.

FIG. 2 is a block diagram showing the configuration of the phase signal generator U), and FIG. 3 is a circuit diagram showing an example of the circuit.
FIG. 4 is a waveform diagram showing waveforms at various parts of the circuit shown in FIG. The operation of the phase signal generation gU will be explained below with reference to FIGS. 2 to 4.

An AC power waveform is applied from the AC power source AC to the power waveform detection unit u1, passes through the transformer PT that constitutes the TG waveform detection unit u1, is full-wave rectified by the second rectifier B2, and the rectified output is used as a 'lLl wave source. is derived on line 7&. The power waveform derived to line a is shown in Pt54 diagram (
1) is indicated by arrow a.

The rectified output is input to the multiplication circuit U2 and the reset signal generation circuit u3 via the line la.

The rectified output input to the multiplier circuit u2 is the rectified output input to the multiplier circuit u2.
4 (2) by the operational amplifier OAI constituting
) is formed, and the line!
It is output to b.

On the other hand, the rectified output input to the reset signal generation circuit u3 is input to the non-inverting input terminal of the operational amplifier (hereinafter referred to as operational amplifier) OA2, and at the same time, the rectified output is input to the non-inverting input terminal of the operational amplifier (hereinafter referred to as operational amplifier)
The peak value voltage is held in the capacitor C1 connected in series to the fin 7c via the resistor R1.
, R2 and applied to the inverting input terminal as a reference voltage erl.

The reference voltage erl is indicated by the arrow in FIG. 4(1). As a result, when the level of the rectified output exceeds the reference voltage erl due to the operation of the operational amplifier OA2, the reset signal generating circuit u3 changes the output waveform shown in FIG. 4(3) to the line! Derived as e.

line! Reset signal generation circuit u3 derived from e
The rise and fall of the output waveform of is equal to the above reference voltage e.
This is the point where rl and the power supply waveform intersect, and this intersection is at time tl +t2 +t3 Pt4,... in Fig. 4.
・Indicated by Therefore, time tl, t3; L5
, t7; . . . is determined by the level of the reference voltage er1. Furthermore, the time width W2 between time 3 and time t5 is a period in which the output waveform is at O level, and during this period W2, the rechargeable reset switch circuit u5 realized by, for example, a photocoupler PC is conductive, and the integration is performed as described later. Reset the output of circuit u4.

The square waveform of the rectified output output to line 5b is:
It is input to the inverting input terminal of the operational amplifier OA3 that constitutes the integrating circuit u4. The non-inverting input terminal of the operational amplifier OA3 is kept at 0 level, and the capacitor C2 is connected between the output terminal and the inverting terminal of the operational amplifier OA3, and the integrating circuit u
It consists of 4.

Line J! The output waveform of the integrating circuit u4 derived from r is #
This output waveform is shown in Fig. S4 (4), and this output waveform is generated by the reset switch circuit u at time t2, L4, ... when the reset signal shown in Fig. 4 (3) described above becomes O level.
5 becomes conductive, so it is reset. However, since the rectified output is applied to the inverting input of operational amplifier OA3, its integral output is output in the negative direction, and its peak value is -esl
This is the level indicated by . The peak level of this integral value -
esl is held by a peak hold circuit u6 formed by capacitor C3 via diode D2.

The output -eso of the integrating circuit u4 is applied to the non-inverting input terminal of an operational amplifier OA4 constituting the subtracting circuit u7, and its peak value -esl is applied to the inverting input terminal. The subtractor circuit u7 receives the above two input levels -eso, -
Subtraction of esl es2 = l esO-esl l
...(1) is calculated, and the difference voltage es2 is expressed as line, l b
Output to.

The waveform of this differential voltage es2 becomes a waveform in the positive direction as shown by the arrow C in FIG. 4 (5), and the line! 11 to the inverting input terminal of the operational amplifier OA5 constituting the date timing generation circuit u8.

The signal shown by arrow C in FIG. 4(5) created in this way will be referred to as a dimming characteristic signal hereinafter.

On the other hand, if the user operates the sliding piece K of the 7eder F, the position of the sliding piece sets the DC voltage er2 shown by the arrow d in Figure 4 (5), and this voltage er2 (main 0 to IOV in the embodiment) is line 7i
It is applied to the non-inverting input terminal of operational amplifier OA5 via. The signal set by this 7eder F and added to the date timing generation circuit u8 is hereinafter referred to as a phase angle control signal.

As a result, the output terminal of the operational amplifier OA5 is connected to the output terminal shown in Fig. 4 (
6), that is, the time t2.6 when the dimming characteristic signal and the phase angle control signal intersect. t3; Pt3,
t7: The time period [W3 signal waveform is output]. As described above, this phase signal is added to the date of transistor Q1 shown in the first diagram through line 2 to create a date pulse signal, and the date of 5CRSI, S2 is tri, fiL, 5CR3I.

As shown in FIG. 4 (7), S2 conducts for a period of 10 at the rising edge of the phase signal W3, that is, at the phase angle θ~, and supplies power to the lighting load. 5 amounts are controlled and dimming control is performed.

It can be seen from FIGS. 4(5) and 4(6) that the rising position of the phase signal can be freely adjusted by the level of the phase angle control signal Er applied to the non-inverting input terminal of the operational amplifier OA5. .

What should be noted in this embodiment is that the square waveform of the rectified output is used to obtain the dimming characteristic signal which is compared with the level er2 of the phase angle control signal described above.

In the first equation above, the voltage esO is the voltage esl, where V(θ) is the instantaneous value of the rectified output at the phase angle θ, and a is the rise time t1. of the reset signal shown in FIG. The phase angle corresponding to t5+... is shown. Therefore, the first equation is es2 = esO−es 1 π −a = f V”(θ)・dθ ・・
- (4) θ On the other hand, the AC voltage V rms at the phase angle θ is therefore the level es2 of the dimming characteristic signal shown by the fourth equation, P
It is close to a value proportional to the square of the voltage Vrms shown by the formula t55. The level es2 of the dimming characteristic signal is
The signal is related to the phase angle θ and the square of the output voltage Vrms, and the level es2 of this dimming characteristic signal and the level 2 of the phase angle control signal are compared and created by the operational amplifier OA5. 5CR81 and S2 are switched off by the phase signal shown in FIG. 4 (6), and the lighting load is controlled to be dimmed.

Therefore, 2 of the output voltage V rms applied to the lighting load
The multiplier value v rams2 is proportional to the level er2 of the phase negative control a11 signal applied to the non-inverting input terminal of the operational amplifier OA5, and vrms2. , cl−−1Σ
−(1,', V rws=φ1 ・e
r2 "2- (7), and the output voltage V rms is proportional to the level er2 of the phase angle control signal. However, φ1 is a proportionality constant.

As mentioned in the background art section, when the lighting load is an incandescent lamp, it is known that the light amount is proportional to the applied voltage Vrms to the 3°38th power, and Φ1φ2*Vrms'°38.・
(8) Here φ2 is a proportionality constant. Therefore, by substituting the seventh equation and setting φ as a constant of proportionality, Φ = φ l(φ 2 · er2 ``2)'' 8 = φ , e, 2 1. $1...(9) The light amount is 1.69 of the phase negative control 6V signal er 2.
It can be seen that it is proportional to the power of This is called the 1.69th power characteristic.

Therefore, by further squaring er2 set by the phase angle control signal, i.e. 7egs F, and taking the resulting signal as E, E r= er 2" .
・= (10) A circuit is provided, where z−
1/1. (If 39 is set, the light 1Φ is proportional to the voltage er2 set at 7 aeg F, linearly corresponds to the movement of the sliding piece of 7 aeg F, and the setting of light l that matches visually is Realized.

In actual dimming operation, in order to enhance the dimming effect,
In addition to the above-mentioned 1.69th power characteristic, it is required that the characteristic can be changed continuously from the first power to the third power. Therefore, 7 Aeg F and the operational amplifier O of the date timing generation circuit u8
An n east circuit, which will be described later, is provided between the non-inverting input terminal of A5 and the signal level obtained by raising the level er2 of the phase angle control signal set by the 7Ag F to the first power is used as a new phase angle control signal Er to the operational amplifier OA5. It is sufficient to apply it to the non-inverting input terminal of .

FIG. 5 is a circuit diagram for obtaining an actual phase angle control signal. 7Ag F and the non-inverting input terminal Σ of the operational amplifier OA5 that constitutes the date timing generation circuit u8,
The n-terminal circuit u9 is inserted, and the voltage er2 determined by the position of the sliding piece of the 7eg F is raised to the 8th power and applied to the non-inverting input terminal of the operational amplifier OA5 as the phase angle control section signal Er. Here, the index n is expressed as n=1.69・zt', and 2
is set by the exponent setting circuit U10, and the 11th power circuit u
given to 9.

Therefore, in the index setting circuit ulO, z=171.6
If it is set to 9, Er=er2', that is, a first power characteristic. In this way, the index setting circuit)
If it is possible to change continuously between 1/1.69 and 3/1.69, it is possible to continuously obtain from the first power characteristic to the third power characteristic, and an excellent dimming effect can be obtained.

In the above embodiment, as shown in the first diagram, the phase signal created by the phase signal creation unit U is applied to the base of the transistor Q1, and the date pulse signal generated in the pulse transformer ST connected to the Y runno star Q1 causes 5CR8I
, and S2 to perform phase control, as shown in FIG. 6, the transistor Q2 drives the optical switching means PS realized by a photothyristor or the like, and the 5CR83 realized by a triac or the like. The conduction angle of the light may be controlled to perform dimming control of the lighting load.

This eliminates the need for a pulse transformer S T l (see Figure 5), making it possible to downsize the circuit configuration.

What is further noteworthy about the present invention is that it has an automatic voltage stabilization function that keeps the output constant even when the AC voltage rA74 voltage fluctuates.

Figure PtS7 is a waveform diagram for explaining the automatic voltage stabilization effect when the power supply voltage fluctuates. 7 [21] is similar to FIG. 4, and corresponding waveform portions are indicated with the same reference numerals.

As shown in FIG. 7(1), when the AC power supply voltage fluctuates and its waveform a1 rises to waveform a2 or falls to waveform a3, as shown in FIG. 7(2), The level of the dimming characteristic signal also increases from bl to b2 or decreases to b3.

Therefore, the intersection with the signal b4 set by 7eg F also goes from Pl to B2 when rising, and from B3 when falling.
move to. For this reason, as shown in Figure 7 (3),
When the phase angle θ also rises, it moves from S1 to 02, and the conduction angle of the SCR narrows; on the other hand, when it falls, the phase angle moves to 03, and the conduction angle becomes wide. In this way, the power supply voltage fluctuates. Also, the light control device according to the present invention operates to keep the set output voltage approximately constant.

Effects As described above, according to the present invention, by detecting the power supply voltage waveform, obtaining the square waveform of the waveform, integrating the square waveform, and calculating the integral output from the peak value of the integral waveform,
A dimming characteristic signal is obtained, and the conduction angle of the semiconductor switching element is set based on the phase angle control signal set by the adjusting means and the dimming characteristic signal. Therefore, the set amount set by the adjustment means and the light amount of the lighting load correspond linearly, achieving visually smooth dimming control and stable output even with fluctuations in power supply voltage. can get.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram of the -* side of the present invention, Fig. 2 is a block diagram showing the configuration of the phase signal generation section, Fig. 3 is a circuit diagram showing an example of the circuit, and Fig. tI%4 is the circuit diagram of the circuit. A waveform diagram showing the waveforms of each part, Fig. 5 is a circuit diagram showing a circuit for obtaining a phase angle control voltage, Fig. 6 is a circuit diagram showing a part of another embodiment of the present invention, and PtS7 is an automatic voltage A waveform diagram to explain the stabilizing effect, Figure 8 is a circuit diagram of a dimming device made with American technology, #
Figure S9 is a graph showing the dimming characteristics based on American technology. AC...AC power supply, B, Bl, B2...rectifier, C
I. C2, C3... Capacitor, D1, D2...
Diode, F...7ada, K...sliding piece, L...
...Lighting load, OA1 to OA5...Operation amplifier, Pl
, Pll...control circuit, PC...photocoupler, PS
...Photothyristor, PT...Transformer, Ql, Q2
．． Ql2 -- Transistor, Sl, S2. S3. Sl
1. S12...Silicon controlled rectifier, ST...
Pulse transformer, U...phase signal creation section, ul...
Power supply waveform detection section, U2...Multiplication circuit, U3...Reset signal generation circuit, U4...Integrator circuit, U5...Reset switch circuit, U6...Peak hold circuit, ul...Subtraction circuit , U8...Date timing creation circuit, U9...N-th power circuit, ulO...Index setting circuit Agent Patent attorney Number of strokes Keiichi Figure 5, Figure 6, Figure 7

Claims (1)

[Scope of Claims] An AC power supply, a series circuit comprising a semiconductor switching element and a lighting load, a control means for controlling the amount of power energized to the lighting load by changing the conduction angle of the semiconductor switching element, A light control device comprising: an adjustment means for instructing a control means to control the amount of power energized for the load, wherein the control means includes a multiplier circuit that detects a power supply voltage waveform and squares the value; and an output of the multiplier circuit. an integrator circuit that integrates the above power supply voltage waveform; a reset signal generation circuit that detects a zero-crossing point from the power supply voltage waveform and resets the output from the integrator circuit at the zero-crossing point; a dimming characteristic signal generation circuit that generates a dimming characteristic signal by subtraction, and compares the dimming characteristic signal with a phase angle control signal set by the adjusting means to determine the conduction angle of the semiconductor switching element. A dimmer device characterized in that it can be set.