JPS62221878A - Inverter circuit - Google Patents

Abstract

PURPOSE:To minimize the rating of a snubber condenser, by connecting a U phase arm to a V phase arm with a low inductance conductor, and by connecting and leading DC feeders to a position with an equal distance from each phase arm of the conductor. CONSTITUTION:On a single phase inverter circuit, its U phase arm 1 is connected to its V phase arm 2 with a laminate bar 3. At a position with an equal distance from each of the phase arms 1-2, to the laminate bar 3, in one direction of the right angle directions to the bar 3, a positive side DC feeder P4 and a negative side DC feeder N5 are connected and led. Besides, in the opposite direction, a U phase AC output wire 7 and a V phase AC output wire 8 are connected and led. To the U phase arm 1, transistors 13-14 are connected, and to the V phase arm 2, transistors 15-16 are connected, and between the positive and the negative of the DC feeder sections of both the arms, a snubber condenser 6 is connected. Then, current flowing to the condenser 6 can be made equal on the U phase and the V phase.

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention relates to an inverter circuit that converts a direct current suitable voltage into an alternating current voltage, and particularly relates to a configuration for absorbing surge voltage in the circuit and stabilizing the direct current voltage. It is.

[Conventional technology]

Generally, in an electric circuit using electronic components such as semiconductor switching elements, a surge voltage is generated in the circuit due to the switching operation of the switching elements.

FIG. 3 is a circuit diagram of a single-phase inverter having a conventional semiconductor switching element; FIG.

The U-phase arm (1) and the ■-phase arm (2) are connected by a laminate bar (8). Positive side DC feeder line P (
4) and the negative side DC power supply line N (5) are connected to the U-phase arm (1). The U-phase AC output line (7) and the V-phase AC output line (8) are connected to the -phase arm (2) side. A transistor αaα4 is connected to the U-phase arm (1), and a transistor 09α0 is connected to the V-phase arm (2). Further, a snubber capacitor (6) is connected between the positive and negative terminals of the DC power supply section of each phase arm.

A conventional inverter circuit is configured as described above.

In Fig. 3, the transistors (13α4) are turned on and off alternately. The same is true for the transistors (to) αO. When the transistors αJαQ are on and the transistors 04 are off, the positive DC power supply line N (4) The output current flows through the transistor α3 and the laminate bar (3) to the U-phase AC output line (7), and from the V-phase AC output line (8) passes through the transistor αQ and the laminate bar (3) to the negative side DC feed line N. (
The current returns to 5). At this time, a positive output voltage is generated between U and V. Next, when transistor αQ is turned off,
(2) The current returned from the phase AC output line (8) passes through the diode of the transistor (to), passes through the laminate par (3), and flows back to the transistor (to). At this time, the output voltage between UV and V is zero. Next, when the transistor (to) is turned off and the transistor α small αυ is on, the positive side DC feed line N (4) passes through the laminate par (8) and the transistor (to). ), and the current returned from the U-phase AC output line (7) passes through the laminate par (8) and the transistor α4, and returns to the negative side DC feed line N (5). At this time, a negative output voltage is generated between U-7. Next, when transistor 04 is turned off, the current returned from the U-phase AC output line (7) passes through the diode of the transistor (to) and the laminate par (
8) and returns to the transistor αQ. At this time Fi
The output voltage between U and V is zero. This operation is repeated to generate a square wave AC output voltage. During this process,
A current flows through the snubber capacitor (6) due to the wiring inductance when the transistor 0Q goes from on to off and the output voltage goes from positive to zero, and when the transistor Q41 goes from on to off and the output voltage goes from negative to zero.

To explain this using FIG. 4, when the transistor α0 turns from on to off, the inductance Lp (9), the wiring inductance L2 (2) of the N wire of the laminate par (3), N
The current flowing through the wiring inductance LNα0 of the line becomes zero, and a current from zero to L flows through the inductance L+31). Therefore, a current flows to the snubber capacitor (6) to absorb the magnetic energy of +L p L2 +TLNL2 +L i'-M2+L2 (L2>M21) by the snubber capacitor (6) of the (2) phase arm C). on the other hand,
When the transistor α → turns off from on, the inductance L'p (9), the wiring inductance Ll (lυ) of the P line of the laminate par (8), the wiring inductance L of the N line
Current L ij flowing through Nα0: P line wiring inductance LI) (9), N line wiring inductance LN (zero at LQ, P of laminate par (8)
There is no change in the wiring inductance L+αυ of ljl.

Therefore, a current flows to the snubber capacitor (6) of the U-phase arm (1) to absorb the magnetic energy of 2''pL2+2LN L2.

[Problem that the invention seeks to solve]

In the conventional inverter circuit as described above, the magnetic energy absorbed by the snubber capacitor (6) is
is larger than the U-phase arm (1). Therefore, the rating of the snubber capacitor (6) was determined based on the ■phase arm (2) in order to make the Ripple current and induction of the snubber capacitor (6) into account for the heat generated by exercise.

Therefore, there was a problem that the snubber capacitor (6) of the U-phase arm (1) had an excessive rating.

This invention has been made to solve this problem, and is designed to equalize the lip 7+/current flowing into the snubber capacitor during switching of each phase arm.

The purpose is to obtain an inverter circuit that can equalize the ratings of the snubber capacitors of each phase arm.

[Means for solving problems]

The inverter circuit according to the present invention connects the U-phase arm and the ■-phase arm with a low-inductance conductor such as a laminate par, and connects a DC power line at a position equidistant from each phase arm of the conductor that connects the phase arms. Connected and pulled out.

(Function) In this invention, since the DC feed line is connected and drawn out at a position equidistant from each phase arm of the conductor that connects the phase arms, the current flowing through the snubber capacitor in both the U phase and the ■ phase is equal. Become.

[Embodiment of the Invention] FIG. 1 is a single-phase inverter circuit diagram showing an embodiment of the invention. At 18 in the figure, Ul-111 arm (1)
The phase arm (2) and (1) are connected by the laminate bar (3). At a position equidistant from each phase arm, the laminate bar (3) cζ, one of the laminate bars (8) in a perpendicular direction, The positive side DC feed line P (4) and the negative side DC feed line N (5) are connected and drawn out in the direction.The laminate par (8) has the positive side DC feed line P (4),
A U-phase AC output line (7) and a V-phase AC output line (8) are connected and drawn out in the opposite direction to the negative (11, 1fi current feeder line N (5). transistor Q
3114 > and ■ phase arm (2) has transistor α
Qαυ is connected. Further, a snubber capacitor (6) is connected between the positive and negative terminals of the DC power supply section of each phase arm.

In the inverter circuit configured as described above, the operation is similar to that of a conventional inverter circuit, but the relationship between the wiring inductance and the snubber capacitor (6) is different.

This will be explained with reference to FIG. 2, which shows the structure of FIG. 1 including wiring inductance. Here, considering the point in time when the transistor α0 turns from on to off and the output voltage changes from positive to zero, the inductance Lp and the wiring inductance L+(11
1,) transistor Q3. U line v line transistor (IL ominate bar (8) N line wiring inductance Lx
(J2), the current flowing through QQ to the wiring inductance L of the N line is the wiring inductance L1ση of the P line of the laminate bar (3).

It circulates through the wiring inductance L+αη of the transistor α3U line, the ■ line, the diode of the transistor (to), and the P line of the laminate bar (8). At this time, the current flowing through the P line wiring inductance Lp(9), the N line wiring inductance L2(2) of the laminate bar (8), and the N line wiring inductance LNα0 is zero and t(t),
The wiring inductance L1αD of the P line of the laminate bar on the V-phase arm (2) side is the current from zero to L -1Mt+
L! The snubber capacitor (6) of the phase arm (2) absorbs the magnetic energy.

On the other hand, considering the point in time when the transistor 04 turns from on to off and the output voltage changes from negative to zero, the wiring inductance of the P line Lp (9), the wiring inductance L+ (b) of the P line of the laminate bar (8), the transistor (To), V
@jU line) Ranjistaro set, laminate bar (8) N
Wiring inductor tanne L2Q3. The current flowing through the N-line wiring inductance LNαQ is transferred to the P-line wiring inductance L1 (b) of the laminate bar (8) and the transistor α! 9. It circulates through the wiring inductance L+αη of the V line, U line, ) transistor αJ diode, and P line of the laminate bar (8).

At this time, the wiring inductance of the P line Lp (9), the wiring inductance of the N line of the laminate bar (8) L2 (2)
.

The current b flowing through the wiring inductance LNαO of the N wire becomes zero and the laminate bar (8) on the U-phase arm (1) side
) wiring inductance of P line L+Q])
LzA' -1M! The magnetic energy of rL' is absorbed by the snubber capacitor (6) of the U-phase arm (1). Due to the equidistant and symmetrical arrangement, the laminate bars ( The wiring inductance L+ (b) of the P line of 8), the wiring inductance L2 (2) of the N line of the laminate bar (8), LIσυ, mutual inductance Muαη between L202 are equal, and the snubber capacitors of the U phase and ■ phase (6) is equal to b and absorbs magnetic energy.

In the above embodiment, the AC output line is also drawn out from the center of the laminate bar, but the same effect as in the above embodiment can be expected even if it is not necessarily at the center. or.

The U-phase arm and the V-phase arm may be transistor modules or inverter stacks.

〔Effect of the invention〕

5. This invention has been explained above. The U-phase arm and the ■-phase arm are connected with a low-inductance conductor such as a laminate bar, and the DC power supply line is connected and drawn out at a position equidistant from each phase arm of the conductor that connects the phase arms, so the snubber capacitor The current flowing in both the U-phase and the ■-phase becomes equal, and the rating of the snubber capacitor can be minimized, reducing both size and cost.

Furthermore, the operation of the snubber capacitor is the U-phase arm.

Since the V-phase arm and the V-phase arm are equal to 4, the turn-off voltage during switching is the same for both the U-phase arm and the V-phase arm, making it easier to design the withstand voltage of the transistor.

[Brief explanation of drawings]

FIG. 1 is an inverter circuit diagram showing an embodiment of the present invention.
Figure 2 is an explanatory diagram of the configuration of the inverter circuit diagram in Figure 1, including wiring inductance, Figure 8 is a conventional inverter circuit diagram, and Figure 4 is the configuration of the inverter circuit diagram in Figure 3, including wiring inductance. FIG. In the figure, ldU phase arm, (2) is ■ phase arm. (8) is the laminate bar, (4) is the positive DC feeder P,
(5) is the negative side DC feeder N, (6) is the snubber capacitor, (7) is the U-phase firing output line, (8) is the V-phase father output line,
α3α4)QQaG is a transistor. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Claims] In an inverter circuit in which the U-phase arm and the V-phase arm have semiconductor switching elements and capacitors, and the phase arms are connected by a low-inductance conductor such as a laminate bar, from each phase arm of the conductor connecting the phase arms An inverter circuit characterized by connecting and drawing out DC power lines at equidistant positions.