JPS6194342A - Manufacture of semiconductor element - Google Patents

Abstract

PURPOSE:To prevent short circuits due to residue of polycrystalline Si without excessive etching, by forming a polycrystalline Si film on a semiconductor substrate having the difference in steps on the surface, patterning the film by anisotropic etching, and oxidizing the residue of the polycrystalline Si film at the side surface of a step part. CONSTITUTION:On an Si substrate 21, a first polysilicon pattern 22 is formed. Thereafter, an interlayer insulating film 23 is formed on the entire surface. Second polysilicon 24 is deposited on the film 23. Impurities such as P are doped in the polysilicon 24. An oxidation resisting Si3N4 film 25 is formed thereon. A resist pattern 26 is formed on the film 25. With the pattern 26 as a mask, the film 25 and the polysilicon 24 are etched by RIE. The resist pattern 26 is exfoliated. Then, with the film 25 as an oxidation resisting mask, only the polysilicon 24 at the surface of the pattern 22 is oxidized as residue. Thus SiO2 27 is obtained. Then the film 25 is etched away. Thus short circuits due to the residue of the polysilicon 24 are prevented without excessive etching.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming polycrystalline silicon films (hereinafter referred to as polysilicon) and turns.

(Prior Art) Silicon integrated circuits will continue to become increasingly finer, with higher densities and higher integration being achieved. One of the etching technologies that supports this is reactive ion etch (RIE).
-This is anisotropic etching. Anisotropic etching is described in the 1982 edition of the VLSI Technology Compilation (1982-7).
Diamond Company Management Development Editorial Department P213-P223R
As detailed in IE, unlike conventional anisotropic etching such as wet etching or plasma etching, the amount of etching in the lateral direction from the edge of the etching mask material is small, and the etching target is almost completely etched. /4 turns of the dimensions according to the etching mask are transferred. Therefore, it has a small conversion difference from a photomask and is suitable for miniaturization, and will be used more and more in the future.

In such anisotropic etching, when there is a step on the surface of the silicon substrate 16 due to the film 2 as shown in FIG. tends to remain.

(Problems to be Solved by the Invention) This has become a problem in the manufacture of silicon integrated circuit memories, for example.

That is, in the method of manufacturing a memory of a silicon integrated circuit, as shown in FIG. thermal oxidation or CVD
(Chemical Vapor Depo-5i
The second polysilicon layer 14 is formed by a method such as etching, followed by depositing the second polysilicon layer 14' by a CVD method. Although the second polysilicon arm turns 14a and 14b4 as shown in the plan view of FIG. 4 are obtained by etching with RIE, the second polysilicon 14 is removed when it is etched with RIE. Even in the part where it should be, the first part is
A second polysilicon 14 remains on the sides of the polysilicon arm turn 12.

That is, the second polysilicon 14 is placed in the dotted line area in FIG.
remains (FIG. 3(b) is a sectional view taken along line A-A in FIG. 4). Therefore, the residue of the second polysilicon 14 forms the second polysilicon pattern 14a.

14b is short-circuited and the yield decreases.

In order to avoid this, the anisotropic etching property is weakened, but the characteristic of anisotropic etching, which is that it is possible to transfer a pattern with the dimensions exactly as per the etching mask, is lost. Further, if an attempt is made to remove the residue from the stepped portion by over-etching, there is a problem that the underlying layer of the flat portion is damaged more than necessary, which in turn adversely affects the device characteristics.

(Another Means to Solve the Problem) Therefore, in the present invention, after anisotropic etching of polysilicon, the residual polysilicon on the side surface of the underlying stepped portion is oxidized.

(Operation) When the polysilicon residue is oxidized, it turns into non-conductive Sin. Therefore, problems such as short circuits due to leftovers are eliminated.

(Example) An example of the present invention is shown in Fig. 1 (this figure is B in Fig. 4).
2) will be explained in advance.

In FIG. 1(a), 21 is a silicon substrate as a semiconductor substrate. After forming a first polysilicon pattern 22 on this silicon substrate 21, a glabella insulating film 23 is formed on the entire surface, and then A second polysilicon 24 is deposited on the surface. Here, the interlayer insulating film 23 is made of, for example, a thermally oxidized 5iO1 film with a thickness of several hundred nm. The second polysilicon 24 is formed to a thickness of several hundred nm by, for example, a low-pressure CVD method, and this polysilicon 24 is doped with impurities such as phosphorus (P) "in ait" or after deposition. I do.

Thereafter, as shown in FIG. 1(a), the second polysilicon 2
An oxidation-resistant Si 3 N film 25 is formed on the substrate 4 by CVD or the like. Here, the thickness of the S i B N film 25 is set to be enough to serve as a mask against oxidation, which will be described later. For example, the thickness is several tens of nanometers.

Next, as shown in FIG. 1(b), the Si, N4 film 2
5, a resist pattern 26 is formed by photolithography so as to cover the non-etched portions of the second polysilicon 24.

Thereafter, as shown in FIG. 1(b), the Si3N4 film 2 is removed by RIE using the resist pattern 26 as a mask.
5 and second poly-silicon 24'i etching.

As a result, the second polysilicon pattern shown in FIG. 4 is formed. Moreover, at this time, even if the second polysilicon 24 is to be removed, the side surface of the base step part (the side surface of the first polysilicon pattern 22) is
As shown in Figure (b), the second polysilicon 24 remains without being completely removed.

Therefore, next, after peeling off the resist pattern 26 as an etching mask, using the Si, N, film 25 as an oxidation-resistant mask, the second polysilicon as the residue (the second polysilicon on the side surface of the first polysilicon pattern 22 2 polysilicon) 24 is oxidized to form a 5 inch 227 layer as shown in FIG. 1(C). Here, if the oxidation is performed in a steam atmosphere or under high pressure, it can be performed at a lower temperature and in a shorter time.

However, S i 3 N as an oxidation-resistant mask, film 2
5 is removed with an etchant having a high etching selectivity with SiO2, such as hot phosphoric acid.

In the above embodiment, the S i , N4 film 25 was attached on the second polysilicon 24 to serve as an oxidation-resistant mask in the subsequent oxidation process of the residue of the second polysilicon 24, but this S i , N, the film 25 is not necessarily required. That is, in step 9 of forming the S i , N4 film 25, the thickness of the second polysilicon 24 may be increased in advance in consideration of the film reduction due to oxidation of the second polysilicon 24 during the oxidation process.

(Effects of the Invention) As described above, in the method of the present invention, after anisotropic etching of polysilicon, the polysilicon residue on the side surface of the underlying stepped portion is oxidized to convert it into non-conductive Sin. Therefore, problems such as short circuits caused by polysilicon residue can be solved without weakening the anisotropic etching property or over-etching, and at the same time, problems caused by methods that weaken the anisotropic etching property and over-etching can be solved. Solvable. Further, oxidation after anisotropic etching has the effect of removing damage caused by etching.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view for explaining one embodiment of the method for manufacturing a semiconductor element of the present invention, and FIG. 2 is a schematic cross-sectional view showing that the object to be etched remains on the side surface of the stepped portion of the base during anisotropic etching. , FIG. 3 is a cross-sectional view for explaining a method of manufacturing a silicon integrated circuit memory, and FIG. 4 is a plan view thereof. 21...Silicon base plate, 22...First polysilicon pattern, 24...Second polysilicon, 27...5
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tual ni 23/i Kamon Itirokura today's counterfeit 26
U Nost Bataan 27: S; o□ Figure 2 Figure 4

Claims (1)

[Claims] A step of forming a polycrystalline silicon film on a semiconductor substrate having a step on the surface, a step of patterning the polycrystalline silicon film by anisotropic etching, and a step of patterning the polycrystalline silicon film on the side surface of the step of the substrate after this step. A method for manufacturing a semiconductor device, comprising the step of oxidizing the residue of.