JPS616876A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a semiconductor device, dark currents thereof are small and which has excellent reverse characteristics and multiplication characteristics, with superior reproducibility and yield by terminating a surface exposed end in a p-n junction in a layer having the widest forbidden band width. CONSTITUTION:There are exposed sections 227 to the surface of a p-n junction 226 in a mixed crystal section 2241, and the exposed sections 227 are terminated to the mixed crystal section 2241 having forbidden band width wider than the effective forbidden band width of an insular superlattice layer 2242 as a superlattice layer. Consequently, structure in which forbidden band width changes to a small value from a large value in order of the mixed crystal section 2241, an insular superlattice layer 224 and an n<-> GaAs layer 223 and the p-n junction is formed in the insular superlattic layer 224 having intermediate forbidden band width in a crystal wafer and in the mixed crystal section 2241 having the largest forbidden band width on the surface is shaped. Accordingly, the mixed crystal section 2241 gives extremely stable guard ring structure, thus acquiring an element displaying sharp reverse breakdown characteristics and stable avalanche operation backed up by said breakdown characteristics.

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to a semiconductor device with reverse bias operation.
In particular, it relates to the structure of a high-speed, high-sensitivity, low-noise, reliable photodetector (FD) or avalanche photodiode (APD) as a photodetector.

(Prior art and its problems) Among semiconductor photodetectors, PDs or APDs are fast and highly sensitive, and are important as photodetectors in optical communication systems, and their development is active along with semiconductor lasers as light sources. It is progressing.

Semiconductor laser oscillation wavelengths are becoming available in a wide wavelength range from the visible to the infrared range, and the
The practical application of FDs or APDs over a wide wavelength range using v-compound semiconductors is eagerly awaited. In particular, PDs or APDs with low dark current and low excess noise cannot cover the wide oscillation wavelength range of semiconductor lasers by relying only on Si or Ge. This is the reason why m-v compound semiconductor APDs are required. However, crystal growth, process technology, and surface stabilization technology for compound semiconductor materials are still underdeveloped, and it is difficult to perform multi-stable avalanche operation by applying a high reverse bias.

Under these circumstances, an APD structure has been proposed which is capable of groundbreakingly low noise and high reverse bias operation.

The first is as shown in the specification of Japanese Patent Application No. 53-87856 or the specification of Japanese Patent Application No. 53-87358,
This is based on a betaro structure in which a light-transmitting window is formed on a light-absorbing layer, and the second type has a multiplication region that is at least separate from the light-absorbing layer, which was proposed in Japanese Patent Application No. 54-39169. It was done.

Figure 1 is a cross-sectional view of the structure shown in "Semiconductor device" of Japanese Patent Application No. 54-39169 (F), InP-InGa
This is an example manufactured using AsP-based materials. First n+-
On the InP substrate 11, an n+InP layer 12 with a thickness of several μm is formed by liquid phase epitaxial (LPE) method or the like, and then an n-type InO layer with a thickness of 5 μm and an impurity concentration of 2×10” F−3 is formed. 79GaO,l!I As(1,47po,l
The ls layer 13 (hereinafter abbreviated as InGaAsP) is further epitaxially grown with an n-type InP layer 14 having an impurity concentration I x 1016ffi-3. Next, S i 3 N4
A selective diffusion mask 15 such as %Sioz is applied and Cd diffusion is performed to obtain a P shadow region 16 and a pn junction surface 17.

Furthermore, again for insulation 8 i 3 N4 or 5i02
After forming a film 151 and patterning an electrode area window, a p-type electrode 19 is formed, and an n-type electrode 20 is formed on the back surface of the InP substrate 11. 21 indicates a lead wire.

The structural features of the APD made in this way are the p-n junction 1
The reason is that the number 7 is one of the four in one InP layer and is located at such a position that a depletion layer spreads in the InGaAsP layer 13 for the first time when a reverse bias is applied.

It is disclosed in the above-mentioned Japanese Patent Application No. 3916-1983 that in this way, an APD with better breakdown characteristics can be obtained.
9 for details, but to summarize, InP has a wider forbidden band width than InGaAsP, and the curved spread of the depletion layer when reverse bias is applied in the vicinity of the p-n junction 170 is mainly due to The reason is that, while increasing the breakdown voltage, the depletion layer reaches the InGaAsP 13 in the area other than the peripheral part of the p-n junction 17, and breakdown occurs at a low voltage because the forbidden band width is small. This is because the guard ring effect is obtained by the structure shown in FIG.

However, the manufacturing yield of the APD having the structure shown in FIG. 1 is extremely poor. This is because the breakdown characteristics greatly depend on the distance between the p-n junction plane 17 and the hetero interface 18 between the InP layer 14 and InGaAsP layer 13, shown as d in FIG. To obtain such a high multiplication factor, d must be approximately 0.8 μm to approximately 0.4 μm. This is because when d is 0.8 μm or more, breakdown occurs at the periphery of the p-n junction surface 17 before the center, and when d is 0.3 μm or less, the breakdown occurs in the InGaAsP layer 13 even at the periphery. This is because the depletion layer expands significantly, making it impossible to provide a guard ring effect. Therefore, in order for the APD to exhibit excellent characteristics, p−n
Bond depth control is extremely required.

(Objective of the Invention) An object of the present invention is to provide a structure of PD, A, and PD that enables extremely stable operation and significantly improves the manufacturing yield 9. The unimportant nature of controlling the p-n junction depth will be shown below.

(Structure of the Invention) According to the present invention, at a desired location on the first semiconductor layer, an effective forbidden band width, which is larger than the forbidden band width of the first semiconductor layer and the same as that of the first semiconductor layer, is formed. A semiconductor superlattice layer exhibiting a conductivity type is provided, a mixed crystal layer having approximately the same composition as this superlattice layer is provided around the semiconductor superlattice layer, and the first semiconductor layer and the semiconductor superlattice layer are different from each other. The region of the opposite conductivity type is formed to a depth that does not reach the interface between the first semiconductor layer and the superlattice layer, and is formed so that the pn junction including the superlattice layer terminates at the surface of the surrounding mixed crystal layer. A semiconductor device is obtained which is characterized in that:

(Detailed explanation of configuration) Next, the present invention will be explained based on one embodiment.

FIG. 2 is a cross-sectional view of an APD showing the basic structure of the present invention. 1 n+GaA, rl+ Q a A on s substrate 221
s layer 222, n-type QaAs ffj 223 and further n
- forming a GaAs/AlAs superlattice layer 224 exhibiting a shape; The GaAs/AlAs superlattice layer 224 in the example was made up of 900 layers in which GaAs layers 20X and As 131 were alternately laminated to have a total thickness of about 1.5 μm.

Next, 5i02 or Si3N, films etc. are made of GaAs/Al.
The As superlattice layer 2240 was formed on the surface using plasma CVD at a low temperature of about 300'C. Thereafter, an argon laser beam focused with a spot diameter of 5 μm was scanned over the entire peripheral region except for the 200 μm diameter island-like region in an alternating pattern at a pitch of 500 μm within the wafer plane. The output of the argon laser is 4 W, the interval between scanning lines is 5 μm, and a programmable automatic scanning mechanism is used for scanning. Next, 7
A photoresist is removed on the tSiO2 film or the Si3N4 film, and a diffusion window with a diameter of 250 μm is opened so as to concentrically include the island-shaped region with a diameter of 200 μm. Furthermore, through this 250 μm diffusion window, GaAs:Zn pseudo-binary diffusion (Proceedings of the 25th Applied Physics Association Conference 27a)
-8-9, P419.1978) at 530℃
A p region 225 was obtained by diffusing n to a depth of 1 μm from the surface. Now, the above-mentioned argon laser scanning part has changed to a mixed crystal part 2241 in which the superlattice structure has collapsed, and this means that the photoluminescence peak wavelength of the GaAs/AlAs superlattice layer 224 was 7000 Part 2
This was confirmed by the fact that it was 6500X in 241. Therefore, the exposed portion 227 on the surface of the p-n junction 226 is a mixed crystal region 2241 with a wider forbidden band width than the effective forbidden band width of the island superlattice layer 2242, which is a reed superlattice layer. It terminates at the crystal part 2241.

Therefore, the forbidden band width changes from large to small in the order of the mixed crystal part 2241, the island-like superlattice layer 224, and then the n-GaAs layer 223, and the p-n junction is located in the middle inside the crystal wafer. The island-like superlattice layer 224 having a forbidden band width has a structure formed in the mixed crystal portion 2241 having the largest forbidden band width on the surface. In an example in which the electron concentration of the n-GaAs/AlAs superlattice layer 224 is set to 10σ-3, the reverse breakdown voltage of the pn junction formed in the island-like superlattice layer 2242 is 90V, whereas the mixed crystal part 2241 The breakdown voltage of the pn junction terminated on the surface was estimated to be 105 .mu.m. Therefore, the mixed crystal portion 2241 provides an extremely stable guard ring structure,
A device can be obtained that exhibits sharp reverse breakdown characteristics and stable avalanche operation supported by this characteristic.

The present invention has been described above with respect to embodiments of semiconductor devices made of GaAs/AlAs based materials, but it is clear that the present invention is effective in improving the breakdown characteristics of all semiconductor devices having a Peter junction that operates in reverse bias. It's obvious I
It can also be applied to compound semiconductor crystals such as nP-InGaAs.

Furthermore, in the above invention, it is clear that the same effect can be obtained even if the part where n is 0 is converted to p in the p region.

In the above example, laser annealing was used, but electron beam annealing may also be used, or ion beam annealing such as HeyHjO can be used to irradiate neutral particles such as atoms (for example, they are first generated as ions, then given an electric charge midway through the process to become neutral particles). ) or neutron irradiation.

Furthermore, due to variations in laser output during the mixed crystal formation process, the superlattice layer 224 may not be mixed crystal enough to reach the n-GaAs layer 223 below, or conversely, the superlattice layer 224 may not be mixed crystal enough to reach the n-GaAs layer 223 below.
Even if some of them are mixed crystallized, the object of the present invention can still be achieved.

(Effects of the Invention) As explained above, according to the present invention, a semiconductor device with uniform breakdown over the entire p-n junction surface, small dark current, and excellent reverse direction characteristics and multiplication characteristics can be manufactured with high reproducibility. The structure was changed to achieve a significant improvement in yield. This is based on the guard ring effect caused by the exposed end of the pn junction ending at the layer with the widest forbidden band width. Furthermore, as for the manufacturing process, it is sufficient to add a beam annealing process as described in the detailed description of the structure, and there is no major process change, so the manufacturing reproducibility is excellent.

[Brief explanation of the drawing]

Figures 1 and 2 show conventional APDs, respectively. FIG. 3 is a sectional view showing the structure of A and FD of the present invention. In each figure, 11 is n-type InP substrate 12 is n-type InoaAsP layer 14 is n-type TnP layer 15 is 5i02 or Si3N4 film 151 is Si3N4 or ii, Si02 Membrane 1
6 is a p shadow region 17 is a p-n junction 18 is an interface between TnP and InGaAsP layers 19 is a p-type electrode 20 is an n-type 'd'i, 4KI 21 is a lead wire 221 is an n+ GaAs substrate 222 is an n+ (3a As layer) 223 is an n-GaAs layer 224 is an n-GaAs/AlAs superlattice layer 2241
The mixed crystal portion 2242 of the superlattice layer, the island-like superlattice layer 225, the Zn-diffused p-type region 226, and the p-n junction 227 represent the surface exposed portion of the p-n junction. E 1 Figure I 71'2 Figure

Claims (1)

[Claims] A semiconductor superlattice layer having an effective forbidden band width larger than that of the first semiconductor layer and having the same conductivity type as the first semiconductor layer is provided at a desired location on the first semiconductor layer. , a mixed crystal layer having substantially the same composition as this superlattice layer is provided around this semiconductor superlattice layer, and a region having a conductivity type opposite to that of the first semiconductor layer and the semiconductor superlattice layer is formed in the first semiconductor layer. A semiconductor device characterized in that the semiconductor device is formed at a depth that does not reach the interface between the superlattice layer and the superlattice layer, and further includes the superlattice layer so that a pn junction terminates at the surface of the surrounding mixed crystal layer. .