JPS6161679B2 - - Google Patents
Info
- Publication number
- JPS6161679B2 JPS6161679B2 JP3360881A JP3360881A JPS6161679B2 JP S6161679 B2 JPS6161679 B2 JP S6161679B2 JP 3360881 A JP3360881 A JP 3360881A JP 3360881 A JP3360881 A JP 3360881A JP S6161679 B2 JPS6161679 B2 JP S6161679B2
- Authority
- JP
- Japan
- Prior art keywords
- video signal
- signal
- electrode
- display device
- image display
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004973 liquid crystal related substance Substances 0.000 claims description 21
- 239000000758 substrate Substances 0.000 claims description 6
- 239000011521 glass Substances 0.000 claims description 2
- 230000005669 field effect Effects 0.000 claims 2
- 239000004065 semiconductor Substances 0.000 claims 2
- 239000011159 matrix material Substances 0.000 claims 1
- 238000001514 detection method Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 239000003990 capacitor Substances 0.000 description 4
- 210000002858 crystal cell Anatomy 0.000 description 4
- 238000000034 method Methods 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 230000004397 blinking Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
- H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
- H04N3/14—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by means of electrically scanned solid-state devices
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Liquid Crystal Display Device Control (AREA)
- Liquid Crystal (AREA)
- Transforming Electric Information Into Light Information (AREA)
Description
【発明の詳細な説明】
本発明は画像表示装置、特に液晶を用いた画像
表示装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an image display device, and particularly to an image display device using liquid crystal.
従来の画像表示装置を第１図に示す。第１図は
アナログ信号を含む画像を表示するものであり、
液晶とMOS型FETアレイを組み合わせて構成さ
れている。第１図に於て、単位画素を構成するの
はMOS型FET1、信号蓄積用コンデンサ２、液晶
セル３である。この基本的な動作を説明する。ま
ずMOS型FETをＰチヤンネルとし、ゲートライ
ンxiにゲート信号として負のパルス電圧が印加さ
れると、FET1はオン状態になり信号ラインyiに
印加されたアナログのビデオ信号はFET1を通し
てコンデンサ２に充電される。負のパルス電圧が
消滅すればFET1はオフ状態となるが、通常FET
のリーク電流及び液晶セル３を流れる電流は非常
に小さいので、コンデンサに充電されたビデオ信
号に比例した電圧は、かなりの時間保持され液晶
セル３に印加されつづける。そして、ゲート信号
xiからxi＋１、xi＋２……と線順次に走査し、そ
の位置に対応したビデオ信号をyi、yi＋１、yi＋
２……から一斉に印加することにより全体の画像
が表示される。第２図にFETを含めた一画素の
断面図を示す。ＰチヤンネルFETの場合、４は
ｎ型Si基板、５，６はそれぞれｐ+拡散領域でソ
ース、ドレインであり、ソース５は第１図のyi方
向に接続されている。７はゲート酸化膜、８はゲ
ート電極で、xi方向に接続されている。９は液晶
セルの画素電極として一方の電極を形成し、かつ
薄い酸化膜１１により基板４との間にコンデンサ
を形成している。１２は液晶、１３は対向電極で
透明電極となつており、画面全体が共通電極とな
つている。１４は表面のガラス基板、１０は絶縁
膜を示す。このような構成では、液晶に印加され
る電圧の極性は一方向であり、直流駆動となる。
従つて、液晶の寿命が短かいなどの信頼性の点で
大きな欠点があつた。そこで、交流駆動するため
に、共通電極とビデオ信号を同期して所定の周期
で反転させる方法が考えられるが、この場合30Hz
程度の周期で反転させた場合画面の半分がネガ表
示になつてしまう。またこれをさけるため１Hz、
10Hzあるいはもつと長い周期で反転させた場合で
も反転するたびに画面が「まばたき」してしまい
実用的ではなかつた。 A conventional image display device is shown in FIG. Figure 1 displays an image containing an analog signal,
It consists of a combination of liquid crystal and MOS FET array. In FIG. 1, a unit pixel is composed of a MOS type FET 1, a signal storage capacitor 2, and a liquid crystal cell 3. This basic operation will be explained. First, the MOS type FET is made into a P channel, and when a negative pulse voltage is applied to the gate line xi as a gate signal, FET1 is turned on and the analog video signal applied to the signal line yi charges capacitor 2 through FET1. be done. When the negative pulse voltage disappears, FET1 turns off, but normally the FET
Since the leakage current and the current flowing through the liquid crystal cell 3 are very small, the voltage proportional to the video signal charged in the capacitor is maintained and continues to be applied to the liquid crystal cell 3 for a considerable time. and gate signal
Line-by-line scanning is performed from xi to xi+ 1 , xi+ 2, etc., and the video signals corresponding to the positions are converted to yi, yi+ 1 , yi+
2. The entire image is displayed by applying the signals all at once. Figure 2 shows a cross-sectional view of one pixel including the FET. In the case of a P channel FET, 4 is an n-type Si substrate, 5 and 6 are p + diffusion regions, and are a source and a drain, respectively, and the source 5 is connected in the yi direction in FIG. 7 is a gate oxide film, and 8 is a gate electrode, which are connected in the xi direction. Reference numeral 9 forms one electrode as a pixel electrode of a liquid crystal cell, and a thin oxide film 11 forms a capacitor between it and the substrate 4. 12 is a liquid crystal, 13 is a counter electrode which is a transparent electrode, and the entire screen is a common electrode. Reference numeral 14 indicates a glass substrate on the front surface, and reference numeral 10 indicates an insulating film. In such a configuration, the polarity of the voltage applied to the liquid crystal is unidirectional, resulting in DC drive.
Therefore, there were major drawbacks in terms of reliability, such as a short lifespan of the liquid crystal. Therefore, in order to drive AC, a method can be considered in which the common electrode and the video signal are synchronized and inverted at a predetermined period, but in this case 30Hz
If you reverse the display at a certain frequency, half of the screen will become a negative display. Also, to avoid this, 1Hz,
Even when reversed at 10Hz or a longer cycle, the screen would "blink" every time it was reversed, making it impractical.
そこで、本発明は液晶の長寿命化、信頼性の向
上を、画像をみだすことなく実現出来る画像表示
装置を供することを目的とする。 SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide an image display device that can extend the lifespan of liquid crystals and improve reliability without distorting images.
以下図面とともに本発明の説明をしていく。 The present invention will be explained below with reference to the drawings.
第３図に本発明の画像表示装置を示す。１５は
シフトレジスタで構成されるゲートライン駆動回
路、１６はクロツク信号入力端子、１７はシリア
ル入力端子、１８はビデオ信号反転回路、１９は
ビデオ信号入力端子、２０はビデオ信号検出回路
２１はクロツク入力端子、２２はフリツプフロツ
プ回路（以下FF）、２３はビデオ信号をサンプリ
ングして信号ラインｙに印加するための駆動回
路、２４はクロツク信号入力端子、２５は共通電
極端子を示す。第４図の各部の波形を示す。次に
第３図、第４図に従つて動作説明をする。まず、
端子１９に正極性のビデオ信号ａが加えられる。
今、反転回路１８の制御信号ｃが「０」の時、ビ
デオ信号は反転されずに信号ｄとして駆動回路２
３に入力される。そしてある瞬間何らかの原因で
ビデオ信号が入力しなかつた時、検出回路２０が
働きパルスｂが出力され、FF２２を反転させ
る。そうすると、反転回路１８の制御信号ｃが反
転し、反転回路１８の出力ｄは負極性のビデオ信
号になる。同時に共通電極２５の電圧も極性が反
転する。従つて、液晶に加わる電圧の極性が反転
する。以下、ビデオ信号が途切れるたびに極性の
反転が行なわれ、液晶の寿命は大巾に伸びるので
ある。しかも、ビデオ信号が途切れている時に反
転動作が行なわれるので、反転にともなう画面の
「まばたき」は全く問題とはならない。ここで、
ビデオ信号の途切れが一瞬でもあつたら極性を反
転させるのでは、画面がほとんど乱れていないと
きに反転動作をしてしまうこともありうるので、
ビデオ信号が一定期間T0、例えば１フイールド
（約16msec）期間以上途切れた場合に反転動作が
行なわれるようにすれば良い。第５図にビデオ信
号検出回路の具体例を示す。まず、ビデオ信号が
同期分離回路２６の入力端子２７に入力されると
出力として第６図ｅに示すような同期信号が得ら
れる。ここで周期Ｔは一走査ライン分の時間であ
る。次にこの同期信号ｅをリセツト信号としてカ
ウンタ回路２８に入力する。そしてクロツク入力
端子２９からのパルスｆの数をカウントし、
16msec以上リセツト信号が入力されないと、カ
ウンタ回路の出力からパルスｂが出力されるとい
うものである。第６図の例は水平同期信号を検出
してビデオ信号の有無を検出するというものであ
つたが、全く同様に垂直同期信号を検出してビデ
オ信号の有無を検出することが出来るのはもちろ
んである。 FIG. 3 shows an image display device of the present invention. 15 is a gate line drive circuit composed of a shift register, 16 is a clock signal input terminal, 17 is a serial input terminal, 18 is a video signal inversion circuit, 19 is a video signal input terminal, 20 is a video signal detection circuit 21 is a clock input terminal 22 is a flip-flop circuit (hereinafter referred to as FF), 23 is a drive circuit for sampling a video signal and applying it to the signal line y, 24 is a clock signal input terminal, and 25 is a common electrode terminal. The waveforms of each part in FIG. 4 are shown. Next, the operation will be explained according to FIGS. 3 and 4. first,
A positive polarity video signal a is applied to the terminal 19.
Now, when the control signal c of the inverting circuit 18 is "0", the video signal is not inverted and is sent to the drive circuit 2 as the signal d.
3 is input. When a video signal is not input for some reason at a certain moment, the detection circuit 20 operates and outputs a pulse b, inverting the FF 22. Then, the control signal c of the inversion circuit 18 is inverted, and the output d of the inversion circuit 18 becomes a video signal of negative polarity. At the same time, the polarity of the voltage on the common electrode 25 is also reversed. Therefore, the polarity of the voltage applied to the liquid crystal is reversed. Thereafter, each time the video signal is interrupted, the polarity is reversed, greatly extending the life of the liquid crystal. Moreover, since the reversal operation is performed when the video signal is interrupted, the "blinking" of the screen caused by the reversal is not a problem at all. here,
If you reverse the polarity when there is even a momentary interruption in the video signal, you may end up inverting the polarity even when the screen is mostly undisturbed.
The inversion operation may be performed when the video signal is interrupted for a certain period T 0 , for example, one field (approximately 16 msec). FIG. 5 shows a specific example of the video signal detection circuit. First, when a video signal is input to the input terminal 27 of the sync separation circuit 26, a sync signal as shown in FIG. 6e is obtained as an output. Here, the period T is the time for one scanning line. Next, this synchronizing signal e is inputted to the counter circuit 28 as a reset signal. Then, count the number of pulses f from the clock input terminal 29,
If the reset signal is not input for 16 msec or more, pulse b is output from the output of the counter circuit. The example in Figure 6 was to detect the presence or absence of a video signal by detecting the horizontal synchronization signal, but it is of course possible to detect the presence or absence of a video signal by detecting the vertical synchronization signal in exactly the same way. It is.
第７図にビデオ信号検出回路の他の実施例を示
す。まず、ビデオ信号が積分回路３０の入力端子
３１に入力されると第８図に示すように出力ｇ
は、ビデオ信号の平均電圧レベルとなりビデオ信
号が正常の時は電圧ＶSとなり、ビデオ信号が途
切れると電圧ＶNとなる。次に、前記電圧ＶSと電
圧ＶNの間の基準電圧V0が入力端子３３に入力さ
れたコンパレータ３２に積分回路の出力を印加す
ることによりコンパレータ３２の出力は波形ｉの
ごとく、ビデオ信号が正常の時は「１」、ビデオ
信号が途切れた時に「０」レベルになるので、こ
れをカウンタ３４のリセツト信号とし、入力端子
３５からクロツク信号ｆを入力することにより、
ビデオ信号が一定時間T0だけ途切れたとき、出
力パルスｂが得られるというものである。 FIG. 7 shows another embodiment of the video signal detection circuit. First, when a video signal is input to the input terminal 31 of the integrating circuit 30, the output g is shown in FIG.
is the average voltage level of the video signal, which is the voltage V S when the video signal is normal, and becomes the voltage V N when the video signal is interrupted. Next, by applying the output of the integrating circuit to the comparator 32 to which the reference voltage V 0 between the voltage V S and the voltage V N is input to the input terminal 33, the output of the comparator 32 becomes a video signal as shown in the waveform i. When the signal is normal, it becomes "1" level, and when the video signal is interrupted, it becomes "0" level, so by using this as a reset signal for the counter 34 and inputting the clock signal f from the input terminal 35,
An output pulse b is obtained when the video signal is interrupted for a certain period of time T0 .
また、ここでは１フイールド期間ビデオ信号が
途切れた場合に反転動作が行なわれる場合につい
て述べたが、１フイールド期間ではなく１フレー
ム期間）約32msec）、あるいは１秒間またはその
他の期間ビデオ信号が途切れた場合に反転動作を
させるようにすることももちろん可能であり同様
の効果が得られる。また、いままで述べたような
駆動方法に於ては、TN型液晶表示装置、DSM液
晶表示装置等種々の表示装置に用いることができ
るが、チヤンネル切換え時や、受信電波の乱れな
どによりビデオ信号が途切れた時に反転動作が行
なわれるので、反転周期は比較的長くなると考え
られ、比的長い周期の反転によつても長寿命化が
達成出来るゲスト−ホスト型液晶を用いた場合に
特に効果が大きく、直流駆動では5000時間程度の
寿命が３万時間以上になり寿命が５倍以上になる
ことを確認した。 In addition, here we have described the case in which the inversion operation is performed when the video signal is interrupted for one field period, but it should be noted that the inversion operation is performed when the video signal is interrupted for one field period (not one field period but one frame period) (approximately 32 msec), or when the video signal is interrupted for one second or other period. Of course, it is also possible to reverse the operation in some cases, and the same effect can be obtained. In addition, the driving method described above can be used for various display devices such as TN type liquid crystal display devices and DSM liquid crystal display devices, but the video signal may deteriorate due to channel switching or disturbances in received radio waves. Since the reversal operation is performed when the current is interrupted, the reversal period is thought to be relatively long, and this is particularly effective when using a guest-host type liquid crystal, which can achieve a long life even with a relatively long reversal period. It was confirmed that the lifespan of DC drive is approximately 5,000 hours, but it is now more than 30,000 hours, which is more than five times the lifespan.
以上のような本発明の画像表示装置を用いるこ
とにより、チヤンネル切換えや受信電波の乱れな
どによりビデオ信号が一定期間途切れた時に反転
動作を行なうので、反転動作にともなう画面の乱
れは全く認識出来ず、実質的に反転動作による画
面の乱れはなくなる。しかも、不定期ではあつて
も、液晶にかかる電圧の極性の変化によるゲスト
−ホスト液晶の長寿命化は、我々の実験により確
かめられており、信頼性の向上も達成出来る。従
つて、液晶の長寿命化、信頼性の向上を、画像を
乱すことなく実現するという当初の目的は完全に
達成され、本発明の工業的価値は大きい。 By using the image display device of the present invention as described above, the reversal operation is performed when the video signal is interrupted for a certain period of time due to channel switching or disturbances in the received radio waves, so the disturbance on the screen caused by the reversal operation is completely unnoticeable. , the screen disturbance caused by the reversing operation is virtually eliminated. In addition, our experiments have confirmed that the lifespan of the guest-host liquid crystal can be extended by changing the polarity of the voltage applied to the liquid crystal, even if irregularly, and reliability can also be improved. Therefore, the original purpose of extending the life of liquid crystals and improving reliability without disturbing images has been completely achieved, and the present invention has great industrial value.
第１図は従来の液晶を用いた画像表示装置の等
価回路図、第２図は一画素を示す断面図、第３図
は本発明の画像表示装置のパネルと周辺駆動回路
を示すブロツク図、第４図は第３図に於ける回路
の各部波形を示す説明図、第５図はビデオ信号検
出回路の具体例を示すブロツク図、第６図は第５
図の回路に於ける各部波形を示す説明図、第７図
はビデオ信号検出回路の他の実施例を示すブロツ
ク図、第８図は第７図の回路に於ける各部波形を
示す説明図である。
１５…ゲートライン駆動回路、１６…クロツク
信号入力端子、１７…シリアル入力端子、１８…
ビデオ信号反転回路、１９…ビデオ信号入力端
子、２０…ビデオ信号検出回路、２１…クロツク
入力端子、２２…フリツプフロツプ回路、２３…
信号ライン駆動回路、２４…クロツク信号入力端
子、２５…共通電極端子、２６…同期分離回路、
２７…ビデオ信号入力端子、２８…カウンタ回
路、２９…クロツク信号入力端子、３０…積分回
路、３１…ビデオ信号入力端子、３２…電圧コン
パレータ、３３…基準電圧入力端子、３４…カウ
ンタ、３５…クロツク信号入力端子。
FIG. 1 is an equivalent circuit diagram of a conventional image display device using liquid crystal, FIG. 2 is a sectional view showing one pixel, and FIG. 3 is a block diagram showing a panel and peripheral drive circuit of the image display device of the present invention. 4 is an explanatory diagram showing the waveforms of each part of the circuit in FIG. 3, FIG. 5 is a block diagram showing a specific example of the video signal detection circuit, and FIG.
FIG. 7 is a block diagram showing another embodiment of the video signal detection circuit. FIG. 8 is an explanatory diagram showing waveforms of various parts in the circuit shown in FIG. be. 15... Gate line drive circuit, 16... Clock signal input terminal, 17... Serial input terminal, 18...
Video signal inversion circuit, 19... Video signal input terminal, 20... Video signal detection circuit, 21... Clock input terminal, 22... Flip-flop circuit, 23...
Signal line drive circuit, 24...Clock signal input terminal, 25...Common electrode terminal, 26...Synchronization separation circuit,
27...Video signal input terminal, 28...Counter circuit, 29...Clock signal input terminal, 30...Integrator circuit, 31...Video signal input terminal, 32...Voltage comparator, 33...Reference voltage input terminal, 34...Counter, 35...Clock Signal input terminal.
Claims (1)
または半導体基板上に、行列状に電界効果トラン
ジスタが形成され、前記電界効果トランジスタの
一方の電極を第−電極とし、前記第一電極上に液
晶を介して設置された、透光性基板上の透明電極
を第二電極とした画像表示装置に於て、画像信号
の有無を検出する手段と、画像信号が一定時間以
上入力されなかつた場合に、前記第一電極と前記
第二電極の間の液晶に加わる電圧の極性を反転さ
せる手段を具備していることを特徴とする画像表
示装置。 ２ 前記画像信号の有無を検出する手段として、
ビデオ信号の水平同期信号あるいは垂直同期信号
の有無を検出することを特徴とする特許請求の範
囲第１項記載の画像表示装置。 ３ 前記画像信号の有無を検出する手段として、
ビデオ信号の平均電圧レベルを、基準電圧と比較
する手段を備えていることを特徴とする特許請求
の範囲第１項記載の画像表示装置。[Scope of Claims] 1. Field effect transistors are formed in a matrix on a semiconductor layer or a semiconductor substrate formed on an insulating substrate such as glass, one electrode of the field effect transistor is a negative electrode, and the In an image display device in which a second electrode is a transparent electrode on a light-transmitting substrate installed on the first electrode via a liquid crystal, means for detecting the presence or absence of an image signal, and a means for detecting the presence or absence of an image signal for a certain period of time or more. An image display device comprising means for reversing the polarity of a voltage applied to a liquid crystal between the first electrode and the second electrode when no input is received. 2. As means for detecting the presence or absence of the image signal,
2. The image display device according to claim 1, wherein the image display device detects the presence or absence of a horizontal synchronization signal or a vertical synchronization signal of a video signal. 3. As means for detecting the presence or absence of the image signal,
2. The image display device according to claim 1, further comprising means for comparing the average voltage level of the video signal with a reference voltage.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3360881A JPS57147690A (en) | 1981-03-09 | 1981-03-09 | Picture display unit |
| GB8206127A GB2096815B (en) | 1981-03-09 | 1982-03-02 | Liquid crystal picture display device |
| DE19823208475 DE3208475A1 (en) | 1981-03-09 | 1982-03-09 | IMAGE PLAYER |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3360881A JPS57147690A (en) | 1981-03-09 | 1981-03-09 | Picture display unit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57147690A JPS57147690A (en) | 1982-09-11 |
| JPS6161679B2 true JPS6161679B2 (en) | 1986-12-26 |
Family
ID=12391171
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3360881A Granted JPS57147690A (en) | 1981-03-09 | 1981-03-09 | Picture display unit |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JPS57147690A (en) |
| DE (1) | DE3208475A1 (en) |
| GB (1) | GB2096815B (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59113420A (en) * | 1982-12-21 | 1984-06-30 | Citizen Watch Co Ltd | Driving method of matrix display device |
| JPS59116685A (en) * | 1982-12-23 | 1984-07-05 | セイコーインスツルメンツ株式会社 | Image display |
| JPS6083477A (en) * | 1983-10-13 | 1985-05-11 | Sharp Corp | Driving circuit of liquid crystal display device |
| GB2149176B (en) * | 1983-10-26 | 1988-07-13 | Stc Plc | Addressing liquid crystal displays |
| US4955697A (en) * | 1987-04-20 | 1990-09-11 | Hitachi, Ltd. | Liquid crystal display device and method of driving the same |
-
1981
- 1981-03-09 JP JP3360881A patent/JPS57147690A/en active Granted
-
1982
- 1982-03-02 GB GB8206127A patent/GB2096815B/en not_active Expired
- 1982-03-09 DE DE19823208475 patent/DE3208475A1/en not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57147690A (en) | 1982-09-11 |
| GB2096815A (en) | 1982-10-20 |
| GB2096815B (en) | 1984-08-15 |
| DE3208475A1 (en) | 1982-09-16 |
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