JPS6150394A - Mounting unit - Google Patents
Mounting unitInfo
- Publication number
- JPS6150394A JPS6150394A JP59171952A JP17195284A JPS6150394A JP S6150394 A JPS6150394 A JP S6150394A JP 59171952 A JP59171952 A JP 59171952A JP 17195284 A JP17195284 A JP 17195284A JP S6150394 A JPS6150394 A JP S6150394A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- electrode
- display panel
- semiconductor element
- lead group
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Combinations Of Printed Boards (AREA)
- Wire Bonding (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、実装体たとえばＥＬディスプレイパネルや液
晶ディスプレイパネル等の多数の電極を有する電極群と
、これを駆動する半導体素子との接続の構造に関するも
のである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a connection structure between an electrode group having a large number of electrodes in a package such as an EL display panel or a liquid crystal display panel and a semiconductor element for driving the electrode group. It is.
従来例の構成りその問題点
近年、液晶ディスプレイパネルやＥＬディスプレイパネ
ルを用いて、画像表示や文字表示する機器が増加してい
る。これらディスプレイバイ、ルは、肉厚を薄くできる
特徴はあるものの、鮮明な画像や高精細度のキャラクタ
−を表示する場合、前記ディスプレイパネルに形成され
ている走青線の数を増やさなければならない。この事は
、液晶ディスプレイやＥＬディスプレイがよりＣＲＴの
表示性能に接近し、附加価値を高めるうえでも不可欠の
事である。ところが、前・記走査線の数を増やしてしま
うと、ディスプレイパネルの電極数も比例して増大する
。電極数の増大は、これを駆動するための駆動用ＬＳＩ
の数も増大する結果となるものである。したがって、液
晶ディスプレイパネルやＥＬディスプレパネルの性能向
上を計ろうとすれば、必然的Ｋ、駆動用ＬＳＩとディス
プレイパネルの電極との接続点数が増え、信頼性を低下
さす原因となるばかりか、実装コストが著しるしく増大
し、実用化をはばむ原因となっている。Conventional Structures and Problems In recent years, the number of devices that display images and characters using liquid crystal display panels and EL display panels has increased. Although these display panels have the feature that they can be made thinner, in order to display clear images or high-definition characters, it is necessary to increase the number of blue lines formed on the display panel. . This is essential for liquid crystal displays and EL displays to approach the display performance of CRTs and increase added value. However, if the number of scanning lines is increased, the number of electrodes of the display panel will also increase proportionally. The increase in the number of electrodes requires a driving LSI to drive them.
This results in an increase in the number of Therefore, when trying to improve the performance of liquid crystal display panels and EL display panels, the number of connection points between the drive LSI and the electrodes of the display panel inevitably increases, which not only causes a decrease in reliability but also increases mounting costs. has increased significantly, which is a cause of hindering practical application.
第１図で従来の構成を説明する。半導体素子１は、セラ
ミック基板または樹脂基板で構成される回路基板２にダ
イボンディングされ、半導体素子１の電極と回路基板２
の配線パターン３，３′ とは極細のワイヤー４で接続
されている。またワイヤー４で接続された半導体素子上
は、エポキン。A conventional configuration will be explained with reference to FIG. The semiconductor element 1 is die-bonded to a circuit board 2 made of a ceramic substrate or a resin substrate, and the electrodes of the semiconductor element 1 and the circuit board 2 are bonded to each other.
It is connected to the wiring patterns 3, 3' by an extremely thin wire 4. Also, on the semiconductor element connected by wire 4 is Epokin.
７リコーン樹脂等の保護樹脂５で覆われている。7 Covered with protective resin 5 such as silicone resin.
回路基板２には複数個の半導体素子が搭載されるもので
ある。A plurality of semiconductor elements are mounted on the circuit board 2.
一方、ディスプレイパネル１ｏは、例えばガラス基板１
１上に電極１２がｉＴｏ等の材料で構成されているもの
である。半導体素子１の電極と接続１ され
ている回路基板２の配線パターン３と前記ディスプレイ
パネル１ｏの電極とは、ポリイミドフィルム１３をベー
スにしたＣｕ箔のパターン１４を有するフレキ／プル基
板１６で接続される。フレキシブル基板１６の回路基板
側の接続は通常半田づけで実装され、反対側のディスプ
レイパネルの電極１２とは、これもまたｉＴｏ膜上に半
田づけ可能な材料を被着せしめ、半田づけするものであ
る。フレキ７ブル基板１６のかわりに、カーボン粉末を
接着剤で固めた基板も用いられるが、ＥＬディスプレイ
の如き、高電圧、大電流を印加するものには著しるしく
不向きである。On the other hand, the display panel 1o includes, for example, a glass substrate 1
1, an electrode 12 is made of a material such as iTo. The wiring pattern 3 of the circuit board 2 connected to the electrode of the semiconductor element 1 and the electrode of the display panel 1o are connected by a flexible/pull board 16 having a Cu foil pattern 14 based on a polyimide film 13. Ru. Connections on the circuit board side of the flexible substrate 16 are usually mounted by soldering, and the electrodes 12 of the display panel on the opposite side are also made by depositing a solderable material on the iTo film and soldering. be. Instead of the flexible substrate 16, a substrate made of carbon powder hardened with an adhesive can also be used, but this is extremely unsuitable for applications where high voltage and large current are applied, such as EL displays.
第１図の構成では、半導体素子１の電極からディスプレ
イパネルの電極に到達するのに、４箇所の接続点を有す
るものである。すなわち、半導体素子１の電極とワイヤ
ー４．ワイヤー４と回路基板２の配線パターン３．配線
パターン３とフレキンプル基板、それにフレキシブル基
板とディスプレイパネルの電極の合計４箇所の接続点に
なる。The configuration shown in FIG. 1 has four connection points from the electrode of the semiconductor element 1 to the electrode of the display panel. That is, the electrodes of the semiconductor element 1 and the wires 4. Wiring pattern of wire 4 and circuit board 2 3. There are a total of four connection points: the wiring pattern 3, the flexible substrate, and the electrodes of the flexible substrate and display panel.
この事は、駆動用の半導体素子の数が増加するに従がい
、半導体素子の数の４倍の接続点となり、これら接続点
は著しるしく接続の信頼性を低下さすものであった。ま
た、半導体素子を搭載するだめの回路基板やフレキンプ
ル基板等を必要とし、実装コストを引き上げる結果とな
っていた。As the number of driving semiconductor elements increases, the number of connection points becomes four times the number of semiconductor elements, and these connection points significantly reduce the reliability of the connection. Further, a circuit board, a flexible board, etc., on which the semiconductor element is mounted are required, resulting in an increase in mounting costs.
さらに、またフレキシブル基板とディスプレイパネルの
電極との接続において、前記フレキンプル基板やディス
プレイパネルの熱膨張や機械的歪のために、接続が不完
全となり接触抵抗の著しい増大をまねき接続不良を発生
し、ディスプレイパネルの表示品質を損なっていた。Furthermore, in the connection between the flexible substrate and the electrodes of the display panel, due to thermal expansion and mechanical distortion of the flexible substrate and the display panel, the connection becomes incomplete, resulting in a significant increase in contact resistance and a connection failure. The display quality of the display panel was impaired.
発明の目的
本発明はこのような従来の問題に鑑み、ディスプレイパ
ネルと半導体素子の接続をより信頼性高い方法で形成す
ることを目的とする。OBJECTS OF THE INVENTION In view of these conventional problems, an object of the present invention is to form a connection between a display panel and a semiconductor element using a more reliable method.
発明の構成
本発明は、リードを有する可撓性樹脂フィルム上に半導
体素子を直接搭載し、リードの他端をディスプレイパネ
ルの電極を接合するが、この接合領域の前記リードの他
端において、可撓性樹脂フィルムを残存させず、リード
のみでディスプレイパネルの電極に接合する構成であっ
て、接続点が著しく少なく、信頼性が高く、実装コスト
の安価な実装体を実現可能とするものである。Structure of the Invention In the present invention, a semiconductor element is directly mounted on a flexible resin film having leads, and the other ends of the leads are bonded to electrodes of a display panel. The structure is such that the flexible resin film does not remain and is bonded to the electrodes of the display panel using only the leads, making it possible to realize a mounted body with significantly fewer connection points, high reliability, and low mounting cost. .
実施例の説明 第２図で本発明の実装体の実施例を説明する。Description of examples An embodiment of the mounting body of the present invention will be explained with reference to FIG.
基板１９はポリイミドまたはガラス人りエポキン等の可
撓性樹脂フィルム２０［Ｓｎメッキ処理したＣｕ箔パタ
ーン２１．２１’が貼付され、半導体素子１を接続する
領域において開孔部２２が形成されている。開孔部２２
はＣｕ箔による配線パターンのリード２１．２１’が突
出し、かつ延在され、リード２１の一端は、後述する半
導体素子１の電極と接合され、他端はディスプレイパネ
ル１ｏの電極１２の領域まで連続して延在するが、ディ
スプレイパネル１ｏの電極１２との接合領域において、
可撓性樹脂フィルム２ｏに開孔部２４が形成され、リー
ド２１のみが開孔部２４が延在し、リード２１の最終端
において、可撓性樹脂フィルム２０′が一部リード２１
上に残存した構成である。The substrate 19 has a flexible resin film 20 (Sn-plated Cu foil pattern 21, 21') such as polyimide or glass-filled Epoquin pasted thereon, and an opening 22 is formed in the area where the semiconductor element 1 is connected. . Opening part 22
Leads 21 and 21' of the wiring pattern made of Cu foil protrude and extend, and one end of the lead 21 is connected to an electrode of a semiconductor element 1, which will be described later, and the other end continues to the area of the electrode 12 of the display panel 1o. However, in the joint area with the electrode 12 of the display panel 1o,
An opening 24 is formed in the flexible resin film 2o, and the opening 24 extends only through the lead 21. At the final end of the lead 21, the flexible resin film 20' partially closes the lead 21.
This is the configuration that remained above.
半導体素子１の電極には、例えば高さ２ｏ〜３゜７４ｍ
のＡｕによる突起１６が形成されており、この突起と可
撓性樹脂フィルム２ｏの開孔部２２に突出したリード２
１．２１’ とＡｕ−３ｎの合金で接合されている。１
だ半導体素子１の表面には開孔部２２を通して保護樹脂
２３が滴下され、半導体素子の信頼性をより一層高める
ものである。一方、ディスプレイパネル１ｏの電極１２
と半導体素子１に接合され延在したリード２１との接続
は、電極１２とリード２１との間に有機接着材料を介在
させ、圧接、硬化し固定するものである。２４は、接合
領域のり一ド２１を保護するためと、接合強度を更に高
めるための樹脂である。For example, the electrode of the semiconductor element 1 has a height of 2° to 3°74 m.
A protrusion 16 made of Au is formed, and this protrusion and the lead 2 protruding into the opening 22 of the flexible resin film 2o are formed.
1.21' and Au-3n alloy. 1
A protective resin 23 is dropped onto the surface of the semiconductor element 1 through the opening 22, thereby further increasing the reliability of the semiconductor element. On the other hand, the electrode 12 of the display panel 1o
The connection between the electrode 12 and the extending lead 21 bonded to the semiconductor element 1 is achieved by interposing an organic adhesive material between the electrode 12 and the lead 21, and fixing the electrode 12 and the lead 21 by pressing and hardening. 24 is a resin for protecting the bonding area glue 21 and further increasing the bonding strength.
前記有機接着材料は、電極１２側もしくは可撓性樹脂フ
ィルム２ｏを含めたリード側２１もしくは両方の側にあ
らかじめ塗布、貼付しておき、電極１２とリード２１と
を圧接して硬化せしめても良い。硬化は熱硬化でも良い
が、光硬化により瞬系いを分散させたものを用いること
もできる。The organic adhesive material may be applied and attached in advance to the electrode 12 side, the lead side 21 including the flexible resin film 2o, or both sides, and then hardened by pressing the electrode 12 and the lead 21 together. . Curing may be carried out by thermosetting, but it is also possible to use a material in which instantaneous particles are dispersed by photocuring.
本発明の実施例によれば、接続箇所が２箇所であるばか
りか、ディスプレイパネル１１の電極１２と接するリー
ド ２１上には可撓性樹
脂フィルム２０が存在しない構成であるから、基板１９
やディスプレイパネル１゜のガラス板１１が熱膨張等で
変形し、応力が加わっても、ディスプレイパネル１ｏの
電極１２との接合領域は、柔軟性のあるＣｕ箔材であり
、かつ、リード２１が分離独立しているため、熱膨張や
応力を各々のり−ド２１が吸収するので、接合部が損傷
することがない。According to the embodiment of the present invention, not only are there two connection points, but also the flexible resin film 20 is not present on the lead 21 in contact with the electrode 12 of the display panel 11.
Even if the glass plate 11 of the display panel 1o is deformed due to thermal expansion or the like and stress is applied, the bonding area with the electrode 12 of the display panel 1o is made of a flexible Cu foil material, and the leads 21 are Since they are separate and independent, each glued 21 absorbs thermal expansion and stress, so the joints will not be damaged.
他の実施例を第３図でのべる。第３図の構成（でおいて
は、ディスプレイパネル１ｏの電極１２と接合する！／
−ド２１上に部材３ｏを固定した構成である。前記部材
３０はリード２１を電極１２ＶＣ接合せしめｆｃ後、保
護樹脂２５を介して、セラミック、金属、ガラス等で形
成した板をリード２１上に固定するものである。このよ
うな構成により、電極１２と接合しているリード２１を
外気から完全に遮断することができるものである。Another embodiment is shown in FIG. In the configuration shown in FIG. 3, it is connected to the electrode 12 of the display panel 1o!/
- The member 3o is fixed on the board 21. In the member 30, after the lead 21 is bonded to the electrode 12VC fc, a plate made of ceramic, metal, glass, etc. is fixed on the lead 21 via a protective resin 25. With such a configuration, the lead 21 connected to the electrode 12 can be completely isolated from the outside air.
次に本発明の実施例の製造方法を第４図でのべる。可撓
性を有する基板１９の可撓性樹脂フィルム２０けポリイ
ミドまたはガラス人りエポキシ等で数１ｏｍの長尺で幅
３６閣を有し、幅の両端に可撓性樹脂フィルム２０の搬
送用のスプロケット孔を形成し、半導体素子１を接合す
る領域には。Next, a manufacturing method according to an embodiment of the present invention will be described with reference to FIG. The flexible resin film 19 of the flexible substrate 19 is made of polyimide or glass epoxy, and has a length of several 1 ohm and a width of 36 mm. In the area where the sprocket hole is formed and the semiconductor element 1 is bonded.
少なくとも前記半導体素子１よりも太き目の開孔部２２
が設けられ、この開孔部にはＳｎメッキ処理したＣｕ箔
のリード２１．２１’が形成されているものである。Opening portion 22 that is thicker than at least the semiconductor element 1
is provided, and leads 21 and 21' made of Sn-plated Cu foil are formed in this opening.
一方半導体素子１には既に説明したようにＡｕ。On the other hand, the semiconductor element 1 is made of Au as already explained.
Ｃｕ、Ａｇ、半田等による突起１５があらかじめ形成さ
れている。可撓性樹脂フィルム２ｏのリード群２１．２
１’ と半導体素子１の突起１６とを位置合せし、ボン
ディングツール３１で加熱加圧せしめる（第４図ａ）。Protrusions 15 made of Cu, Ag, solder, etc. are formed in advance. Lead group 21.2 of flexible resin film 2o
1' and the protrusion 16 of the semiconductor element 1 are aligned and heated and pressed using the bonding tool 31 (FIG. 4a).
ボンディングツール３１での加熱加圧による半導体素子
１はリード群２１．２１’に接合され、第４図（、）の
状態で電気的測定を行ない、打抜き金型３２で所定の寸
法に可撓性樹脂フィルム２ｏを切断する（第４図ｂ）。The semiconductor element 1 is bonded to the lead group 21, 21' by heating and pressing with the bonding tool 31, electrical measurements are performed in the state shown in FIG. The resin film 2o is cut (FIG. 4b).
打抜金型３２を下降せしめれば、可撓性樹脂フィルム２
ｏけ半導体素子１を含めて第４図（ｃ）の状態に切断さ
れるものである。When the punching die 32 is lowered, the flexible resin film 2
It is cut into the state shown in FIG. 4(c) including the exposed semiconductor element 1.
次いでディスプレイパネル１０の電極と可撓性樹脂フィ
ルム２０のリード群２１との間に光硬化性もしくは熱硬
化性樹脂材を塗布もしくは貼付けし７ておき、ツール３
３で圧接せしめ、光照射もしくは熱を加えれば第４図（
ｄ）の如くの実施体を製造することができるものである
。Next, a photocurable or thermosetting resin material is applied or pasted between the electrodes of the display panel 10 and the lead group 21 of the flexible resin film 20, and then the tool 3
Pressure-weld in step 3 and apply light or heat to create the image shown in Figure 4 (
d) can be manufactured.
発明の効果
■ ディスプレイパネルの電極と接合するＩＪ−ト群の
可撓性樹脂フィルムを除去して接合するので、ディスプ
レイパネルや半導体素子を載置した可撓性樹脂フィルム
の熱膨張や機械的応力が、前記接合領域に作用しても、
互いに分離独立し、かつ柔軟性を有するＣｕ箔材料を用
いた構造であるため、発生した応力を全て吸収できる。Effects of the invention ■ Since the flexible resin film of the IJ-tooth group that is bonded to the electrodes of the display panel is removed and bonded, the thermal expansion and mechanical stress of the flexible resin film on which the display panel and semiconductor elements are mounted is reduced. However, even if it acts on the bonding region,
Since the structure uses Cu foil material that is independent and separate from each other and has flexibility, it is possible to absorb all the generated stress.
したがって接合不良の発生がなく、信頼度の著しく高い
実装体を実現できる。Therefore, a mounting body with extremely high reliability can be realized without the occurrence of bonding defects.
■ １だ、接続の箇所が２箇所と著しく少ないので接続
の信頼性が著しく高く、この接続箇所の減少により、従
来必要としていた接続のための領域（面積）が不必要と
なるから実装面積が小さくなり、小型化・薄型化の商品
的価値を高めることができる。■ 1. The reliability of the connection is extremely high because the number of connection points is extremely small at only two, and due to this reduction in the number of connection points, the area (area) for connections that was previously required is unnecessary, so the mounting area is reduced. This makes it possible to increase the commercial value of miniaturization and thinning.
■ 長尺の可撓性樹脂フィルムに半導体素子を接合し、
これを連続して所定の寸法に打抜き、ディスプレイパネ
ルの電極に接合するのみであるから、生産設備の投資が
著じく少なく、実装コストが安価になる効果を有する。■ Semiconductor elements are bonded to a long flexible resin film,
Since this is simply punched out to a predetermined size and bonded to the electrodes of the display panel, the investment in production equipment is significantly reduced and the mounting cost is reduced.
第１図は従来の実装体の構成断面図、第２図は本発明の
一実施例の実装体の構成断面図、第３図は本発明の池の
実施例の実装体の構成断面図、第４図（ａ）〜（ｄ）は
本発明の一実施例の実装体の製造方法を示す工程断面図
である。
１・・・・・半導体素子、１ｏ・・・・ディスプレイバ
ネｌ ル、１２・・・・・・ディスプレイノ
ぐネルの電極、１６・・・・・・突起、２０・・・・・
・可撓性樹脂フィルム、２１．２１’蔦・リード群、リ
ード。
剪１図 １．５FIG. 1 is a sectional view of the structure of a conventional mounting body, FIG. 2 is a sectional view of the structure of a mounting body of an embodiment of the present invention, and FIG. 3 is a sectional view of the structure of a mounting body of an embodiment of the present invention. FIGS. 4(a) to 4(d) are process cross-sectional views showing a method of manufacturing a mounting body according to an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1...Semiconductor element, 1o...Display panel, 12...Display nozzle electrode, 16...Protrusion, 20...
・Flexible resin film, 21.21' ivy/lead group, lead. Pruning 1 diagram 1.5
Claims (2)
、前記可撓性フィルムの開孔部に突出して半導体素子の
電極パッドに接合され、前記延在したリード群の他端に
おいて、前記可撓性フィルムを有しない領域と前記リー
ド群の最端に前記可撓性フィルムを残存させた領域を有
し、前記可撓性フィルムを有しない領域の前記リード群
が絶縁基板上に形成された相対する電極群と接触し、前
記リード群と電極群とが少なくと樹脂材により固定され
たことを特徴とする実装体。(1) One of the lead groups formed on the flexible film protrudes into the opening of the flexible film and is bonded to the electrode pad of the semiconductor element, and at the other end of the extended lead group, The lead group has an area without the flexible film and an area where the flexible film remains at the end of the lead group, and the lead group in the area without the flexible film is formed on an insulating substrate. 1. A mounted body, wherein the lead group and the electrode group are fixed by at least a resin material.
のリード群と電極群との接触部において、少なくとも前
記リード群上に部材を載置し、前記接触部を含め、リー
ド群と部材間に樹脂を介在させたことを特徴とする特許
請求の範囲第１項記載の実装体。(2) At the contact portion between the lead group and the electrode group in the area where the flexible film of the lead group at the other end does not exist, a member is placed on at least the lead group, and the member is placed on the lead group including the contact portion. The package according to claim 1, characterized in that a resin is interposed between the members.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59171952A JPS6150394A (en) | 1984-08-18 | 1984-08-18 | Mounting unit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59171952A JPS6150394A (en) | 1984-08-18 | 1984-08-18 | Mounting unit |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4304090A Division JPH02237044A (en) | 1990-02-23 | 1990-02-23 | Manufacture of mounting body |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6150394A true JPS6150394A (en) | 1986-03-12 |
Family
ID=15932827
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59171952A Pending JPS6150394A (en) | 1984-08-18 | 1984-08-18 | Mounting unit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6150394A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03184023A (en) * | 1990-10-29 | 1991-08-12 | Seiko Epson Corp | Joint structure of liquid crystal panel and joining method thereof |
| WO2003077308A1 (en) * | 2002-03-13 | 2003-09-18 | Mitsui Mining & Smelting Co., Ltd. | Mold release layer transferring film and laminate film |
| JP2006351765A (en) * | 2005-06-15 | 2006-12-28 | Shimadzu Corp | Integrated circuit package and optical detector or radiation detector provided therewith |
| US7173322B2 (en) | 2002-03-13 | 2007-02-06 | Mitsui Mining & Smelting Co., Ltd. | COF flexible printed wiring board and method of producing the wiring board |
-
1984
- 1984-08-18 JP JP59171952A patent/JPS6150394A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03184023A (en) * | 1990-10-29 | 1991-08-12 | Seiko Epson Corp | Joint structure of liquid crystal panel and joining method thereof |
| WO2003077308A1 (en) * | 2002-03-13 | 2003-09-18 | Mitsui Mining & Smelting Co., Ltd. | Mold release layer transferring film and laminate film |
| US7173322B2 (en) | 2002-03-13 | 2007-02-06 | Mitsui Mining & Smelting Co., Ltd. | COF flexible printed wiring board and method of producing the wiring board |
| US7255919B2 (en) | 2002-03-13 | 2007-08-14 | Mitsui Mining & Smelting Co., Ltd. | Mold release layer transferring film and laminate film |
| CN100334700C (en) * | 2002-03-13 | 2007-08-29 | 三井金属矿业株式会社 | Mold release layer transferring film and laminate film |
| JP2006351765A (en) * | 2005-06-15 | 2006-12-28 | Shimadzu Corp | Integrated circuit package and optical detector or radiation detector provided therewith |
| JP4604865B2 (en) * | 2005-06-15 | 2011-01-05 | 株式会社島津製作所 | Method for removing an integrated circuit from an integrated circuit package |
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