JPS6145339A - Computer - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Application The present invention relates to the field of digital computers employing microcode.

[Conventional technology]

Microcode is often used in digital computers of all types. (Microcode is sometimes referred to as microcode instructions, microprograms, and other terms.) Generally, microcode uses sub-operations that are not normally accessible to computer programmers. In microprocessors, microcode is most commonly incorporated into the chip via mask programming. In large computers, read-only memory or random access memory is used to store microcode. Random access memory is writable control storage (WCS or Writable).
e Control 5tores). There are many integrated circuits on the market that are specifically designed for storing and implementing microcode. For example, various configurations of microprogram sequencers are available that generate addresses for accessing microcode. Pipeline registers, conditional code multiplexers, next address controllers, etc. are also available.

Hardware problems have been experienced in microcoded computers, particularly when wide microcode instructions are used and the computer is constructed from several printed circuit boards, with reference to Figure 1. explain. Generally, these include difficulty dissipating heat from the WCS and diagnostic problems in large equipment.

Prior art prior to the present invention is exemplified in manufacturer's data collections for commercially available components for use in microcoded computers. For example, Advanced
Advanced Microde
1983 Data Book (Bipolar Microprocessor Logic and Interfaces) published by
lar Microprocessor Logic
and Interface) J's 5-108 to 5-1
Examples of conventional techniques are given on page 39 and pages 8-22 to 8-26.

7>? on a certain conventional computer? In some cases, a two-level control store is used. The sequencer addresses vertical storage (generally deep but narrow word width storage). Vertical storage provides addresses for separate horizontal storage (each horizontal storage is generally a shallow, wide word width storage). In this case, the output of the vertical storage is provided to horizontal storage on various printed circuit boards.

Provides wide word width control signals (eg, microinstructions) from horizontal storage. This configuration optimizes the use of storage capacity. This arrangement has the disadvantage that it requires additional cycles to provide address space for horizontal storage.

[Summary of the invention]

The present invention is intended for use in a computer having a microaddress sequencer for serializing a control memory (lever) that provides microinstructions to the computer. In the present invention, a plurality of control stores are used, each physically separated from each other.

Microcode address signals from the sequencer are provided on buses to separate control stores. In this way,
Heat from the control storage is conducted to several locations within the computer. Furthermore, for example, each printed circuit board with control memory can be diagnosed substantially independently of the rest of the computer.

〔Example〕

Improvements in digital computers using microcode will be described below. In the following description, numerous specific details are set forth, such as word lengths of determinations, in order to provide a thorough understanding of the invention, but the invention may be practiced without these specific details. This will be clear to those skilled in the art. In other instances, well-known circuits are shown in Pronk diagrams in order not to obscure the present invention in unnecessary detail. Before explaining the preferred embodiment of the present invention, the conventional technology will first be explained.

BACKGROUND OF THE INVENTION First, reference is made to FIG. In a typical conventional computer using Lebel microcode, the instruction register 1
1 is coupled to a data bus 10 of the computer. A portion of the instructions from register 11 is used as one input to microprogram sequencer 12. /-The controller 12 typically receives other inputs, such as conditional inputs (not shown in Figure 1). 7-Kensa 12 sets the address to WCS
Give to 13. The output from this WCS is coupled to the microcode instruction register 14, from which output signals control many aspects of the computer's operation.

Register 14 is coupled to diagnostic and WC8 controller 15.

This controller 15 gives No. 18 to the instruction register 11.

Heat dissipation is a problem for the conventional WCS shown in FIG. 1, especially when wide microinstruction words are used. Since static RAM has a short access time, WCSs are very often constructed from static RAM. For purposes of illustration, assume that the WCS provides a 64-bit microinstruction word to register 14 and stores the word in register 16. If 16 static RAMs are used, 64 chips are required. These static RAMs generate more heat than most other integrated circuits, resulting in hot spots. Therefore, provision must be made to remove more heat from the WCS.

For diagnosis, the controller 15 sends special commands to the register 1.
It can be placed within 1. Microinstructions specifically configured for testing are then available in register 14. In order for testing to occur, the microcode system shown in FIG. 1 must be operational. Furthermore,
Only one part of the computer can be effectively tested at a time. That is, the output of register 14 can be used to interrogate circuits on one printed circuit board, then the next printed circuit board, and so on.

The wide microinstruction words from register 14 are typically distributed throughout the computer. The distribution must be left as is in order to perform the test. Problems with the connectors that distribute some or all of the register 14 output from one printed circuit board to another may prevent completion of the diagnostic routine.

PREFERRED EMBODIMENTS OF THE INVENTION The present invention is used in a computer system which is described in detail in pending US patent application Ser.

To understand the present invention, it is necessary to understand that seven computers consist of several printed circuit boards (e.g., memory board, sequencer board,
- The detailed operation of the computer is not necessary, except that it may be helpful to know that it is being built on a MAL board and a system interface board).

This computer uses microcode with a word width of approximately 200 pits (16 words). The problems described above for conventional computers predictably
This becomes extremely large for a wide word width such as 0 focus.

In the present invention, microcode addresses are provided directly from the sequencer to a plurality of separate writable control stores. This is based on the prior art shown in FIG.
The sequencer 12 has one writable control memory (1
(generally involving multiple circuits all packaged together on a single printed circuit board) is a departure from The present invention distributes microaddresses rather than microinstructions.

Note that even in conventional computers using two levels of microcode storage, the first level addresses are not distributed.

A computer using the invention is built on several printed circuit boards. The printed circuit boards are shown in FIG. 2 as three printed circuit boards 1.2.3. Broken line 24.2
6 is used to indicate the boundaries of physically separated printed circuit boards. It is not important to the invention which parts of the computer are provided on separate printed circuit boards; for example, it is possible to provide storage on one printed circuit board;
Another printed circuit board may be provided with the M-chip, a third printed circuit board may be provided with the input/output logic, and so on. Only the distributed microaddressing device and related hardware of the present invention are shown in FIG. That is, circuitry controlled by microinstructions is not shown in FIG.

The present invention again uses the microprogram sequencer 22 as in the prior art. However, the output of the sequencer (microaddress) is provided by bus 20 to the printed circuit board 1.2.3 of the computer. The microaddress bus is coupled to a multiplexer (MUX) 30 on each printed circuit board of the computer using microcode. The output of multiplexer 30 is used to address writable control storage [(WC8) 32. The output of the writable control store is coupled to a microinstruction register 34, the output of which is used in a conventional manner to control various functions of the printed circuit board. In the embodiment described here, W
C332 is loaded serially from diagnostic controller 38 via line 42 and microinstruction register 34 during initialization.

In accordance with the present invention, the writable control storage (first level) is separated into a plurality of separate storage devices and placed on each printed circuit board as shown in FIG.

The portions of the microinstructions required for a particular printed circuit board are stored on that printed circuit board.

That is, the portion of the microinstructions required by the printed circuit board 1 is stored in its writable control memory 32 and is not provided in duplicate to the writable control memory 32 of the printed circuit board 3. Similarly, portions of the microinstructions required by printed circuit board 3 are stored only in its WC 832. Therefore, the storage required for each WC8 is small compared to the total capacity of the WC8. This facilitates heat dissipation by dispersing the heat from one large print 1Wcs 13 shown in FIG. 1 between several printed circuit boards in the computer. The placement of WC8 on each printed circuit board can, and typically is, different.

That is, the portions of the microinstructions that are used on each printed circuit board can be different.

In the embodiment described herein, each printed circuit board 1
, 2.3, the diagnostic bus 4-0 is also distributed.

This bus is connected to the diagnostic controller 38 present on every printed circuit board.
is combined with Each controller 38 has a microprocessor (
part number 8051) and a counter that provides an address (on line 36) to multiplexer 30t- to WC 832. In this way, the testing of the printed circuit board 1 can be carried out independently (or almost independently) of the testing of other printed circuit boards.

For this test, the sequencer 22 can be activated and the test can be performed even if there are discontinuities in the bus 20. This saves on mold costs compared to traditional testing, which requires a microinstruction sequencer and distribution lines for testing.

The present invention requires fewer bus lines through the computer for microcode operations. Usually the number of address lines is significantly less than the number of lines at the output terminals of the address register. For example, 14 microaddress lines
This gives a microinstruction capacity of 6. Compared to this,
In a computer with a word width of 200 pintos, more than 14 #i! lines are needed to couple the code to each printed circuit board of the computer. should normally be used.

Although the embodiment described herein shows a computer built on several printed circuit boards, the invention can also be used where the computer is separated into separate physical structures. For example, if the computer is made of some integrated circuit, the microaddress bus can be connected to a circuit that has its own WC8.

The above describes improvements to computers that use microcode. The writable control storage is separated into several discrete storage devices and the microaddresses are distributed among the separate storage devices.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a portion of a conventional Lebel writable control storage device, and FIG. 2 is a block diagram of a portion of a computer including the present invention. 20... Distributed micro address bus, 22.
...Sequencer, 30...Multiplexer, 38
...Diagnostic controller, 32...Writable control storage device, 40...Diagnostic bus O

Claims (8)

[Claims] (1) A computer that uses a microaddress sequencer to address a control memory that provides microinstructions for the computer, comprising: a plurality of control memory units, each physically separated from each other; a bus coupled to the plurality of control stores for distributing addresses from the sequencer to the plurality of control stores, thereby providing an improved microcode device. (2) A computer according to claim 1, wherein the control storage device is a writable control storage device including static random access memory. (3) A computer including a plurality of printed circuit boards controlled at least in part by microcode instructions, comprising: a microaddress sequencer; and a plurality of control storage devices, one on each of the plurality of printed circuit boards; , a microaddress bus coupling addresses from the microaddress sequencer to each of the plurality of control storage devices, thereby providing an improved microcode device. (4) A computer according to claim 3, wherein each of the control storage devices is a writable control storage device including static random access memory. 5. A computer according to claim 3, including a plurality of multiplexers each coupling said address from said microaddress bus to one of said control stores. (6) The computer of claim 5, wherein each of said printed circuit boards receives a second bus for use during diagnostics, said second bus being coupled to said microprocessor; One processor is provided on each of the printed circuit boards, and during diagnostics, the microprocessor couples signals to the control storage via the multiplexer to allow each of the printed circuit boards to be tested independently. A computer characterized by: (7) In a computer that uses a microaddress sequencer to address a control memory that provides microinstructions for the computer, the control memory is configured to facilitate the dissipation of heat generated by the control memory. separating into a plurality of physically separated control storage devices; and providing a microaddress bus coupling microaddresses from the microaddress sequencer to the plurality of separated control storage devices; A method for improving computer operation, characterized in that an improved microcode device is realized. (8) In a computer comprising a plurality of printed circuit boards controlled at least in part by microcode instructions received from a control memory addressed by a microaddress sequencer, the microprogram requested by each of said printed circuit boards; the control memory in a plurality of separate control memory devices, one on each of the printed circuit boards, such that portions of the microprogram to be processed are stored on only one of the printed circuit boards requesting those portions of the microprogram; and providing a bus coupling microaddresses from the microaddress sequencer to the plurality of separate control storage devices, thereby providing an improved microcoded device. A method for improving the operation of the computer.