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JPS6142940A - 半導体用リ−ドフレ−ム - Google Patents

半導体用リ−ドフレ−ム

Info

Publication number
JPS6142940A
JPS6142940A JP59165489A JP16548984A JPS6142940A JP S6142940 A JPS6142940 A JP S6142940A JP 59165489 A JP59165489 A JP 59165489A JP 16548984 A JP16548984 A JP 16548984A JP S6142940 A JPS6142940 A JP S6142940A
Authority
JP
Japan
Prior art keywords
lead frame
semiconductor
alloy
plating
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59165489A
Other languages
English (en)
Inventor
Osamu Yoshioka
修 吉岡
Ryozo Yamagishi
山岸　良三
Sadao Nagayama
長山　定夫
Yoshiaki Wakashima
若島　喜昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Hitachi Ltd
Original Assignee
Hitachi Cable Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd, Hitachi Ltd filed Critical Hitachi Cable Ltd
Priority to JP59165489A priority Critical patent/JPS6142940A/ja
Publication of JPS6142940A publication Critical patent/JPS6142940A/ja
Pending legal-status Critical Current

Links

Classifications

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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582—Metallic layers on lead frames
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    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 ［産業上の利用分野コ 本発明はＩＣやトランジスターなどの半導体装置を製造
する場合に用いられる半導体用リードフレームに関する
。
［従来の技術］ 従来、樹脂モールドしてなるＩＣやトランジスターを製
造する場合には、半導体素子例えば３ｉベレツトをリー
ドフレームに接続するダイボンディング及びＳ１ベレツ
トとリードフレームの内部リード端子とを金又はアルミ
の細線で接続配線するワイヤボンディングがそれぞれ行
なわれる。リードフレームにはコバール、４２合金など
の鉄系材料、あるいは鉄入り銅などの銅系材料が使用さ
れるが、前記した半導体装置製造時の接続性を満足なも
のにするため、普通ＡｕやＡｇなどの貴金属めっきがそ
の表面に施される。
貴金属は表面に酸化膜を形成しないために良好な接続性
を示すが、高価であるという欠点があり、そこで貴金属
めっきの使用ｍを低減すべくリードフレームの上記接続
に供する部分すなわち機能部に貴金属めっきを部分的に
施すことが一般に行なわれる。さらにリードフレームか
ら貴金属めっきをなくすることも考えられ、例えばＮｉ
めりきだけでも表面層を形成したリードフレームがある
。
［発明が解決しようとする問題点］ しかし、このＮｉめっきは一般にはその表面に安定な酸
化膜を形成するために耐変色性及び耐熱性に優れた半田
付可能な数少ない金属であるが、表面酸化し易いことか
らＡｇペーストあるいは半田などが濡れにくく、良好な
接合状態を得ることが困難である。又、Ｎｉめつぎば樹
脂封止性に難点があり、このために信頼性の高い半導体
装置を得ることができないという欠点がある。
［問題点を解決するための手段］ 本発明の目的はかかる従来技術の欠点を解消し、半田付
性および樹脂封止性に優れた半導体用リードフレームを
提供することにある。
この目的を達成するために、本発明の半導体用リードフ
レームは、金属基体上に全体をＮｉ−Ｓｎ合金あるいは
Ｑ　ｏ−Ｓｎ合金めつきし、これにより表面層を形成し
たものである。
［作用］ Ｎｉ−Ｓｎ合金あるいはＣｏ−Ｓｎ合金めつぎは、Ｎ１
めつき等と比較して酸化性雰囲気例えば大気中で加熱を
受けた場合酸化膜の成長が遅い。このため、Ｎｉ−Ｓｎ
合金あるいはｃｏ−Ｓｎ合金めつきは半田あるいはＡｇ
ペーストとのぬれ性が安定しており、ペレットボンディ
ング性が良好であるという特徴を有する。
また、Ｎ　＋−ｓ　ｎ合金あるいはｃｏ−Ｓｎ合金めつ
きは樹脂との密着性が良好であり、鉄系および銅系のリ
ードフレームの樹脂封止性を改良する効果がある。
Ｎｉ−Ｓｎ合金あるいはＧ　ｏ−Ｓｎ合金めつき浴には
、例えばビロリン酸浴、フッ化物浴などが用１．）られ
る。
金属基体上に光沢Ｎｉめりきを下地としてＮｉ−Ｓｎ合
金あるいはＱ　ｏ−Ｓｎ合金めつきをすると、これらＮ
ｉ−Ｓｎ合金あるいはＧ　Ｏ−Ｓｎ合金めつきの表面は
平滑となる。Ａｌ線を超音波ワイヤボンディングする場
合、めっき表面の平滑さがワイヤボンディング性に大き
く作用し、表面が平滑な程ワイヤボンディング性が良好
であるという結果が得られていることから、ワイヤボン
ディング性を向上させるために光沢Ｎｉめつきを下地と
して設けることがある。なお、光沢Ｎｉめつきの替わり
に、光沢銅めっき、無電解Ｎｉめつきを下地として設け
た場合にも同様の効果が得られる。
［実施例］ イ、厚さ０．３ｍｍの錫入り銅からなる基体１を第２図
に示すようなパターンに打抜き、半導体ペレット固定部
６、内部リード端子８および外部リード端子１ｏをそれ
ぞれ有するリードフレームを布製した。次いで、このリ
ードフレームを脱脂、酸洗等の前処理後、電解めっき法
によりビロリン酸浴から第１図のように基体１全体にＮ
ｉ−Ｓｎ合金めっき７を０．５μ設け、これにより所定
の半導体用リードフレームを作製した。
このようなリードフレームを用いてＩＣパッケージを作
る場合、第１図のように半導体ペレット固定部６上にＡ
ｇベースのろう材３を介してＳ１ベレツト４を配置し、
これと内部リード端子８とをＡ１細線９によって配線し
、全体を樹脂１１で封止する。
なお、第３図は金属基体１上に部分へ〇めつき２を設け
、Ａｕ線５によって配線した従来例を示す。
口、上記イと同様な方法で第２図に示すようなパターン
のリードフレームを作製した後、第４図のようにこのリ
ードフレーム全体に電解めっき法により光沢Ｎｉめりき
１２を１μ設け、さらにその上に電解めっき法によりＮ
ｉ−Ｓｎ合金めつき７を０．２μ設け、所定の半導体用
リードフレームを作製した、。
［効果］ 以上のように、本発明の半導体用リードフレームによれ
ば、金属基体上にＮｉ−Ｓｎ合金あるいはｃｏ−Ｓｎ合
金めつきし、これにより表面層を形成したから、このＮ
ｉ−Ｓｎ合金めつきの存在によりワイヤボンディング性
、ペレットボンディング性などの半田付性および樹脂封
止性に優れた効果を示す半導体用リードフレームを得る
ことができる。
したがって、このリードフレームを用いれば、樹脂封止
型半導体装置の場合半導体装置の信頼性を左右する耐湿
性を大幅に向上させることができると共に、Ａｕ　ＳＡ
ｇ等の貴金屈を使用しないのでこれによりきわめて安価
な半導体装置を提供することが可能となる。
又、Ｎ　ｉ−８Ｎ合金あるいはｃｏ−Ｓｎ合金はそれ自
身耐食性に優れた合金であるから、この点からも半導体
装置の信頼性を大幅向上させることができる。
４、図面簡単な説明 第１図は本発明の一実施例に係る半導体装置の部分断面
図、第２図は打抜き後の半導体用リードフレームの平面
図、第３図は従来例に係る半導体装置の部分断面図、第
４図は本発明の他の実施例に係る半導体装置の部分断面
図である。
１；金ａ基体、３：Ａａペーストろう材、４；８１ペレ
ツト、６：半導体ペレット固定部、７：Ｎｉ−Ｓｎ合金
めつき、８：内部リード端子、９；Ａｉ＋細、１０；外
部リード端子、１１：樹脂、１２゛；光沢Ｎ１めりき。
第　１１ｆｌ 見　４１２１１ 手続補正書（ガＸ） ５Ｑ、１２．０３ 昭和　　　年　　　月　　　臼 り事件の表示 昭和　ｉ　年　　　Ｊ井ｓ＋ｊｒ　　　願第　ｌにｔｔ
ｔｐｙ　　　号ａ　補正をする者 ４・　代　理　人〒Ｚｏ。
居　所　　　　　東京都千代田区丸の内二丁目１番２号
】 ≦、褌≦Ｃカし’Ｒｅ　　　Ｊｌ目協−１１ウズｊト島
本丁、０４め７、　　衾巾　工　１九　　　ぎ口日ｎ石
λ閥（き　１９（肩’＜ｆＦｌリーｒラレー４？二＃恨
−５３゜

Claims (2)

    【特許請求の範囲】
  1. （１）金属基体上に全体をＮｉ−Ｓｎ合金あるいはＣｏ
    −Ｓｎ合金めっきし、これにより表面層を形成してなる
    ことを特徴とする半導体用リードフレーム。
  2. （２）金属基体上に光沢Ｎｉめつきを下地として全体を
    Ｎｉ−Ｓｎ合金あるいはＣｏ−Ｓｎ合金めつきし、これ
    により表面層を形成してなることを特徴とする特許請求
    の範囲第１項記載の半導体用リードフレーム。
JP59165489A 1984-08-07 1984-08-07 半導体用リ−ドフレ−ム Pending JPS6142940A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59165489A JPS6142940A (ja) 1984-08-07 1984-08-07 半導体用リ−ドフレ−ム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59165489A JPS6142940A (ja) 1984-08-07 1984-08-07 半導体用リ−ドフレ−ム

Publications (1)

Publication Number Publication Date
JPS6142940A true JPS6142940A (ja) 1986-03-01

Family

ID=15813369

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59165489A Pending JPS6142940A (ja) 1984-08-07 1984-08-07 半導体用リ−ドフレ−ム

Country Status (1)

Country Link
JP (1) JPS6142940A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105304601A (zh) * 2014-07-22 2016-02-03 友立材料株式会社 引线框及其制造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105304601A (zh) * 2014-07-22 2016-02-03 友立材料株式会社 引线框及其制造方法

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