JPS6139779A - Synchronizing signal generating device - Google Patents

Abstract

PURPOSE:To eliminate a step-out on a monitor even unless a synchronizing signal is obtained from a playback video signal by providing a circuit which generates a pseudo synchronizing signal used instead of a playback synchronizing signal that a playback signal contains. CONSTITUTION:A pseudo synchronizing signal generating circuit 20 generates a pseudo synchronizing signal S7 used instead of the playback synchronizing signal in the playback signal from a recording medium all the time on the basis of the oscillation output of an oscillation circuit 1. A phase control circuit 40 extracts the synchronizing signal from the playback signal and puts the signal in phase with the pseudo synchronizing signal, and secures the synchronism between the pseudo synchronizing signal and playback synchronizing signal when an output signal is switched to the pseudo synchronizing signal. The control circuit decides on the output time of the pseudo synchronizing signal; when the pseudo synchronizing signal is outputted, the output terminal of the pseudo synchronizing signal generating circuit 20 is connected to an output line through a switching circuit 30 and when the playback synchronizing signal is obtained, a control signal is sent out to the phase control circuit 40 so as to put the playback synchronizing signal and pseudo synchronizing signal in phase with each other.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a synchronizing signal generating device, and is suitable for application to a video signal reproducing device such as a video disk device, for example.

[Conventional technology]

Conventionally, for example, in a video disk device, a synchronization signal used during blind playback has been obtained separately from a reproduced video signal.

[Problem that the invention seeks to solve]

In a video disc device, the video signal is recorded in the circumferential direction of the video disc, and when searching for a desired video, the recorded video 11! The signal pickup section is moved relative to the video disc in the radial direction.

Therefore, during a search, when the pickup section crosses the track, the image on the monitor is distorted and the noise becomes unsightly. Therefore, a method has been adopted in which only the video signal is renamed, or a method in which a synchronization signal separated from the reproduced video signal is output.

However, when the search speed is high, the speed and number of times the track is traversed increases, so the synchronization signal is lost. ,,,□
1. Eh, ka, ah, ya, there was a synchronization disorder between engineering and product. One possible way to solve this problem is to mute the synchronization signal in high-speed search mode, but
If this is done, the vertical synchronization of the monitor will inevitably be disrupted when an image is displayed on the monitor again.

In addition, dropouts may occur due to scratches or nicks on the video disc, and a synchronization signal may not be obtained from the reproduced video signal, and in this case, synchronization disturbances may also occur on the monitor.

The present invention has been made in consideration of the above points, and provides a pseudo synchronization signal that can be used in place of the synchronization signal when the synchronization signal cannot be obtained from the playback signal from a recording medium such as a video disk. This paper attempts to propose a synchronization signal generator that can be configured.

[Means for solving problems]

In order to achieve such an object, the present invention includes an oscillation circuit 1, and a pseudo synchronization signal generating circuit that generates a pseudo synchronization signal corresponding to a reproduction synchronization signal included in a reproduction signal based on the oscillation output of the oscillation circuit 1; A phase control circuit 40 that controls phase coincidence between the signal and the pseudo sync signal, a control circuit that determines and instructs when to output the pseudo sync signal, and switches between the pseudo sync signal and the reproduced sync signal (in some cases, the reproduced signal itself). A switching circuit is provided between the output and the output.

Here, the control circuit outputs a pseudo sync signal from the pseudo sync signal generating circuit via the switching circuit 31 when a reproduction sync signal cannot be obtained from the reproduction signal, such as during a search or dropout detection.

In other cases, the control circuit sends a control signal to the phase control circuit 40 to perform phase matching between the reproduction synchronization signal and the pseudo synchronization signal, and also sends the reproduction synchronization signal (or the reproduction signal itself) to the switching circuit. It is output via (9).

[Effect]

The pseudo synchronization signal generating circuit m constantly generates a pseudo synchronization signal to be used instead of the reproduction synchronization signal. The phase control circuit 40 extracts the synchronization signal from the reproduced signal and matches the phase of the signal with the pseudo synchronization signal. When the output signal is switched to the pseudo synchronization signal, it synchronizes the pseudo synchronization signal with the reproduction synchronization signal. This is to ensure that The control circuit determines when a pseudo synchronization signal is output, and when outputting a pseudo synchronization signal, the output line VC is connected via a switching circuit 30 at the output end of the pseudo synchronization signal generation circuit. The phase control circuit 4 is used to obtain a reproduction synchronization signal by using a phase control circuit 4 to match the reproduction synchronization signal and the pseudo synchronization signal in phase.
Sends the control number to 0.

〔Example〕

Below, the drawings show the present invention: a video disc device and a
An embodiment applied to a configuration for preventing image disturbance on a monitor during high-speed access such as a search in K is described in detail.

, In FIG. 1, the oscillation circuit 1 is composed of, for example, a crystal oscillator, and has a horizontal scanning, interrogation wave number fH (15; 75 [,
A clock signal S1 having a frequency that is an even multiple of kl'1z)) is oscillated and applied to the reference frequency forming circuit 2 of the frequency dividing circuit configuration. The reference frequency forming circuit 2 receives this signal S1f!
: The frequency is divided to form a signal 821 having a frequency of 2fH, which is twice the horizontal scanning frequency axis, and is applied to the vertical scanning frequency forming circuit 3, the vertical synchronizing pulse width forming circuit 4, and the horizontal scanning frequency forming circuit 5, respectively. □Vertical scanning frequency forming circuit 3
is composed of a frequency dividing circuit, and divides the frequency of signal S2 by 17525.
Divided and vertical scanning frequency fv (oO [Hz))
Signal 83 with k? ff mono multivibrator configuration 3
It is applied to the H section forming circuit 6. The 3H section forming circuit 6 is triggered by the fall of the signal S3, counts the clocked 4S1 from the oscillation circuit 1, and operates as shown in FIG. 2 (4) for a period three times the horizontal scanning period (H). A pulse signal S4' rising to logic "1" is formed to control opening and closing of gate circuits 7 and 8. The pulse signal S4 is directly given to the gate circuit 7, and the gate circuit 8 is fed to the inverter 9.
It can be given through.

The vertical synchronization pulse width forming circuit 4 is composed of a mono-multivibrator, and forms a signal having the pulse width of the vertical synchronization pulse based on the signal S2, and inverts the signal 85 via the inverter 10 (Fig. 2 (B)). ) is given to the gate circuit 7.

The horizontal scanning frequency forming circuit 5 has a frequency of 11/2 of the signal S2.
The frequency is divided to form a signal having a horizontal scanning frequency fffHI, which is applied to a horizontal synchronizing pulse width forming circuit 11 having a mono-multivibrator configuration. The horizontal synchronizing pulse width forming circuit wt11 receives the signal, shapes the pressure waveform so as to have the pulse width of the horizontal synchronizing pulse, and supplies the shaped signal 86 (FIG. 2 0) to the gate circuit 8.

The gate circuit 7 and the gate circuit 8 operate in opposite directions to each other according to the output signal S4 of the 3H section forming circuit 6, and the signal S5 passes through the gate circuit which operates in an open state while the output signal S4 rises to logic "1". The output signal S4 is applied to the OR circuit 12.
The gate circuit 8 operates open while the voltage falls to logic “0”.
The signal S6 is applied to the OR circuit 12 through. Therefore, as shown in FIG. 2, the OR circuit 12 includes a vertical synchronizing pulse for a period of 3H in one vertical scanning period, as shown in FIG.
During other periods, four alternative composite pseudo synchronization signals S7 including horizontal synchronization pulses tI are issued.

In this way, in the embodiment shown in FIG. 1, the oscillation circuit 1 to the OR circuit 12 constitute a pseudo synchronization signal generation circuit.

The switch circuit side as a switching circuit has an output (Q VOUT
& What to switch between, 2 input terminals and 1 output terminal? have A pseudo synchronization signal S7 is applied to one input terminal INA between the switch circuits, and a reproduced video signal PBV reproduced from a video disc is applied to the other input terminal INH. The switching circuit side is controlled based on a control signal C0NTIC which is output from a control circuit (not shown), and the control signal C0 is used during high-speed access such as searching.
Input terminal I connected to OR circuit 12 based on NT
It is switch-connected to NA, and during other periods it is switch-connected to input terminal INH. Therefore, during high-speed access, the pseudo synchronization signal S7 is sent to the monitor as the output signal VOUT via the switch circuit 31, and during other periods, the reproduced video signal PBV
is sent to the monitor as the output signal VOUT.

In addition to the configuration described below, the apparatus shown in FIG. 1 has a phase control circuit 40 for synchronizing the VC pseudo synchronization signal S7 with the reproduction synchronization signal contained in the reproduction video signal PBV.

In the phase control circuit 40, a vertical synchronization signal is extracted from the reproduced video signal PBV through a synchronization separation circuit 41 and a vertical synchronization separation circuit 42, and then a fall detection circuit 43 having a mono-multivibrator configuration extracts this vertical synchronization signal (Q The detection signal S8 is applied to the reference frequency forming circuit 2 and the vertical scanning frequency forming circuit 3 as a reset signal through the switch circuit 14tf. Therefore, the phases of the output signals S2 and S3 of the reference station ar number forming circuit 2 and the vertical scanning frequency forming circuit 3 are controlled by the falling detection signal 88, and the pseudo synchronization signal S7 formed by these output signals S2 and S3 is is synchronized with a synchronization signal included in the reproduced video signal.

Here, the switch circuit 14 is controlled to be open during high-speed access such as a search by the control signal C0NT, and closed in other cases. switch circuit 44
The reference frequency forming circuit 2 and the vertical scanning frequency forming circuit 3 are set to be reset by their own output signals while the control is controlled to be open.

According to the configuration shown in FIG. 1, in a mode other than high-speed access, for example, in a playback mode, the control signal C0NT is used to control the switch circuit I.
is connected to the input terminal INBK, and the playback video signal PBV &
It is given to the monitor as the output signal VOUT. Therefore, an image appears on the monitor.

At this time, the reference frequency forming circuit 2 and the vertical scanning frequency forming circuit 3 are reset by the fall detection signal S8 of the vertical synchronizing signal separated from the reproduced video signal PBV.
The phases of the reproduced vertical synchronization signal and the pseudo synchronization signal S7 are controlled to match.

On the other hand, during high-speed access such as during a search, K switches and connects the switch circuits I and 44 using the control signal C0NT. In this case, the clock of the oscillation circuit 1 is frequency-divided and waveform-shaped to form a vertical synchronizing pulse S5 and a horizontal synchronizing pulse 861, and the pseudo synchronizing pulse shown in FIG. 20 is formed by combining these predetermined periods. A signal S7 is sent to the monitor via the switch circuit (9). Therefore, at this time, the video on the monitor is muted.

At the time of this transition, the fall detection signal S8 given immediately before
Therefore, the pseudo synchronization signal S7 is synchronized with the reproduction synchronization signal. Therefore, the reproduced video signal P of the output signal VOUT
The transition from BV to pseudo synchronization signal S7 is made smoothly.

After the transition, the reference frequency forming circuit 2 and the vertical scanning frequency forming circuit 3 run free, so the accuracy of the pseudo synchronization signal S7 depends on the oscillation circuit IK. Therefore, a highly accurate oscillation circuit 1' is used, and a highly accurate pseudo synchronization signal S7 is output.

When high-speed access ends and returns to playback mode, control signal C
0NT switches the switch circuit sections 1 and 44 to their original states. As a result, the reproduced video signal PBV is sent to the monitor via the switch circuit section and the video is displayed, and the pseudo synchronization signal S7 and the reproduction synchronization signal are synchronized. At the time of this switching, since the pseudo synchronization signal S7 is of high precision, the synchronization can be restored without causing synchronization disturbance.

According to the device shown in FIG. 1, since a pseudo synchronization signal is sent to the monitor during high-speed access such as a search, it is possible to prevent synchronization disturbances on the monitor that would occur when a playback synchronization signal was being sent. Furthermore, it is possible to prevent vertical synchronization from occurring when the high-speed access is completed and the original state is restored.

In the above-described embodiment, the present invention was applied to a video disc device, but the present invention is not limited to this, but can also be applied to a video signal reproducing device for songs. Further, in the above-described embodiment, a pseudo synchronization signal is output during high-speed access such as a search, but a pseudo synchronization signal may be output when a dropout is detected.

[Effects of the Invention] 5 As described above, according to the present invention, it is possible to easily obtain a synchronization signal generation device that can generate a pseudo synchronization signal used in place of the reproduction synchronization signal included in the reproduction signal. . In this way, even when a reproduction synchronization signal cannot be obtained, operations such as display on a monitor can be performed by using a pseudo synchronization signal.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of a synchronizing signal generating device according to the present invention, and FIG. 2 is a timing chart of the power of each part of the embodiment of FIG. DESCRIPTION OF SYMBOLS 1... Oscillator circuit, Addition... Pseudo synchronous signal generation circuit, Connection... Switch circuit, 40... Phase control circuit, C0N
T...Control signal.

Claims (1)

[Claims] a pseudo synchronization signal generating circuit that has an oscillation circuit and forms a pseudo synchronization signal corresponding to a reproduction synchronization signal included in a reproduction signal from a recording medium based on the oscillation output thereof; and a pseudo synchronization signal generation circuit that separates the reproduction synchronization signal from the reproduction signal. a phase control circuit that supplies the pseudo synchronization signal to the pseudo synchronization signal generation circuit to match the phase of the pseudo synchronization signal with the reproduction synchronization signal; a switching circuit that selects and outputs the pseudo synchronization signal or the reproduction synchronization signal; When the synchronization signal is obtained, the reproduction synchronization signal is output from the switching circuit and a control signal is sent to the phase control circuit to perform phase control, and from this state, the reproduction synchronization signal is obtained from the reproduction signal. a control circuit for outputting the pseudo synchronization signal from the switching circuit when the pseudo synchronization signal is no longer available.