JPS6132419A - Method for annealing by infrared rays - Google Patents
Method for annealing by infrared raysInfo
- Publication number
- JPS6132419A JPS6132419A JP15600584A JP15600584A JPS6132419A JP S6132419 A JPS6132419 A JP S6132419A JP 15600584 A JP15600584 A JP 15600584A JP 15600584 A JP15600584 A JP 15600584A JP S6132419 A JPS6132419 A JP S6132419A
- Authority
- JP
- Japan
- Prior art keywords
- gas
- main surface
- semiconductor substrate
- surface part
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000137 annealing Methods 0.000 title claims abstract description 15
- 238000000034 method Methods 0.000 title claims description 11
- 239000000758 substrate Substances 0.000 claims abstract description 39
- 239000004065 semiconductor Substances 0.000 claims abstract description 35
- 230000003213 activating effect Effects 0.000 claims abstract description 5
- 239000007789 gas Substances 0.000 claims description 39
- 239000001307 helium Substances 0.000 claims description 2
- 229910052734 helium Inorganic materials 0.000 claims description 2
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims 1
- 230000008646 thermal stress Effects 0.000 abstract description 7
- 230000004913 activation Effects 0.000 abstract description 6
- 239000013078 crystal Substances 0.000 abstract description 6
- 230000007547 defect Effects 0.000 abstract description 6
- 230000000694 effects Effects 0.000 abstract description 3
- 230000003292 diminished effect Effects 0.000 abstract 1
- 238000005468 ion implantation Methods 0.000 description 14
- 238000009792 diffusion process Methods 0.000 description 5
- 239000012535 impurity Substances 0.000 description 5
- 239000000203 mixture Substances 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 2
- 230000001678 irradiating effect Effects 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
- H01L21/2686—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation using incoherent radiation
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- High Energy & Nuclear Physics (AREA)
- Optics & Photonics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
この発明は半導体基板の主面部にイオン注入によって形
成されたイオン注入層を赤外線照射によってアニールし
て活性化する赤外線アニール方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an infrared annealing method for annealing and activating an ion implanted layer formed by ion implantation on the main surface of a semiconductor substrate by infrared irradiation.
従来、半導体基板の主面部にイオン注入によって形成さ
れたイオン注入層をアニールして活性化する場合に、こ
のイオン注入層が形成された半導体基板を高温炉内に入
れて熱処理を行う方法が用いられていた。しかし、この
高温炉内熱処理方法では、半導体基板の主面部に、イオ
ン注入層のイオン注入深さよシ深い深さの不純物拡散層
が形成されるという問題があった。Conventionally, when an ion-implanted layer formed by ion implantation on the main surface of a semiconductor substrate is annealed and activated, the semiconductor substrate with the ion-implanted layer formed thereon is placed in a high-temperature furnace and heat-treated. It was getting worse. However, this high-temperature furnace heat treatment method has a problem in that an impurity diffusion layer is formed on the main surface of the semiconductor substrate to a depth greater than the ion implantation depth of the ion implantation layer.
ところが、近年、半導体素子の微細化が進み、例えばＭ
ＯＳ）ランジスタにおいては、不純物拡散深さの浅いソ
ースψドレイン領域を形成するために、このソース・ド
レイン領域形成用のイオン注入層を不純物拡散が生じな
いように活性化する方法が必要となり、上述の高温炉内
熱処理方法に替えて、赤外線アニール方法が採用されて
いる。However, in recent years, the miniaturization of semiconductor devices has progressed, and for example, M
OS) In transistors, in order to form a source ψ drain region with a shallow impurity diffusion depth, a method is required to activate the ion implantation layer for forming the source/drain region so that impurity diffusion does not occur. Instead of the high-temperature furnace heat treatment method, an infrared annealing method is used.
この赤外線アニール方法は、半導体基板のイオン注入層
が形成されている主面部に赤外線を１０〜２０秒程度の
短時間照射してこの主面部の温度を１０００〜１２００
℃程度の高温に上昇させ、この主面部に形成されている
イオン注入層をアニールして活性化するものである０
＃Ｉ１図は従来の赤外線アニール装置の一例の主要構成
要素を示す模式的断面図である０図において、（１）は
内部を所要の真空度に排気することができる真空チャン
バ、（ｌａ）は真空チャンバ（１）の一方の端部に設け
られ真空チャンバ（１）内を所要の真空度に排気するた
めの排気管、（２）は真空チャンバ（１）内の排気管（
１ａ）側の端部側に設けられ半導体基板−のイオン注入
層（図示せず）が形成されている主面部が排気管（ｌａ
）側とは反対側に向くようにして半導体基板−を保持す
る基板保持台、（３）は真空チャンバ（１）内の排気管
（１ａ）側とは反対側の端部側に設けられ半導体基板−
のイオン注入層が形成されている主面部を１０〜２０秒
程度の短時間照射して１０００〜１２００℃程度の高温
に上昇させ得る強度を有する赤外線を放射する赤外線ラ
ンプ、（４）は真空チャンバ（１）内の基板保持台（２
）と赤外線ランプ（３）との間の赤外線ラング（３）の
近傍の部分に設けられ赤外線ランプ（３）から半導体基
板−へ赤外線を照射する時には開き、照射しない時には
閉じるシャッターである〇
このように構成された従来例の装置では、排気管（１ａ
）を通して真空に排気された真空チャンバ（１）内にお
いて、シャッター（４）の開閉によって赤外線ランプ（
３）から半導体基板■の主面部への赤外線の照射を制御
して、半導体基板−の主面部の温度をこの主面部に形成
されているイオン注入層の活性化に必要な温度値に短時
間に上昇させることができる０従って、イオン注入層の
イ・オン注入深さをほとんど変化させることなく、イオ
ン注入層の活性化を行うことが可能となり、不純物拡散
深さの浅い不純物拡散領域を必要とする半導体素子を作
成することができる。This infrared annealing method involves irradiating infrared rays for a short period of about 10 to 20 seconds to the main surface of the semiconductor substrate where the ion-implanted layer is formed to raise the temperature of the main surface to 1000 to 1200.
The ion-implanted layer formed on the main surface is annealed and activated by raising the temperature to a high temperature of approximately ℃. In Figure 0, (1) is a vacuum chamber whose interior can be evacuated to the required degree of vacuum, and (la) is a vacuum chamber provided at one end of the vacuum chamber (1) to allow the inside of the vacuum chamber (1) to be evacuated. The exhaust pipe (2) is for evacuation to the required degree of vacuum, and (2) is the exhaust pipe (2) in the vacuum chamber (1).
The main surface portion provided on the end side of 1a) and on which the ion-implanted layer (not shown) of the semiconductor substrate is formed is the exhaust pipe (la
A substrate holder (3) is provided at the end of the vacuum chamber (1) opposite to the exhaust pipe (1a) and holds the semiconductor substrate facing away from the Substrate-
(4) is an infrared lamp that emits infrared rays having an intensity that can raise the temperature to a high temperature of about 1000 to 1200°C by irradiating the main surface part on which the ion-implanted layer is formed for a short time of about 10 to 20 seconds; (4) is a vacuum chamber; The board holding stand (2) inside (1)
) and the infrared lamp (3) near the infrared rung (3), it opens when the infrared lamp (3) irradiates the semiconductor substrate with infrared rays, and closes when it does not irradiate the semiconductor substrate. In the conventional device configured as follows, the exhaust pipe (1a
), the infrared lamp (
3) By controlling the irradiation of infrared rays from the semiconductor substrate (1) to the main surface of the semiconductor substrate (2), the temperature of the main surface of the semiconductor substrate (2) is brought to a temperature value necessary for activating the ion-implanted layer formed on this main surface in a short period of time. Therefore, the ion implantation layer can be activated without changing the ion implantation depth of the ion implantation layer, and an impurity diffusion region with a shallow impurity diffusion depth is required. It is possible to create a semiconductor device having the following properties.
しかし、この従来例の装置では、上述のように、真空チ
ャンバ（１）内の真空中において半導体基板−の主面部
の温度を短時間に上昇させてイオン注入層の活性化を行
うので、半導体基板■の主面部の温度上昇時およびイオ
ン注入層の活性化後の冷却時において、酸化シリコンか
らなり半導体基板−の主面上に形成されたイオン注入層
形成用のマスク（図示せず）などによって半導体基板−
の主面における熱放射が不均一になシ、この熱放射の不
均一によって半導体基板−の主面部の温度が不均一にな
る。この温度の不均一によって半導体基板■の主面部に
熱ストレスが発生し、この熱ストレスの発生によって半
導体基板−の主面部に結晶欠陥が発生するという欠点が
あった。However, in this conventional device, as described above, the temperature of the main surface of the semiconductor substrate is increased in a short time in the vacuum of the vacuum chamber (1) to activate the ion-implanted layer. When the temperature of the main surface of the substrate (1) rises and when the ion implantation layer is cooled down after activation, a mask (not shown) for forming the ion implantation layer made of silicon oxide and formed on the main surface of the semiconductor substrate (2), etc. Semiconductor substrate by
The heat radiation on the main surface of the semiconductor substrate is non-uniform, and the temperature of the main surface of the semiconductor substrate becomes non-uniform due to the non-uniform heat radiation. This temperature nonuniformity causes thermal stress to occur on the main surface of the semiconductor substrate (1), and this thermal stress causes crystal defects to occur on the main surface of the semiconductor substrate (1).
この発明は、かかる欠点を除去するためになされたもの
で、真空チャンバ内に、熱輸送効率のよい水素（Ｈ２）
ガスもしくはヘリウム（Ｈｅ ）ガスまたはこれらのガ
スの混合ガスを導入した状態において、半導体基板の主
面部に形成されているイオン注入層を赤外線照射によっ
てアニールして活性化することによって、半導体基板の
主面部に発生する結晶欠陥を少なくすることができる赤
外線アニール方法を提供するものである。This invention was made to eliminate such drawbacks, and it uses hydrogen (H2) with high heat transport efficiency in the vacuum chamber.
The main surface of the semiconductor substrate is activated by annealing the ion implantation layer formed on the main surface of the semiconductor substrate with infrared irradiation while introducing gas, helium (He) gas, or a mixture of these gases. An object of the present invention is to provide an infrared annealing method that can reduce crystal defects generated on a surface portion.
第２図はこの発明の一実施例の方法に用いる赤外線アニ
ール装置の主要構成要素を示す模式的断面図である。FIG. 2 is a schematic cross-sectional view showing the main components of an infrared annealing apparatus used in the method of one embodiment of the present invention.
図において、第１図に示した符号と同一符号は同等部分
を示す。（１ｂ）は真空チャンバ（１）の側壁に設けら
れ真空チャンバ（１）内にガスを導入するためのガス導
入管、（５ａ）および（５ｂ）は一方の側が共通に接続
されガス導入管（１ｂ）に接続される開閉弁、（６ａ）
および（６ｂ）はそれぞれ一方の側が開閉弁（５ａ）お
よび開閉弁（５ｂ）の他方の側に接続されたガスフロー
メータ、＜１ａ’）および（７ｂ）はそれぞれガスフロ
ーメータ（６ａ）およびガスフローメータ（６ｂ）の他
方の側に接続されたＨ２ガス供給源およびＨｅガス供給
源である。In the figure, the same symbols as those shown in FIG. 1 indicate equivalent parts. (1b) is a gas introduction pipe provided on the side wall of the vacuum chamber (1) for introducing gas into the vacuum chamber (1); (5a) and (5b) are commonly connected on one side and gas introduction pipes ( 1b), an on-off valve connected to (6a)
and (6b) are gas flow meters connected on one side to the on-off valve (5a) and the other side of the on-off valve (5b), respectively, <1a') and (7b) are gas flow meters (6a) and gas A H2 gas source and a He gas source are connected to the other side of the flow meter (6b).
このように構成された赤外線アニール装置では、開閉弁
（５ｂ）を閉じて、開閉弁（５ａ）の開閉を制御するこ
とによって、Ｈ２ガス供給源（７ａ）からガスフローメ
ータ（６ａ）、開閉弁（５ａ）およびガス導入管（１ｂ
）を通してＨ２ガスの所要量を真空チャンバ（１）内へ
導入することができる。とれと同様に、開閉弁（５ａ）
を閉じて、開閉弁（５ｂ）の開閉を制御することによっ
て、Ｈｅガスの所要量を真空チャンバ（１）内へ導入す
ることができる。また、開閉弁（５ａ）および開閉弁（
５ｂ）の開閉をともに制御することによって、Ｈ２ガス
とＨｅガスとを所定割合で混合した混合ガスの所要量を
真空チャンバ（１）内へ導入することができる０
この赤外線アニール装置を用いて半導体基板−の主面部
に形成されているイオン注入層（図示せず）の活性化を
行う場合には、例えば１Ｏ−６ＴＯｒｒ程度の真空度に
排気された真空チャンバ（１）内へ、真空チャンバ（１
）内の真空度か１０ ＴＯｒｒ程度になるように、Ｈ
２ガスを導入しながら、半導体基板■の主面部に形成さ
れているイオン注入層の活性化を行う。このイオン注入
層の活性化の際における半導体基板−の主面部の温度上
昇時および活性化後の冷却時に半導体基板−の主面部に
生ずる温度の不均一が、熱輸送効率のよいＨ２ガスによ
って緩和されるので、第１図に示した従来例の場合より
小さくなる。従って、この温度の不均一が小さくなるこ
とによって、半導体基板−の主面部に発生する熱ストレ
スが第１図に示した従来例の場合より小さくなり、この
熱ストレスによって半導体基板■の主面部に発生する結
晶欠陥も第１図に示した従来例の場合より少なくなる。In the infrared annealing apparatus configured in this way, by closing the on-off valve (5b) and controlling the opening/closing of the on-off valve (5a), the H2 gas supply source (7a) is connected to the gas flow meter (6a) and the on-off valve. (5a) and gas introduction pipe (1b)
) can introduce the required amount of H2 gas into the vacuum chamber (1). Similar to Tore, on-off valve (5a)
By closing the on-off valve (5b) and controlling the opening and closing of the on-off valve (5b), the required amount of He gas can be introduced into the vacuum chamber (1). In addition, an on-off valve (5a) and an on-off valve (
By controlling the opening and closing of 5b), it is possible to introduce the required amount of a mixed gas of H2 gas and He gas at a predetermined ratio into the vacuum chamber (1). When activating the ion implantation layer (not shown) formed on the main surface of the substrate, the vacuum chamber (1) is evacuated to a vacuum level of about 10-6 TOrr, for example. 1
) so that the degree of vacuum is approximately 10 TOrr.
The ion implantation layer formed on the main surface of the semiconductor substrate (2) is activated while introducing the two gases. The temperature non-uniformity that occurs on the main surface of the semiconductor substrate when the temperature rises during activation of the ion-implanted layer and during cooling after activation is alleviated by H2 gas with high heat transport efficiency. Therefore, it is smaller than the conventional example shown in FIG. Therefore, by reducing this temperature non-uniformity, the thermal stress generated on the main surface of the semiconductor substrate becomes smaller than in the conventional example shown in Fig. 1, and this thermal stress causes the main surface of the semiconductor substrate The number of crystal defects generated is also smaller than in the conventional example shown in FIG.
なお、これまで、真空チャンバ（１）内へＨ２ガスを導
入する場合を例にとシ述べたが、これに限らず、真空チ
ャンバ（１）内へＨｅガスまたはＨ２ガスとＨｅガスと
の混合ガスを導入する場合でも、上述の場合と同様の効
果がある。Although we have described the case where H2 gas is introduced into the vacuum chamber (1) as an example, this is not limited to the case where He gas or a mixture of H2 gas and He gas is introduced into the vacuum chamber (1). Even when gas is introduced, the same effect as in the above case can be obtained.
以上、説明したように、この発明による赤外線アニール
方法では、Ｈ２ガスもしくはＨｅガスまたはこれらのガ
スの混合を導入した状態において、半導体基板の主面部
に形成されているイオン注入層を赤外線照射によってア
ニールして活性化するので、イオン注入層の活性化の際
における半導体基板の主面部の温度上昇時および活性化
後の冷却時に半導体基板の主面部に生ずる温度の不均一
が、熱輸送効率のよいＨ２ガスもしくはＨｅガスまたは
これらの混合ガスによって緩和されるから、従来例の場
合より小さくなる。従って、この温度の不均一が小さく
なることによって、半導体基板の主面部に発生する熱ス
トレスが従来例の場合より小さくなり、この熱ストレス
によって半導体基体基板の主面部に発生する結晶欠陥も
従来例の場合よシ少なくなる。As described above, in the infrared annealing method according to the present invention, an ion implantation layer formed on the main surface of a semiconductor substrate is annealed by infrared irradiation while H2 gas, He gas, or a mixture of these gases is introduced. As the ion-implanted layer is activated, the non-uniformity of temperature that occurs on the main surface of the semiconductor substrate when the temperature rises on the main surface of the semiconductor substrate during activation of the ion-implanted layer and when it cools down after activation is reduced to improve heat transport efficiency. Since it is relaxed by H2 gas, He gas, or a mixed gas thereof, it is smaller than in the conventional example. Therefore, by reducing this temperature non-uniformity, the thermal stress generated on the main surface of the semiconductor substrate is smaller than in the conventional case, and the crystal defects generated on the main surface of the semiconductor substrate due to this thermal stress are also reduced compared to the conventional case. In this case, it will be less.
第１図は従来の赤外線アニール装置の一例の主要構成要
素を示す模式的断面図、第２図はこの発明の一実施例に
用いる赤外線アニール装置の主要構成要素を示す模式的
断面図である。
図において、（１）は真空チャンバ、（１ｂ）はガス導
入管、（５ａ）および（５ｂ）は開閉弁、（６ａ）およ
び（６ｂ）はガスフローメータ、（’？ａ）および（７
ｂ）はそれぞれＨ２ガス供給源およびＨｅガス供給源で
ある。
なお、図中同一符号はそれぞれ同一または相当部分を示
す。FIG. 1 is a schematic cross-sectional view showing the main components of an example of a conventional infrared annealing apparatus, and FIG. 2 is a schematic cross-sectional view showing the main components of an infrared annealing apparatus used in an embodiment of the present invention. In the figure, (1) is a vacuum chamber, (1b) is a gas introduction pipe, (5a) and (5b) are on-off valves, (6a) and (6b) are gas flow meters, ('?a) and (7
b) are an H2 gas source and a He gas source, respectively. Note that the same reference numerals in the figures indicate the same or corresponding parts.
Claims (1)
成されているイオン注入層を赤外線照射によつてアニー
ルして活性化するに当り、上記真空チャンバ内に水素ガ
スもしくはヘリウムガスまたはこれらのガスの混合ガス
を導入することを特徴とする赤外線アニール方法。(1) When annealing and activating the ion-implanted layer formed on the main surface of the semiconductor substrate in the vacuum chamber by infrared irradiation, hydrogen gas or helium gas, or the presence of these gases, is added to the vacuum chamber. An infrared annealing method characterized by introducing a mixed gas.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15600584A JPS6132419A (en) | 1984-07-24 | 1984-07-24 | Method for annealing by infrared rays |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15600584A JPS6132419A (en) | 1984-07-24 | 1984-07-24 | Method for annealing by infrared rays |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6132419A true JPS6132419A (en) | 1986-02-15 |
Family
ID=15618244
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15600584A Pending JPS6132419A (en) | 1984-07-24 | 1984-07-24 | Method for annealing by infrared rays |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6132419A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0450612A2 (en) * | 1990-04-04 | 1991-10-09 | Mitsubishi Gas Chemical Company, Inc. | Process for producing resin molded article having diminished residual stress |
| JP2002141298A (en) * | 2000-11-02 | 2002-05-17 | Toshiba Corp | Method for manufacturing semiconductor device |
| US7381598B2 (en) | 1993-08-12 | 2008-06-03 | Semiconductor Energy Laboratory Co., Ltd. | Insulated gate semiconductor device and process for fabricating the same |
-
1984
- 1984-07-24 JP JP15600584A patent/JPS6132419A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0450612A2 (en) * | 1990-04-04 | 1991-10-09 | Mitsubishi Gas Chemical Company, Inc. | Process for producing resin molded article having diminished residual stress |
| US7381598B2 (en) | 1993-08-12 | 2008-06-03 | Semiconductor Energy Laboratory Co., Ltd. | Insulated gate semiconductor device and process for fabricating the same |
| JP2002141298A (en) * | 2000-11-02 | 2002-05-17 | Toshiba Corp | Method for manufacturing semiconductor device |
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