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JPS61276330A - Film-forming method - Google Patents

Film-forming method

Info

Publication number
JPS61276330A
JPS61276330A JP11802485A JP11802485A JPS61276330A JP S61276330 A JPS61276330 A JP S61276330A JP 11802485 A JP11802485 A JP 11802485A JP 11802485 A JP11802485 A JP 11802485A JP S61276330 A JPS61276330 A JP S61276330A
Authority
JP
Japan
Prior art keywords
film
heat treatment
substrate
leakage current
pinholes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11802485A
Other languages
Japanese (ja)
Inventor
Hitoshi Hasegawa
長谷川 斉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP11802485A priority Critical patent/JPS61276330A/en
Publication of JPS61276330A publication Critical patent/JPS61276330A/en
Pending legal-status Critical Current

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  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To suppress a leakage current by adhering a metal film of a body centered cubic crystal on a substrate, heating to oxidize the film to convert it to a metal film, thereby reducing crystallization based on heat treatment in the later steps and preventing pinholes from increasing. CONSTITUTION:A body centered crystal Ta film 2 is adhered through an Si3N4 film on an Si substrate 1 as a semiconductor substrate, and heated to convert the film 2 to an oxide metal film of Ta2O5 film 2A. Thus, the crystallization based on the heat treatment of the later steps can be reduced to prevent pinholes from increasing and to suppress a leakage current.

Description

【発明の詳細な説明】 〔概要〕 半導体基板上に被着された高融点遷移金属、例えばタン
タル(Ta)膜を熱酸化して五酸化タンタル(Tag’
s)膜を形成する際、体心立方晶系のTa膜を被着後熱
酸化すれば、後工程で経由する700℃以上の熱処理に
対してTa、OS膜の結晶化は進まないで、その結果リ
ーク電流の原因となるピンホールの発生を抑制する。
[Detailed Description of the Invention] [Summary] A film of a high melting point transition metal such as tantalum (Ta) deposited on a semiconductor substrate is thermally oxidized to form tantalum pentoxide (Tag').
s) When forming the film, if the body-centered cubic Ta film is thermally oxidized after being deposited, the crystallization of the Ta and OS films will not proceed despite the heat treatment at 700°C or higher in the subsequent process. As a result, the generation of pinholes that cause leakage current is suppressed.

〔産業上の利用分野〕[Industrial application field]

本発明は半導体装置、特にダイナミックランダムアクセ
スメモリ(DRAM)の情報を記憶するキャパシタの誘
電体として用いられる金属酸化被膜に係り、熱処理によ
り発生するリーク電流を抑制した被膜形成方法に関する
The present invention relates to a metal oxide film used as a dielectric of a capacitor for storing information in a semiconductor device, particularly a dynamic random access memory (DRAM), and relates to a method for forming the film that suppresses leakage current caused by heat treatment.

DRAMの集積度は年々増大し、IMbitあるいはそ
れ以上の容量のデバイスが実用化され始めている。
The degree of integration of DRAMs is increasing year by year, and devices with capacities of IMbit or higher are beginning to be put into practical use.

このような状況の下で、DRAMのキャパシタの誘電体
膜は高集積、高密度化に対応して、っぎのような対策が
進められてきた。
Under these circumstances, the following measures have been taken for dielectric films of DRAM capacitors in response to higher integration and higher density.

(1)  薄膜化 従来DRAMのキャパシタの誘電体は主として二酸化珪
素(Sing)膜が用いられ、高集積、高密度化に対応
して膜厚が150人程0に薄膜化が進められてきた。
(1) Thinning of the film Conventionally, a silicon dioxide (Sing) film is mainly used as the dielectric material of the capacitor of a DRAM, and in response to higher integration and density, the film thickness has been reduced to about 150 mm.

このようにSi0g膜が薄膜化されると、わずかの損傷
やピンホールにより、リークが生じ製造歩留り上、デバ
イスの信頼性上問題があるのでSi0g膜と窒化珪素(
SiJ4)膜等よりなる二重膜等が用いられることがあ
る。
When the Si0g film is thinned in this way, slight damage or pinholes can cause leakage, which poses problems in terms of manufacturing yield and device reliability.
A double film made of SiJ4) film or the like may be used.

(2)物性常数 一方、誘電率の大きい誘電体、例えばTa205を選ん
で、キャパシタの半導体チップ上の占有面積を小さくす
る。
(2) Physical property constants On the other hand, a dielectric material with a high dielectric constant, such as Ta205, is selected to reduce the area occupied by the capacitor on the semiconductor chip.

この場合、通常Ta205膜の形成は比較的前の工程で
行われるため、後工程の熱処理によりTa膜0゜膜の結
晶化が進むため、これを抑制する方法が望まれる。
In this case, since the Ta205 film is usually formed in a relatively earlier process, the crystallization of the 0° Ta film progresses due to heat treatment in the later process, so a method for suppressing this is desired.

〔従来の技術〕[Conventional technology]

第2図(1)、(2)は従来例によるTa2O,膜の形
成を工程順に示す基板断面図である。
FIGS. 2(1) and 2(2) are cross-sectional views of a substrate showing the formation of a Ta2O film according to a conventional example in the order of steps.

第2図(1)において、半導体基板1として、厚さ10
00Å以下のSiJ、膜11をその表面に被着した珪素
(Si)基板を用いる。
In FIG. 2 (1), the semiconductor substrate 1 has a thickness of 10
A silicon (Si) substrate having a SiJ film 11 of 00 Å or less deposited on its surface is used.

ここで、Si、N、膜11はTa膜2の被着の際の高温
による基板への影響を防止するためのものである。
Here, the Si, N, and film 11 are used to prevent the influence of high temperature on the substrate when the Ta film 2 is deposited.

電子銃を用いた蒸着により、StJ、膜11の上に厚さ
300人程鹿のTa膜2を被着する。
A Ta film 2 having a thickness of about 300 layers is deposited on the StJ film 11 by vapor deposition using an electron gun.

第2図(2)において、ドライ酸素(02)中で500
℃で熱酸化して、Ta、05膜2Aを形成する。
In Figure 2 (2), 500
Thermal oxidation is performed at .degree. C. to form a Ta,05 film 2A.

形成されたTa、0.膜2Aは非晶質で、厚さはTa膜
2の約2倍となり600人程人程ある。
Formed Ta, 0. The film 2A is amorphous and has a thickness approximately twice that of the Ta film 2, and has a thickness of about 600.

この後、デバイスの形成はTazOs膜2Aの上にドー
プされた多結晶珪素(ポリSt)等の電極膜を被着して
、St基板1との間にキャパシタを形成する。
Thereafter, a device is formed by depositing an electrode film of doped polycrystalline silicon (polySt) or the like on the TazOs film 2A to form a capacitor between it and the St substrate 1.

〔発明が解決εようとする問題点〕[Problems that the invention attempts to solve]

従来例の通常の蒸着条件で被着したTa膜はβ−Taと
呼ばれ、正方晶系の結晶構造を有する。β−Taを熱酸
化して形成されたTag’s膜は約700℃以上の熱処
理により、温度上昇とともに結晶化が進み、リーク電流
を増加させキャパシタ特性を著しく劣化させる。
A Ta film deposited under conventional vapor deposition conditions is called β-Ta and has a tetragonal crystal structure. When the Tag's film formed by thermally oxidizing β-Ta is heat-treated at about 700° C. or higher, crystallization progresses as the temperature rises, increasing leakage current and significantly deteriorating capacitor characteristics.

〔問題点を解決するための手段〕[Means for solving problems]

上記問題点の解決は、半導体基板(1)上に体心立方晶
系の金属被膜(2)を被着し、加熱して該金属被膜(2
)を酸化金属被膜(2A)に変換する本発明による被膜
形成方法により達成される。
The above problem can be solved by depositing a body-centered cubic metal film (2) on a semiconductor substrate (1) and heating the metal film (2).
) to a metal oxide film (2A) according to the present invention.

例えば、前記金属被膜(2)がタンタルであり、前記半
導体基板(1)がその表面に絶縁膜(11)を被着して
なる場合の効果は顕著である。
For example, the effect is remarkable when the metal coating (2) is tantalum and the semiconductor substrate (1) has an insulating film (11) deposited on its surface.

〔作用〕[Effect]

本発明人は金属被膜として、例えばα−Taと呼ばれる
体心立方(bcc)晶系のTa膜は単結晶Taのバルク
の結晶構造で、面心立方(fcc)晶系や前述のβ−T
aと呼ぼる正方(tetragonal)晶系の結晶構
造を有するTa膜に比し最稠密であることに着目し、α
−Ta膜を熱酸化して形成されたTa205膜は後工程
の熱処理により結晶化が進まないことを第1図の実験結
果により確認した。
The present inventor has proposed that a body-centered cubic (bcc) crystal system Ta film called α-Ta has a bulk crystal structure of single crystal Ta, and a face-centered cubic (fcc) crystal system or the aforementioned β-T
Focusing on the fact that it is the densest Ta film, which has a tetragonal crystal structure called a,
It was confirmed from the experimental results shown in FIG. 1 that the Ta205 film formed by thermally oxidizing the -Ta film does not undergo crystallization due to post-process heat treatment.

第1図は熱処理温度をパラメータにして、Ta膜の結晶
構造と該Ta膜を熱酸化して形成したTa、0゜膜の結
晶化度の関係を示す図である。
FIG. 1 is a diagram showing the relationship between the crystal structure of a Ta film and the crystallinity of a Ta, 0° film formed by thermally oxidizing the Ta film, using the heat treatment temperature as a parameter.

図において、Ta2O,膜の結晶化度の目盛は任意単位
で、X線による回折スペクトルのプラグの反射条件に対
応するピークの波高値に比例する値で表される。
In the figure, the scale of the crystallinity of the Ta2O film is expressed in arbitrary units as a value proportional to the peak value corresponding to the plug reflection condition of the X-ray diffraction spectrum.

TazOs膜の熱処理はパラメータとして示される熱処
理温度800℃と1100℃でいずれも02中で30分
行った。
The heat treatment of the TazOs film was carried out for 30 minutes in 02 at heat treatment temperatures of 800° C. and 1100° C. shown as parameters.

図より明らかにbcc−Taの場合は、予想通り800
〜1100℃の熱処理を行っても、結晶化が抑制される
ことが分かった。
It is clear from the figure that in the case of bcc-Ta, it is 800 as expected.
It was found that even when heat treatment was performed at ~1100°C, crystallization was suppressed.

〔実施例〕〔Example〕

第2図の従来例と全く同じ工程でTa2O,膜2Aが形
成されるが、第2図(1)における電子銃を用いた蒸着
により、Si、JN4膜11の上に厚さ300人程鹿の
Ta膜2を被着する工程において、基板の表面状態、T
a膜の成長温度、成長速度等を選んでbcc構造が得ら
れるようにできる。
The Ta2O film 2A is formed in exactly the same process as the conventional example shown in FIG. 2, but by vapor deposition using an electron gun in FIG. In the step of depositing the Ta film 2, the surface condition of the substrate, T
A bcc structure can be obtained by selecting the growth temperature, growth rate, etc. of the a film.

bcc構造が得られる条件は特に成長速度に大きく依存
し、電子銃を用いた蒸着による場合には4λ5ec−’
以下にする必要がある。
The conditions for obtaining a bcc structure depend particularly on the growth rate, and in the case of vapor deposition using an electron gun, 4λ5ec-'
It is necessary to do the following.

bcc構造が得られたかどうかは、電子線回折により確
認できる。
Whether a bcc structure has been obtained can be confirmed by electron beam diffraction.

このようにして得られたTa、05膜2Aは第1図の実
験結果より明らかに結晶化が進み難く、膜中のピンホー
ル数を低減し、リーク電流の発生を抑制する。
The Ta,05 film 2A obtained in this way is clearly less likely to crystallize as shown in the experimental results shown in FIG. 1, and the number of pinholes in the film is reduced, thereby suppressing the generation of leakage current.

ピンホールの発生が結晶化によるものかどうかは明らか
出ないが、少なくとも結晶化が進行すると、ピンホール
数は増加し、リーク電流が発生しやすくなる。
Although it is not clear whether pinholes are caused by crystallization, at least as crystallization progresses, the number of pinholes increases and leakage current becomes more likely to occur.

〔発明の効果〕〔Effect of the invention〕

以上詳細に説明したように本発明によれば、体心立方晶
系のα−Ta膜を熱酸化して形成されたTazOs膜は
後工程の熱処理による結晶化を低減し、ピンホール数の
増加を防止し、リーク電流の発生を抑制する。
As explained in detail above, according to the present invention, a TazOs film formed by thermally oxidizing a body-centered cubic α-Ta film reduces crystallization caused by post-process heat treatment and increases the number of pinholes. This prevents leakage current and suppresses the occurrence of leakage current.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は熱処理温度をパラメータにして、Ta膜の結晶
構造と該Ta膜を熱酸化して形成したTa、O1膜の結
晶化度の関係を示す図、 第2図(1)、(2)は従来例によるTa2es膜の形
成を工程順に示す基板断面図である。 図において、 1は半導体基板でSt基板、 11は5iJ4膜、 2はTa膜、 2AはTa205膜
Figure 1 is a diagram showing the relationship between the crystal structure of a Ta film and the crystallinity of a Ta, O1 film formed by thermally oxidizing the Ta film, using heat treatment temperature as a parameter. ) is a cross-sectional view of a substrate showing the formation of a Ta2es film in the order of steps according to a conventional example. In the figure, 1 is a semiconductor substrate, which is an St substrate, 11 is a 5iJ4 film, 2 is a Ta film, and 2A is a Ta205 film.

Claims (3)

【特許請求の範囲】[Claims] (1)半導体基板(1)上に体心立方晶系の金属被膜(
2)を被着し、加熱して該金属被膜(2)を酸化金属被
膜(2A)に変換することを特徴とする被膜形成方法。
(1) Body-centered cubic metal coating (
2) and heating to convert the metal film (2) into a metal oxide film (2A).
(2)前記金属被膜(2)がタンタルであることを特徴
とする特許請求の範囲第1項記載の被膜形成方法。
(2) The film forming method according to claim 1, wherein the metal film (2) is tantalum.
(3)前記半導体基板(1)がその表面に絶縁膜(11
)を被着してなることを特徴とする特許請求の範囲第1
項記載の被膜形成方法。
(3) The semiconductor substrate (1) has an insulating film (11
) is coated with the first claim.
The film forming method described in Section 1.
JP11802485A 1985-05-31 1985-05-31 Film-forming method Pending JPS61276330A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11802485A JPS61276330A (en) 1985-05-31 1985-05-31 Film-forming method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11802485A JPS61276330A (en) 1985-05-31 1985-05-31 Film-forming method

Publications (1)

Publication Number Publication Date
JPS61276330A true JPS61276330A (en) 1986-12-06

Family

ID=14726177

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11802485A Pending JPS61276330A (en) 1985-05-31 1985-05-31 Film-forming method

Country Status (1)

Country Link
JP (1) JPS61276330A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2005022624A1 (en) * 2003-08-28 2007-11-01 国立大学法人東京農工大学 Insulating film formation method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2005022624A1 (en) * 2003-08-28 2007-11-01 国立大学法人東京農工大学 Insulating film formation method

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