JPS61172365A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the number of wirings while enabling driving at a TTL level normally used by unifying a high withstanding-voltage field-effect semiconductor device and a logic circuit, such as a shift register, a latch, a gate, etc. CONSTITUTION:An insulator layer 31 is attached to a p-type semiconductor substrate 30, and n-type ions are implanted partially to form an n-type ion implantation layer 41 to the substrate 30. Thick insulating substance layers 33 are shaped through oxidation, and a p-type impurity is ion-implanted or diffused from openings 35, 37 to form p-type impurity layers 42. An n-type impurity is diffused similarly to shape n-type impurity layers 43-1-43-4. Accordingly, a high withstanding-voltage field-effect semiconductor device and a logic circuit are unified and manufactured by using a DSA technique, thus simplifying a manufacturing process, then easily preparing the circuit because the manufacture is performed with the same semiconductor substrate 30.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] The present invention relates to a method of manufacturing a semiconductor device that is packed with high density. Plasma, electroluminescence, etc. flat display panels, electrostatic printers, etc. require high voltage drive, and since they are constructed with multiple electrodes, a large number of electrode drive elements capable of high voltage drive are required. Furthermore, as the number of electrode drive elements increases, a large number of circuits are required to send signals to the drive elements, and the connections between the electrodes and the drive elements, and between the drive elements and the circuits that send signals, have a one-to-one correspondence. Not only does the wiring become complicated,
The proportion occupied by the circuit increases.

FIG. 1 is an example of a character display circuit that uses a flat screen panel to display characters by line sequential scanning.

The flat screen panel 1° has a large number of electrodes on the X and Y axes, forming an X-Y matrix, and the intersections of the electrodes emit light. Flat Nuclean Spring 1v10
is characterized by its thin structure and multiple electrodes, whose intersections emit light when a high voltage is applied to them. Spring the letters/l'l.

When displayed above, number 10 to number 100 are displayed on both the X and Y axes.
electrodes are required, and depending on the number of characters displayed on the panel 10, there may be more than 1000 electrodes.

Each tree has an independent electrode, and in order to drive this electrode, one drive circuit 7, 9 is required for each tree.

That is, the number of circuits 7 and 9 that can be driven at high voltage is required as many as the number of electrodes to be driven, and the number of drive circuits 7 and 9 becomes enormous. Further, circuits for operating the drive circuits 7 and 9, such as a gate circuit 6, a memory circuit 5, a serial-to-parallel conversion transfer circuit 4, and a scanning circuit 8, are required, and in addition, a one-to-one correspondence with the drive circuits 7 and 9 is required. has been completed. Furthermore, connections between circuits, such as a connection 11 between the serial/parallel conversion transfer circuit 4 and the storage circuit 5, a connection 12 between the storage circuit 5 and the gate circuit 6, and a connection between the gate circuit 6 and the drive circuit 7 13. Since the connections 15 and the like between the scanning circuit 8 and the drive circuit 9 have a one-to-one correspondence with the drive circuits, the number of connections alone is enormous.

Next, the operation of the character display circuit shown in Figure VC11 will be described. .

The data output from the character generation circuit 1 is sent to the serial/parallel conversion/transfer circuit 4, and the serial/parallel conversion/transfer circuit 4 receives a clock signal from the control circuit 2 and transfers the data internally. When the data is filled in the serial/parallel conversion transfer circuit 4, the control circuit 2
The data is stored in the storage circuit 5 during the time 230 of the control signal A.
send to When the time 23 ends and the control signal A becomes Low, new data is sent from the character generation circuit 1 to the serial/parallel conversion transfer circuit 4. The data entered in the memory circuit 5 is sent to the drive circuit 7 through the gate circuit 6 during a time period 24 by the control signal B from the control circuit 2. On the other hand, the data circuit 3 sends a signal to the scanning circuit 8, and sends a scanning signal to the drive circuit 9. During time 24, high voltage signals from the scanning side (the side that operates the drive circuit 9 based on the scanning signal) and the data side (the side that operates the drive circuit 7 based on the data signal) are applied to the spring) v10 side. It is output and the characters light up.

As mentioned above, the Spring/L/10 applies a high voltage between the electrodes to cause the light emitting body between the electrodes to emit light, but in order to do so, the electrode drive element must be capable of switching operation with high voltage and large current. It is. Some bipolar devices meet these requirements, but their performance as a single device is limited.
There are no integrated circuits that are integrated on the same substrate (for example, a silicon substrate) using normal processes, but are limited to hybrid integrated circuits in which several circuits are mounted on a ceramic substrate using a thick film wiring resistor and a single bipolar element. . Hybrid integrated circuit also has output line 1
The input line for the book is one tree, and the drive circuit parts 7 and 9 in FIG. 1 are simply integrated in a hybrid manner. For this reason, the number of connections between circuits is not reduced, and the number of circuits and connections is enormous, the circuits occupy a large amount of space, and the advantage of making the panel 10 thinner is lost.

The present invention has been made in view of the above-mentioned drawbacks of the conventional devices, and an object of the present invention is to provide a method for manufacturing a high-density packaging semiconductor device in which input/output lines are arranged in order.

This will be explained in detail below along with the illustrated embodiments.

[Structure of the invention]

As is clear from FIG. 1, the connections between the serial-parallel conversion transfer circuit 4, memory circuit 5, gate circuit 6, and drive circuit 7 are in one-to-one correspondence with the electrodes of the flat display V-panel 10. The number of lines from the character generation circuit 1 and control circuit 2 to the serial/parallel converter circuit 4, the memory circuit 5, and the gate circuit 6 is several lines such as data input lines, clock lines, control signal lines, power supply lines, etc. That's enough. The same thing can be said about the scanning circuit 8 and the driving circuit 9.

The serial-to-parallel conversion transfer circuit 4 in FIG. 1 may be used as a shift register, the memory circuit 5 may be used as a latch, and the high voltage drive circuit 7 may be a high voltage field effect semiconductor device disclosed in Japanese Patent Application No. 51-1221. , respectively, and integrated into one chip is shown inside the broken line in FIG.

In Fig. 3, SRI to SRn are shift registers, LI
~LnH latch, G, ~Gn is gate, D 1- D
n indicates a drive circuit (or drive element). By integrating high-voltage field-effect semiconductors and logic circuits such as shift registers, latches, and gate circuits on one chip, there is no need for connections 11, 12, and 13 between each circuit, and each circuit uses individual components. Bits can be integrated into an integrated circuit chip by selecting a material (for example, a ceramic substrate) to mount the integrated circuit chip in consideration of heat dissipation etc.
The number n (subscript n in FIG. 3) can be chosen appropriately. By integrating a high-voltage field-effect semiconductor device with logic circuits such as shift registers, latches, and gates, the number of wiring lines can be reduced as much as possible, making it possible to drive at the normally used TTL level. be able to.

The content of the logic circuit integrated with the high-voltage field-effect semiconductor device must include at least a circuit that corresponds one-to-one with the spring/l/10 electrode in order to reduce the number of circuit elements and the number of connections between circuits as much as possible. It must be designed so that the number of input lines is very small compared to the output lines that correspond one-to-one with the electrodes of spring/L'lO.

Next, in order to integrate a high voltage field effect semiconductor device and a logic circuit on the same semiconductor substrate, it is necessary to use the same element manufacturing process. The high-voltage field-effect semiconductor device of this embodiment uses double diffusion technology (DiffusionSelf Align).
ment technology (hereinafter abbreviated as DSA technology), and the logic circuit is similarly manufactured using DSA technology.

The manufacturing process of the semiconductor device of this example will be described below with reference to FIG.

A thin insulating layer 31 (for example, 5
i02) is applied by applying a substance (for example, photoresist) 32 having a masking effect to prevent ion implantation, and partially implanting n-type ions onto the thin insulating layer 31 to form a substrate 30.
An n-type ion implantation layer 41 is formed. Next, a thick insulating material layer 33 (eg, 5 iOz) is formed by oxidation, and openings 34, 35, 36, 37 are formed using conventional photolithography techniques to expose the surface of the semiconductor substrate 300, and then the openings 34°3 are formed.
Form a thin Si0238, 39 on 6 and open the opening 35°37
A P-type impurity layer 42 is formed by diffusing JP-type impurities using ion implantation or a normal diffusion process. Thin Si
Remove O□38.39 and open openings 34.35, 36.37
The N-type impurity is then diffused in the same manner as in the P-type case to form N-type impurity layers 43-1, 43-2.43-3.43-4. The N-type impurity layers 43-1 and 43-3 are formed using the openings 35 and 37 opened when forming the P-type impurity layer 42. Thereafter, the final shape is obtained through the process of manufacturing a normal metal oxide semiconductor device, except for forming an n-type ion implantation layer 44 using ion implantation technology in order to put the device into depression mode in the logic circuit portion. Figure-(d
) is shown. In this way, by manufacturing high-voltage field-effect semiconductor devices and logic circuits using DSA technology, υ,
Each component is manufactured in a separate process, mounted on a package, and then connected to each other for use.The manufacturing process is simplified, and since they are manufactured on the same semiconductor substrate 30, complex circuit connection is processed inside the semiconductor device and the circuit This makes production easy.

The internal configuration of the fabricated semiconductor device is as shown in FIG. 5, with a region 62 in which high-voltage field effect semiconductor devices are arranged in a row arranged on the outside of the semiconductor device, and a logic circuit region 63 arranged in the center. Furthermore, by consolidating the input terminal area 64 in one place, the influence on the logic circuit 63 when a high voltage is applied is reduced. FIG. 6 shows a detailed structure of a partially enlarged semiconductor substrate. In this figure, 5Ri-i+sR
i.

S Ri+1 is a shift register, Ll-1, LI,
L1+1 schematically shows a latch, and G1-1t.G,i, Gi edition schematically shows a gate, and these correspond to FIG. The logic circuits are wired as shown in the figure, and these logic circuits have a clock, data, and control module A.

B is guided. Di-□y DB + DI+1 indicates a high voltage field effect semiconductor device formed on the outer peripheral edge of the semiconductor substrate, S is the source, g is the gate) dcl is the drain, and W is the semiconductor substrate formed at 65Vc. This is a wire that connects the high voltage field effect semiconductor device and the wiring 67 of the ceramic substrate 66 on which the semiconductor substrate is mounted.

62 and 63 indicate the respective areas.

As described above, the present invention integrates a high voltage drive circuit and a logic circuit, reduces the number of input lines as much as possible compared to the number of output lines of the integrated semiconductor device, and has a large number of electrodes such as a multi-electrode display device. This facilitates the production of circuits such as display devices that require high voltage drive. That is, as a configuration of a semiconductor circuit board for driving a driven object having multiple electrode lines such as a display device, a high voltage field effect semiconductor device operating at a high voltage and having multiple output lines connected to the electrode lines of the driven object is used. A low-voltage operation logic circuit section is arranged at the periphery of the semiconductor circuit board and has a smaller number of input/output lines than the number of output lines of the high-voltage field-effect semiconductor device, and is arranged at the center of the semiconductor circuit board. As a result, the area where high voltage is applied and operates is provided along the periphery of the semiconductor circuit board, which improves the reliability of the circuit board against dielectric breakdown, etc., and also improves electrical connection with driven objects. It becomes easier. The highly integrated logic circuit section, which does not have high voltage resistance, is separated from the high voltage region, and malfunctions caused by high voltage do not occur. The logic circuit for driving and controlling the high voltage field effect semiconductor device is not limited as long as the above relationship between the number of output lines and the number of input lines is maintained. That is, as long as the number of input lines can be significantly reduced relative to the number of output lines, as many circuits as possible using integration technology may be integrated in the same semiconductor device. In addition, by fabricating high-voltage field-effect semiconductor devices and logic circuits on the same semiconductor substrate through the same manufacturing process, high voltage drive metal oxide This makes it possible to manufacture physical semiconductor devices. Therefore, in the embodiment, DSA technology is used for both the high-voltage field-effect semiconductor and the logic circuit, but as long as the same technology is used and the relationship between the number of output lines and the number of input lines is maintained, what is the problem? The use of technologies other than DSA technology does not deviate from the idea of tree invention. The high-voltage driven metal oxide semiconductor device according to the invention can be used not only for flat display panels but also for devices that require high-voltage and large-current drive, such as electrostatic printers.

Therefore, according to the invention, it is possible to reduce the size, weight, and cost of multi-electrode, high-voltage, and drive device systems such as flat display panels and electrostatic printers.

[Brief explanation of drawings]

Figure 1 is a block diagram of the drive circuit and logic circuit of a flat display panel manufactured using conventional technology, and Figure 2 is a timing diagram showing an example of a control signal that controls the operation of the circuit shown in Figure 1. 3 is a block diagram showing an example of the case where the logic circuit shown in FIG. 1 is integrated;
FIG. 4 is a cross-sectional view showing the manufacturing process when a high-voltage field-effect semiconductor device and a logic circuit are manufactured on the same semiconductor substrate to explain one embodiment of the present invention, and FIG. Plan view showing an example of the layout of a semiconductor device, No. 6
The figure is a partially enlarged plan view of a semiconductor substrate. SR1~n...Shift register, L1~n...
Latch, 61-n...gate, D1-n...driver circuit, 30...semiconductor substrate, 31.33.38.3
9...SiO□, 34.35, 36.37...
Opening, 41... N-type ion implantation layer, 42... P-type impurity layer, 43-1.43-2.43-3.43-4
・N-type impurity layer, 44...n-type ion implantation layer, 51
．． 52.53, 54, 55.56...Al electrode, 6
DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 62... High voltage field effect semiconductor device, 63... Logic circuit, 64... Input terminal. Agent Patent Attorney Aihiko Fuku (2 others) Figure 1 Figure 4 Figure 5 Figure 6

Claims (1)

[Claims] 1. A high voltage field effect semiconductor device that operates at a high voltage and has a number of driving output lines corresponding to the number of lines of input line groups arranged in a row on the driven object is installed around the driving semiconductor circuit board of the driven object. A logic circuit section that operates at a low voltage and has a signal input line with a smaller number of lines than the number of drive output lines and has an output terminal that outputs a signal to the high voltage field effect semiconductor device and operates at a low voltage is connected to the semiconductor device. In the method of manufacturing a semiconductor device disposed in the center of a circuit board, the high-voltage field effect semiconductor device and the logic circuit portion are doped with P-type impurities and N-type impurities through mask patterns formed at corresponding positions. A method for manufacturing a semiconductor device, characterized in that the semiconductor device is simultaneously formed by introducing impurities into a substrate.