JPS6116325A - Floating point operating system - Google Patents

Abstract

PURPOSE:To shorten the processing time by using a memory, where correspondence relations are stored, for mutual conversion between fixed point expression and floating point expression. CONSTITUTION:A sign SB of a data expression XB of fixed point expression of a multiplier B is set to data RAM4, and the magnitude part of the expression XB is used as the address to obtain a floating point expression from a ROM10. A multiplicand A is stored in the data RAM4. With respect to signs, exclusive OR is operated through an arithmetic logic circuit (ALU)1, and the result is stored in the RAM. Mantissa parts are multiplied through a multiplier 3, and data is stored in the RAM4. These results are combined through the ALU1 to address a ROM11, thereby obtaining the floating point expression of the operation result.

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to a floating point arithmetic method, and more particularly to a mutual conversion method between floating point data and fixed point data in a digital signal processor. .

(Prior art) In conventional digital signal processors C (hereinafter referred to as DSP), it is generally not used to mix floating-point data calculations and fixed-point data calculations, and only one calculation method is used. It is carried out as follows. Especially when performing multiplication in a DSP that operates on fixed-point data, the bit length of the fixed-point data determines the operational accuracy.
! V. In order to increase precision, it becomes necessary to perform calculations using floating point representation. In this case, fixed-point data is converted into floating-point representation by bit shifting and bit masking, and floating-point calculations are performed by performing fixed-point calculations on each of the sign part, exponent part, and mantissa part.

When converting the calculation result to fixed-point representation, the data in fixed-point representation is obtained by shifting the mantissa of the calculation result by the number represented by the exponent, adding a sign, and editing. ing.

FIG. 2 shows an example of the configuration of a conventional DSP. Although various methods have been devised for the DSP architecture, an example of the configuration shown in FIG. 2 is a typical DSP configuration. As a component, the arithmetic logic unit 1 (hereinafter referred to as A L
), accumulator 2 (hereinafter referred to as ACC) 9
Multiplier 3 (hereinafter referred to as MPY), data RAM 4. Data T'LOM5, input/output interface section 7 (hereinafter I
10), an instruction program ROM 6 (hereinafter referred to as instruction ROM), and a sequence controller 8 are the main ones, and in addition, a shifter 9. Instruction decoder 1
2. Flag register 13. An address control section 14 and the like are normally provided.

Based on FIG. 2, the following describes the conversion process from fixed-point display data to floating-point display data, the arithmetic processing of floating-point display data, and the conversion process from floating-point display data to fixed-point display data. Multiplication AxB, = 0 (A The multiplicand, the 8 multiplier, and the C product will be explained in detail by taking as an example.

Note that Figure 3 shows the data format in multiplication processing, where (a) is fixed-point display data, (t)), (
c) and (d) id respectively show the formats of sign display data, mantissa display data, and exponent display data of the mantissa part when (a) is converted to floating point, and (e) is (b), ( c) and (d) are reduced to one data format &m 4(': Shows the format of floating point display data when L7 is used. (f) ld (c) (d)
It is a collection of the following. (a) Display XA of data A below.

Cb) display SB of data B, (c) display MB, (d
) display EB, and (e) display FC of data C.

First, the multiplier g A is (bl (cl, (d) display!/(
Assume that the multiplier B is stored in data R and AM 4 as (a) display XB, respectively, as SA, MA, and EA. To perform the multiplication AxB, it is necessary to convert the multiplier B to floating point representation. Conventionally, in order to perform this process, (a) display XB of data B taken out from data RAM 4 and data ROM
Mask pattern of bits subtracted from 5 (10...
0) into ALU1 and put "1" in the bit below the decimal point.
(d) display EB of data B is counted up and determined by sequentially shifting XT3 through the shifter 9, and then XB is determined by the number determined by EB.
is shifted to the left by the shifter 9, the bit where lI+ is set is placed at the beginning, and further shifted to the right to be right-aligned to obtain (C) display MB of data B. Also, data B (1)
) Display SB is obtained by extracting the sign of XB, and these S
B, EB, , MB are stored in the data RAM 4. Next, the multiplication process uses SA and SB as ALU for the sign.
Exclusive OR operation is performed through 1, and the result is stored as data T.
(Q of data C in AM, i)) Store as display Sc. Regarding the exponent part (is EA, l!:EB is ALU IM
Fixed-point multiplication is performed through PY3 and the result is converted to (c
) is displayed using shifter 9 and data R is displayed.
Store in AM4.

Multiplication using floating point representation is performed through the processing described above. Then data C is displayed as a floating point number 8c,
;7 To convert from MO, & to fixed-point representation
XC is obtained by performing arithmetic processing to shift left through U1 and shifter 9, and adding Sc to the result.

(Problem to be Solved by the Invention) However, as can be seen from the above explanation, such a conventional method [6] requires the number of processing steps for converting from fixed-point representation to floating-point representation and vice versa. The number of conversion processing steps is large, which increases the processing time, limits the DSP processing ability, and makes complex processing difficult. Therefore, the purpose of the present invention is to solve these conventional problems. The goal is to eliminate it.

Means for Solving Problem C) This invention, when performing arithmetic operations on data expressed in fixed point numbers, converts the data to be operated on to floating point expressions and calculates the exponent and mantissa parts separately. , in an arithmetic method for converting a floating point representation of an arithmetic result into a fixed point representation, a memory for storing correspondence between each fixed point representation and floating point representation for mutual conversion between the fixed point representation and the floating point representation; It is a floating point arithmetic method that uses means.

(effect) The technical means of this invention operates as follows.

The correlation between each fixed-point representation and floating-point representation is stored in advance in the storage means (/-). Therefore, the desired conversion can be easily performed by simply reading out the ten relationships required at the time of conversion from the storage means. can get.

(Example) Hereinafter, the present invention will be described in detail based on an example with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention. In the figure, the same components as in FIG. 2 are given the same reference numerals.

The feature of this embodiment is that the FLP-ROM 10, which stores floating point representations corresponding to fixed point representations surrounded by broken lines, is
and F that stores fixed decimal point display corresponding to decimal point display.
This is due to the provision of IX・ROM11.

Next, to explain the operation using the above-mentioned multiplication as an example, (a) the sign SB of the displayed XB of the data B is set in advance in the data RAM 4, and (f) the sign according to the display is set using the magnicido part of XB as an address. F excluding floating point representation
LIP-ROM10 is obtained. In this way, addressing only the magniceed portion leads to a reduction in the number of words in the ROM. And the multiplier B is SB, MB
, EB and stored in the data RAM 4. Multiplicand A is already data R as SA, MA, BA
Since it is stored in AM4, multiplication in floating point representation is
Regarding the sign, perform exclusive OR operation on SA and SB through AT and Ul, and store the result in data RAM 4 of data C (
+)) Stored as display Sc.

The exponent part adds EA and EB through AT and Ul, and stores it in data R and AM4 as (d) display EC of data C. Fixed-point multiplication is performed on the mantissa parts MA and MB through MPYa, and the result of the operation is shifted by the shifter 9 so as to be displayed in (C) and stored in the data RAM 4. To obtain the fixed point representation of the multiplication result C of data A and B obtained in this way, the floating point representation of the calculation result sc, EC
, Mc are combined and edited through ALU, and data 0 (e
) By addressing FIX-ROMII as a display, (a) display Xc of data C can be easily obtained without requiring much processing. Note that the number of bits of E in (d), (e), and (fl) in the exponent part of the floating point representation is (
a) By having one bit more than the number of bits required to express the display
FIX4 to convert from floating point display to fixed point display
It can be carried out by including it in 0M.

According to this embodiment, in floating point calculations by a DSP with fixed point representation, the ROM is used for the processing of converting data in fixed point representation to floating point representation and the processing of converting data in floating point representation to fixed point representation. By doing so, there is an advantage that a large number of processing steps can be reduced.

Also, when converting from fixed-point representation to floating-point representation, the ROM is referenced only by the magnitude, and the sign is added to the result of subtracting the ROM, so the word length is reduced and the R
This leads to a reduction in OM. Furthermore, when converting from floating point representation to fixed point representation, it is possible to take appropriate measures against overflow by increasing the bit length of the exponent part by one bit.

(Effects of the Invention) As described above, according to the present invention, it is possible to provide a floating point arithmetic method that uses a digital signal processor and has a short processing time.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention and a diagram showing a first processing data format. 1... Arithmetic logic unit (AT, T, J), 2... Akyem 1/-ta (ACO), 3... Multiplier (MPY)
, 4...Data R, A-M. 5...Data ROM. 6...Instruction ROM. 7. Input/output interface unit (Ilo), 8 Sequence controller, 9... Thick, 10... FLP-11 (, OM. 11... FIX-ROM. 12... Instruction decoder, 13... Flag Register, 14...Address control unit, RO-TL4-...Register, 80, 81,...Selector〇

Claims (1)

[Claims] When performing calculations on fixed-point data, convert the data to be calculated into floating-point representation, calculate the exponent and mantissa parts separately, and convert the floating-point representation of the calculation result to fixed-point representation. A floating point arithmetic method characterized in that the mutual conversion between the fixed point representation and the floating point representation is performed using a storage means for storing the correspondence between each fixed point representation and floating point representation. .