JPS6116641A - Automatic multiplex delay system - Google Patents

Abstract

PURPOSE:To set automatically the delay of a transmission line by correcting the delay time of the transmission line of multiple constitution through firmware during initialization, and holding data on it. CONSTITUTION:A delay correcting circuit 103 receives input signals from highways 105a-108a and judges how long the highway input signals need to be delayed on the basis of memory data, thereby outputting highway output signals to highways 105b-108b. When initializing operation (POW ON RESET) is performed, a pilot pattern signal outputted from the delay correcting circuit 103 is monitored by a microprocessor 102 and memory contents are updated until a pilot pattern is outputted to the highways 105b-108b at the same time. The delay correcting circuit 103 varies the delay time successively when the memory contents are altered.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to multiplexed transmission paths, and particularly to a system for multiplexing highways having delay times.

[Prior art]

Conventional multiplexing methods often employ a method in which a delay circuit is provided for each noiway, and the delay time setting is changed while observing the waveform.

Therefore, it was necessary to set the delay time for each highway while observing the waveform, and there was a drawback that modules with the same product name were not compatible.

[Purpose of the invention]

The present invention solves the above-mentioned drawbacks by correcting the delay time of the transmission path in the multiplexed transmission path using firmware at the time of initial setting and retaining the data. The objective is to provide an automatic multiplexing delay method that sets

[Structure of the invention]

As described above, the present invention detects the highway piping pattern using firmware during the initial setting of the transmission path, sets the highway delay time, and automatically corrects the delay by providing an operating state meso. The configuration is as follows.

[Explanation of Examples]

Hereinafter, one embodiment of the present invention will be described in detail based on the drawings.

FIG. 1 is a block diagram for explaining an embodiment, and ioo is a device for carrying out the method of the present invention. This device 100 includes a memory 101, a microprocessor sensor 102, a delay correction circuit 103, and a multiplex circuit 104.

The memory 101 has the function of holding the program of the microprocessor sensor 102 and the correction value of the delay correction circuit 103. Furthermore, the microprocessor 102 has the function of monitoring the pilot pattern signals of the delay correction circuit 103 and sequentially changing the memory data so that the pilot signals are simultaneously output on the highways 105b-108b.

The delay correction circuit 103 is connected to the highway 105a-10.
It receives the input signals of 8a and 8a, uses memory data to determine how much the highway input signal should be delayed, outputs the highway output signals to highways 105b to 108b, and determines how the pilot signal changes. The configuration is such that the microprocessor sensor 102 can monitor whether the signal is being output at the specified timing. The multiplex circuit 104 has the function of multiplexing signals on highways 105b-108b and outputting the signals to a multiplex transmission line on highway 109b.

After initial setting (POW ON R'ESET),
The microprocessor 102 monitors the pilot pattern signals that are output from the delay correction circuit 103, and changes the memory contents until the pilot patterns are simultaneously output to the highways 105b to 108b.

The delay correction circuit 103 sequentially changes the delay time when the memory contents are changed.

With this configuration, at the time of initial setting, the firmware detects the highway pilot pattern, sets the highway delay time, and has an operating state memory to automatically correct the delay.

〔Effect of the invention〕

As explained above, in a multiplexed transmission path, the present invention corrects the delay time of the transmission path using firmware at the time of initial setting and retains that data, thereby automatically correcting the delay time of the transmission path. It has the effect of being configurable.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an apparatus for explaining one embodiment of the present invention. 100...Automatic multiplexing delay system device 101...Memory 102...-Microprocessor- 103...Delay correction circuit 104...Multiple circuit 10
5a-108a ”・Nowayway (incoming cable-way signal) 105b-108b...Highway (delay correction highway signal) 1o9b...Multiple transmission line Figure 1

Claims (1)

[Claims] An automatic multiplexing delay method characterized by providing a circuit that corrects the delay time in accordance with the highway when performing multiplexing on the transmission path, and determining the delay time correction corresponding to the highway by firmware at the time of initial setting. .