JPS61115155A - Control system of information processor - Google Patents

Abstract

PURPOSE:To attain the rise of a system without waiting the loading of program data by loading data stored in a ROM memory device on a main memory device at rise and correcting it based on correction data stored in an EEPROM memory device. CONSTITUTION:Since program data is transferred to the main memory device from the ROM memory device at the time of the rise of a system, its transfer and load is remarkably quick. When storage contents in the ROM memory device 2 should be corrected, only the correction content is stored in the EEPROM device. This correction has flexibility because the contents are corrected at processing. Since only an address to be corrected is stored in the EEPROM device, its transfer requires no long time. Thus the system rise can be executed quickly and securely, and the EEPROM memory device can easily correct backup program data.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for loading programs and data into a main memory of an information processing device.

[Conventional technology]

Generally, information processing devices use RAM (Ran
dom Access Memory) storage device, an external storage device such as a magnetic tape storage device or a disk storage device is provided for storing bank-up program data. FIG. 3 is a block diagram of a conventional device. A control device 1 , a main memory device 2 , a data transfer control circuit 3 , an external storage control device 4 , and a series connection of an external storage device 5 are coupled via a path line 10 . At the time of system startup, the control device 1 starts processing after transferring and loading the program from the external storage device 5 to the main storage device 2 via the external storage control device and the data transfer control device 3. Since the data transfer speed of the external storage device 5 via the external storage control device 4 is slow, the overall information speed is low.

[Problem that the invention seeks to solve]

As mentioned above, since the data transfer speed of the external storage device is low, there is a drawback that it takes time to load program data at system start-up. Furthermore, since even external storage devices are writable, they have the disadvantage that when a device malfunctions, the program data area may be destroyed and the system may not start up.

Also, ROM (Read Only Memory
) When a storage device is used to store bank-up program data, there are problems such as it is not easy to modify the stored contents.

The present invention improves this and aims to provide an information processing device that can start up a system without waiting for program data to be loaded into an external storage device.

[Means for solving problems]

The present invention provides an information processing device comprising a main storage device constituted by a RAM and a control means for transferring and loading data to the main storage device, which includes a ROM storage device storing a backup program, and a ROM storage device storing the backup program. an EEPROM storage device storing correction data of the EEPR○; and means for modifying the data loaded into the main storage device based on modification data stored in the M storage device.

Furthermore, it is preferable that the EEFROM storage device includes a program modification mode circuit that writes the address of the program loaded into the main memory device to be modified together with the address to be modified in the main memory device.

[Effect]

The present invention provides an RO for storing backup programs.
Since the M storage device is provided, it is possible to transfer and load data from the ROM storage device to the RAM storage device at high speed when the system is started up, so that the system startup can be done quickly and reliably. Further, since an EEPROM storage device is provided separately and the modified address and contents of the ROM storage device are retained, even if the ROM storage device is modified, it can be flexibly handled.

[Embodiment 0] Next, an embodiment of the present invention will be described with reference to the accompanying drawings.

FIG. 1 is a block diagram of an apparatus according to an embodiment of the present invention.

■ is a control device, 2 is a RAM storage device which is the main storage device,
3 is a data transfer control device, 6 is a ROM storage device, and 7 is an E
EPROM storage devices, each coupled via a bus IO. Note that the parts having the same drawing numbers as in the conventional example FIG. 3 have the same names and functions. In FIG. 1, when the system is started up, program data is transferred from the ROM storage device 6 to the main storage device 2. However, the problem here is the modification of the program data transferred from the ROM storage device 6. In the present invention, an EEPROM storage device 7 is provided for storing modification addresses and modification contents for modifying program data. After the program data from the ROM storage device 6 has been transferred, the contents of the main storage device 2 are changed from the EEPROM storage device 7 according to the modified address.

Further, in the present invention, a program data modification mode circuit 7a is provided in the EEFROM storage device 7 to modify the contents of the main storage device 2 when depacking the program data and to write the modified address and the modified contents into the EEPROM storage device 7. FIG. 2 is a conceptual diagram of data transfer of an embodiment of the present invention. In the figure, O-・-X, o-y, o-z
are the main storage device 2, ROM storage device 6, and EEP
The address of the ROM notation device 7, XXX is the program data that is the content thereof, and nm is the modified address information stored in the EEFROM storage device. To explain this in this figure, at the time of system start-up, addresses 0 to X in the ROM storage device 6 are transferred as they are to addresses O to X in the main storage device 2 (this is referred to as operation 2 in FIG. 2). Then EEFR
According to the address information n stored at address 0 of the OM storage device 7, the contents of address n in the main storage device are rewritten with the data at address 0 of the EEPROM storage device 7 (operation in Figure 2 ■)
. In addition, in data correction mode, control unit 1 (CPU)
It rewrites the contents of address m in the main storage device 2 instructed by , and writes address m information and its contents to address 1 of the EEFROM storage device storage device 7 (operation shown in Figure 2).
.

With this configuration, program data is transferred from the ROM storage device to the main storage device when the system is started up, so the transfer and loading are extremely fast.

Further, when a modification occurs to the contents stored in the ROM storage device, by recording only the modification contents in the EEPROM storage device, the modification contents can be modified during processing, thereby providing flexibility. Since only information at addresses that require correction is recorded in the EEFROM storage device, it does not take time to transfer the information.

〔Effect of the invention〕

As described above, the present invention has the advantage that the system can be started up quickly and reliably by transferring program data from a ROM storage device. Furthermore, there is an advantage that backup program data can be easily modified using the EEPROM storage device.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention. FIG. 2 is a conceptual diagram of data transfer of the embodiment device of the present invention. FIG. 3 is a block diagram of a conventional device. DESCRIPTION OF SYMBOLS 1... Control device, 2... Main memory device (RAM memory device), 3... Data transfer control circuit, 4... External storage control device, 5... External storage device, 6... ROM storage device, 7... EEPROM storage device, 7a... Program data modification mode circuit, 10... Piline.

Claims (2)

[Claims] (1) In an information processing device equipped with a main storage device constituted by a RAM and a control means for transferring and loading data to the main storage device, a ROM storage device storing a backup program, and a ROM storage device storing a backup program; an EEPROM storage device in which correction data is stored, and the control means includes means for loading the data stored in the ROM storage device into the main storage device when the information processing device is started up, and the EEPROM storage device and means for correcting data loaded into the main storage device based on correction data stored in the main storage device. (2) The information set forth in claim (1), wherein the EEPROM storage device includes a program modification mode circuit that also writes an address to be modified of the program loaded into the main storage device into the main storage device. Control method for processing equipment.