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JPS6090454A - Block transfer system - Google Patents

Block transfer system

Info

Publication number
JPS6090454A
JPS6090454A JP58199770A JP19977083A JPS6090454A JP S6090454 A JPS6090454 A JP S6090454A JP 58199770 A JP58199770 A JP 58199770A JP 19977083 A JP19977083 A JP 19977083A JP S6090454 A JPS6090454 A JP S6090454A
Authority
JP
Japan
Prior art keywords
data
input
signal
transfer
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58199770A
Other languages
Japanese (ja)
Inventor
Koyo Oyama
尾山 幸洋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58199770A priority Critical patent/JPS6090454A/en
Publication of JPS6090454A publication Critical patent/JPS6090454A/en
Pending legal-status Critical Current

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  • Detection And Prevention Of Errors In Transmission (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To attain the block transfer with high efficiency between two input/ output controllers different in transfer system by providing a system conversion input/output controller between said two controllers, and comparing the normal information counted values fed from both controllers with each other when the block transfer is over. CONSTITUTION:When a variable length block is transferred to an input/output controller B from an input/output controller A, a system conversion input/output controller P transmits the transfer preparatory request data 30 and a transfer preparatory request signal 31 to the controller B and receives the answer data 32 and an answer signal 33 from the controller B to confirm the end of preparation. Then the controller P transmits a transmission data request signal 34 to the controller A to obtain the transmission data 35 and a confirmation answer signal X as answers and replaces the counter for signal X. Then the controller P transmits the data 37 and a data transaction request signal 38 to the controller B to obtain a confirmation answer signal Y and renews the counter for signal Y. The count values of signals X and Y are compared with each other after the transfer is through with a prescribed number of blocks. Thus it is possible to confirm the normal transfer of blocks.

Description

【発明の詳細な説明】 〔発明の属する技術分野〕 本発明は情報処理装置の入出力制御装置におけるブロッ
ク転送方式に関する。特に異なる入出力制御方式により
設計された入出力制御装置間におけるブロック転送方式
に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical field to which the invention pertains] The present invention relates to a block transfer method in an input/output control device of an information processing device. In particular, it relates to a block transfer method between input/output control devices designed using different input/output control methods.

〔従来技術の説明〕[Description of prior art]

従来この種の装置では、データの送受において制御信号
による確認動作を行っている。したがって複雑な所定の
手順を踏むことが必要であり、そのシーケンスに必要な
最低時間間隔を短縮できない問題点がある。また、転送
方式の異なる装置間でブロック転送を行う場会は、本来
、各転送方式毎に閉じた系内で転送を閉塞する。すなわ
ち一つの系内でブロック転送を終えた時もう一方の系へ
データを渡し別系の対向装置へ転送する方法を取るよう
に設計されている。しかし、これは装置の規模が大きく
複雑なものとなる欠点があり、転送効率も低くなる欠点
があった。
Conventionally, this type of device performs a confirmation operation using a control signal when transmitting and receiving data. Therefore, it is necessary to follow a complicated predetermined procedure, and there is a problem that the minimum time interval required for the sequence cannot be shortened. Furthermore, when block transfer is performed between devices using different transfer methods, the transfer is originally blocked within a closed system for each transfer method. In other words, it is designed so that when a block transfer is completed within one system, the data is passed to the other system and transferred to the opposing device of the other system. However, this has the disadvantage that the device is large and complex, and the transfer efficiency is also low.

〔発明の目的〕[Purpose of the invention]

本発明は、入出力制御方式の異なる装置間で、データの
ブロック転送を最短時間でしかも確実に行う転送効率の
よい方式を提供することを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a highly efficient method for transferring data blocks in the shortest possible time and reliably between devices with different input/output control methods.

〔発明の特徴〕[Features of the invention]

本発明は、異なる転送方式を持つ装置間のブロック転送
を行うs合に、個々のデータ転送シーケンス毎にデータ
の正常または異常の確認を行わず、正常通知のカウント
のみを行い転送終了時にそのカウント値の照会確認を行
いオーバーオールで正常性を確認するという非確認転送
の概念を導入することKより、最小構成からなる転送装
置を実現することができ、同時K、高効率ブロック転送
を行うことができる転送方式を提供するものである。
When performing block transfer between devices with different transfer methods, the present invention does not check whether the data is normal or abnormal for each individual data transfer sequence, but only counts normal notifications and counts the number when the transfer is completed. By introducing the concept of non-confirmed transfer, which checks the overall normality by checking the value, it is possible to realize a transfer device with a minimum configuration, and it is possible to perform simultaneous and highly efficient block transfer. This provides a transfer method that can be used.

すなわち本発明は、中央制御系からの制御のもとそ、異
なる入出力制御方式を持つ装置間のブロック転送制御を
行う方式変換入出力制御装置において、上記入出力制御
装置は制御信号のドライバおよびレシーバ、データバス
のドライバおよびレシーバ、メモリおよび制御部等によ
り構成され、相対する入出力制御装置でかつ転送方式の
異なる入出力制御装置A、B間で可変長ブロック転送を
行う場合に、前記方式変換入出力制御装置は対向入出力
制御装置BIC対して転送準備要求データと転送準備要
求信号を送出して転送準備を起動し、それに対する対向
入出力制御装置Bからの応答データと応答信号を確認し
た後に、対向入出力制御装置Aから対向入出力制御装置
Bへの送(g時には、上記方式変換入出力制御装置は対
向入出力制御装置Aに送信データ送出要求信号を送出し
、それに対する送信データと確認応答信号(X)を受け
た後にその送信データを対向入出力制御装置Bのデータ
バスに乗せ送信データ引取要求信号オンにする動作を一
定周期で指定回敬分繰り返し行い、−刃対向入出力制御
装置Bはデータ受信毎に確認応答信号(Y) e返送し
前記方式変換入出力制御装置は一定時間内の上記確認応
答信号(X) 、(Y)の正常通知を送信動作と独立に
カウントし転送数の正常性を確認して終了動作へ移るよ
うに構成される。
That is, the present invention provides a method conversion input/output control device that performs block transfer control between devices having different input/output control methods under control from a central control system, wherein the input/output control device has a control signal driver and a control signal driver. When performing variable-length block transfer between input/output control devices A and B, which are opposing input/output control devices that are composed of a receiver, a data bus driver, a receiver, a memory, a control unit, etc. and have different transfer methods, the method described above is used. The conversion input/output control device sends transfer preparation request data and a transfer preparation request signal to the opposing input/output control device BIC to start transfer preparation, and confirms the response data and response signal from the opposing input/output control device B. After that, the transmission data is sent from the opposite input/output control device A to the opposite input/output control device B (at time g, the method conversion input/output control device sends a transmission data transmission request signal to the opposite input/output control device A, and After receiving the data and acknowledgment signal (X), the transmission data is placed on the data bus of the opposing input/output control device B, and the operation of turning on the transmission data take-back request signal is repeated for a specified number of times at a fixed period, and - Output control device B sends back an acknowledgment signal (Y) e every time data is received, and the system conversion input/output control device notifies normality of the acknowledgment signals (X) and (Y) within a certain period of time independently of the sending operation. It is configured to count, confirm the normality of the number of transfers, and then proceed to the termination operation.

また対向入出力制御装置Aへの対向入出力装置Bからの
受信時には、前記方式変換入出力制御装置は、対向人出
力制御装置B[受信データ送出要求信号を送出し、それ
に対する少年データと確認応答信号(Y)を受けた後に
、その受信データを対向入出力制御装置Aのデータバス
に乗せ受信データ受信要求信号オンにする動作を一定周
期で指定回斂分繰り返し行い、−刃対向入出力制御装置
Aはデータ受信毎に確認応答信号(X)を返送し上記方
式変換入出力制御装置は一定時間内の上記確認応答信号
(X) 、(Y)の正常通知を受信動作と独立にカウン
トし転送数の正常性を確認して終了動作へ移り、終了動
作中で正常または異常処理を行いブロック転送中に制御
信号の確認を行わず途中で異常が発生しても中断しない
ようにした非確認転送ブロック転送方式を特徴とする。
Furthermore, when receiving data from the opposing input/output device B to the opposing input/output control device A, the method conversion input/output control device sends a received data transmission request signal to the opposing person output control device B, and confirms that the received data is juvenile data. After receiving the response signal (Y), the operation of putting the received data on the data bus of the opposing input/output control device A and turning on the receiving data reception request signal is repeated at a fixed cycle for the specified number of times, and the -blade opposing input/output is switched on. Control device A returns an acknowledgment signal (X) every time data is received, and the system conversion input/output control device counts the normal notifications of the acknowledgment signals (X) and (Y) within a certain period of time, independently of the reception operation. After confirming the normality of the number of transfers, it moves to the termination operation, performs normal or abnormal processing during the termination operation, and does not check the control signal during block transfer so that it will not be interrupted even if an error occurs midway. It is characterized by a confirmed transfer block transfer method.

〔実施例の説明〕[Explanation of Examples]

第1図は本発明の実施例装置のブロック構成図である。 FIG. 1 is a block diagram of an apparatus according to an embodiment of the present invention.

第2図はその送信シーケンス、第5図は受信シーケンス
を示す。入出力制御装置Aの制御部1はメモリ2に結合
され、さらに制御信号出力装置3、制御信号入力装置4
、データ信号出力装置5およびデータ信号入力装置6に
結合する。メモリ2の読出出力は上記データ信号出力装
置5に入力し、データ信号入力装置6の出力がこのメモ
リ2に入力する。
FIG. 2 shows the transmission sequence, and FIG. 5 shows the reception sequence. A control section 1 of the input/output control device A is coupled to a memory 2, and further includes a control signal output device 3 and a control signal input device 4.
, coupled to a data signal output device 5 and a data signal input device 6. The read output of the memory 2 is input to the data signal output device 5, and the output of the data signal input device 6 is input to the memory 2.

制御信号出力装置3の出力は方式変換人出力制御装置P
内の制御信号入力装置7に結合し、制御(N号人力装置
4は制御信号出力装置8に結合し、前記データ信号出力
装置5とデータ信号入力装置6とは方式変換入出力制御
装置内のデータ信号入力装置9とデータ信号出力装置I
Oとに結合する。
The output of the control signal output device 3 is the system converter output control device P.
The control (No. Data signal input device 9 and data signal output device I
Combines with O.

制御信号入力装置7、制御(iffff力出力装置8−
タ信号入力装置9およびデータ信号出力装M10は制御
装置制御部11およびカウンタ13に結合する。
Control signal input device 7, control (iffff force output device 8-
The data signal input device 9 and the data signal output device M10 are coupled to the controller controller 11 and the counter 13.

制御装置11には中央制御系装置間の出力が入力する。Outputs between the central control system devices are input to the control device 11 .

上記制御装置制御部11は制御信号出力装置14、制御
信号出力装置15、チータイg号出力装置16およびデ
ータ信号入力装置17に結合するとともにメモ+712
に結合する。前記データ信号入力装置9はメモリ12を
介して上記データ信号出力装置16に結合する。上記デ
ータイ8号入力装[17の出力はメモリ12を介して上
記データ信号出力装置lOに結合する。
The control device control section 11 is coupled to a control signal output device 14, a control signal output device 15, a Chi-tai g output device 16, and a data signal input device 17, and is connected to a memo+712.
join to. The data signal input device 9 is coupled to the data signal output device 16 via a memory 12 . The output of the data input device No. 8 [17] is coupled via the memory 12 to the data signal output device IO.

制御信号出力装置14の出力は、入出力制御装置Bの制
御信号入力装置18に入力し、制御信号入力装置15に
は上記B内の制御信号出力装置19が結合する。
The output of the control signal output device 14 is input to the control signal input device 18 of the input/output control device B, and the control signal output device 19 in the above-mentioned B is coupled to the control signal input device 15.

制御信号出力装置16とデータ信号人力装置17と杜と
もに人出力制御装置B内のデータ信号入力装置20とデ
ータ信号出力装置21の一方の端子に結合する。上記制
御信号入力装置■8、制御信号出力装置19、データ信
号入力装置20およびデータ(8号出力装置21の他方
の端子は入出力制御装置B内の制御部22に結合される
。上記データ信号入力装置20とデータ信号出力装置2
1はメモリ23を介して上記制御部22に結合される。
The control signal output device 16, the data signal human power device 17, and the data signal output device 17 are both connected to one terminal of the data signal input device 20 and the data signal output device 21 in the human power control device B. The other terminal of the control signal input device 8, the control signal output device 19, the data signal input device 20, and the data (No. 8 output device 21) is coupled to the control section 22 in the input/output control device B. Input device 20 and data signal output device 2
1 is coupled to the control section 22 via a memory 23.

次に本発明方式の動作について説明する。ここでは、対
向する人出力制御装置Aから対向する人出力制御装置B
へ可変4にブロック転送を行う場仕について説明する。
Next, the operation of the system of the present invention will be explained. Here, from the opposing human output control device A to the opposing human output control device B
The procedure for performing block transfer to variable 4 will be explained.

方式変換入出力制御装置Pでは、制御装置制御部11の
指示によりデータ信号出力装置16から転送準備要求デ
ータ30を送出するとともに、制御信号出力装置14か
ら転送準備要求信号31を送出する。そして入出力制御
装置Bから応答データ32と応答信号33を受けて準備
完了を確認すると、制御装置制御部11は、入出力制御
装置Aに対して送信データ送出要求信号34を送出し、
その応答として送信データ35と確認応答信号36(X
)を受け送信データをメモI712へ渡し、確認応答信
号Xのカウンタを更新する。そして上記制御装置制御部
11の指示によりメモリ12から送信データをデータ信
号出力装置16へ渡し、送信データ37と送信データ引
取要求信号38を送出し、その応答として確認応答信号
39(Y)を受け確認応答信号39(Y)のカウンタを
更新する。
In the system conversion input/output control device P, the data signal output device 16 sends out transfer preparation request data 30 and the control signal output device 14 sends out a transfer preparation request signal 31 according to instructions from the control device control section 11 . After receiving the response data 32 and response signal 33 from the input/output control device B and confirming the completion of preparation, the control device control section 11 sends a transmission data sending request signal 34 to the input/output control device A.
As a response, transmission data 35 and confirmation response signal 36 (X
) is received, the transmission data is passed to the memo I 712, and the counter of the acknowledgment signal X is updated. Then, according to the instruction from the control device control section 11, the transmission data is passed from the memory 12 to the data signal output device 16, the transmission data 37 and the transmission data collection request signal 38 are sent out, and an acknowledgment signal 39 (Y) is received as a response. The counter of the acknowledgment signal 39(Y) is updated.

以上の動作を指定回数分繰り返し、とnと並行して一定
時間内の確認応答信号36(X)、39(Y)の受信回
数管理を行い、終了信号40と転送結果データ41を受
けて転送数の確認熱台をし、転送結果データ41と合わ
せて転送の正常性を確認しブロック転送を完了する。
The above operation is repeated a specified number of times, and in parallel with n, the number of receptions of acknowledgment signals 36 (X) and 39 (Y) within a certain period of time is managed, and upon receiving the end signal 40 and transfer result data 41, the data is transferred. The block transfer is completed by checking the normality of the transfer together with the transfer result data 41.

なお、対向入出力制御装置Bから対向入出力制御装置A
への受信時にも上記の送信時と同様にブロック転送を行
うことができる。
In addition, from the opposing input/output control device B to the opposing input/output control device A
Block transfer can also be performed during reception to , similar to the above-mentioned transmission.

〔効果の説明〕[Explanation of effects]

本発明は以」二説明したように、非確認転送の概念を導
入することにより異なる転送方式を持つ装置間において
最小構成の制御信号でのブロック転送が可能であり、ま
た、装置間のバスが高品質ならば、エラーによるリトラ
イ回数も少なく、ブロック単位のりトライ回数は少なく
なり高効率な転送が可能でおる。また、転送中に制御信
号の確認動作を行わないことから制御部を簡略化した構
成にできる等の効果がある。
As explained below, by introducing the concept of unconfirmed transfer, the present invention enables block transfer between devices with different transfer methods using control signals with a minimum configuration, and also allows the bus between devices to If the quality is high, the number of retries due to errors will be small, and the number of block-by-block connection attempts will be reduced, allowing highly efficient transfer. Further, since the control signal confirmation operation is not performed during transfer, there is an advantage that the control section can be configured in a simplified manner.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明方式を適用する入出力制御装置のブロッ
ク構成図。 第2図は本発明方式の送信シーケンス図。 ^at Ii’71 1−→ −晶(= か 140 
士 」ゝ n’+ −ル l電 、・) − ノr ・
ノ フ 1込^1.11.22・・・制御部、2.12
.23・・・メモリ、3.8.14.19・・・制御信
号出力装置、4.7.15.18・・・制御信号入力装
置、5.10.16.21・・・データ信号出力装置、
6.9.17.20・・・データイ百号人力装置、13
・・・カウンタ、A・・・入出力制御装置、B・・・入
出力制御装置、P・・・方式変換入出力制御装置、□□
□・−・中央制御系装置、30・・・転送準備要求デー
タ、31・・・転送準備要求信号、32・・・応答デー
タ、33・・・応答信号、34・・・送信データ送出要
求信号、あ・・・送信データ、36・・・確認応答信号
(X)、37・・・送信データ、38・・・送信データ
引取要求(ii号、39・・・確認応答信号(Y)、4
0・・・終了信号、41・・・転送結果データ、42・
・・受イgデータ送出要求信号、43・・・受信データ
、44・・・確認応答イぎ号(Y)、45・・・受信デ
ータ、46・・・受信データ受信要求倍力、47・・・
確認応答信号(x)。 特許出願人 日本電気株式会社 代理人 弁理士 井 出 直 孝 児 2 ロ M 3 ロ
FIG. 1 is a block diagram of an input/output control device to which the method of the present invention is applied. FIG. 2 is a transmission sequence diagram of the method of the present invention. ^at Ii'71 1-→ - crystal (= ka 140
し ゝn'+ -REL 、・) -nor ・
No F 1 included ^1.11.22...Control unit, 2.12
.. 23...Memory, 3.8.14.19...Control signal output device, 4.7.15.18...Control signal input device, 5.10.16.21...Data signal output device ,
6.9.17.20... Datai No. 100 human-powered device, 13
... Counter, A... Input/output control device, B... Input/output control device, P... Method conversion input/output control device, □□
□ -- Central control system device, 30 -- Transfer preparation request data, 31 -- Transfer preparation request signal, 32 -- Response data, 33 -- Response signal, 34 -- Transmission data sending request signal , A... Transmission data, 36... Confirmation response signal (X), 37... Transmission data, 38... Transmission data collection request (No. ii, 39... Confirmation response signal (Y), 4
0... End signal, 41... Transfer result data, 42.
...Receive key data transmission request signal, 43...Receive data, 44...Confirmation response key signal (Y), 45...Receive data, 46...Receive data receive request boost, 47...・・・
Acknowledgment signal (x). Patent applicant NEC Corporation Representative Patent attorney Takaji Ide 2 RoM 3 Ro

Claims (1)

【特許請求の範囲】[Claims] (1)同一の系に接続され、異なる人出力制御方式によ
り構成された二つの入出力制御装置の間でデータのブロ
ック転送を行う方式において、データの受信側には、転
送されるデータについて所定のブロック毎にそのデータ
が正常なデータであることを検出する手段と、この手段
の検出出力を送信側に転送する手段とを備え、 データの送信側には、上記転送する手段から転送される
正常通知をカウントする手段と、多数のフロックの送信
を完了した後にこのカウントする手段のカウント値と送
信したデータのブロック数とを照合する手段とを備えた ことを特徴とするブロック転送方式。
(1) In a system that performs block transfer of data between two input/output control devices connected to the same system and configured using different human output control methods, the data receiving side has a predetermined setting for the data to be transferred. Each block is provided with means for detecting whether the data is normal data, and means for transmitting the detection output of this means to the transmitting side, and the data transmitting side is provided with a means for detecting whether the data is normal data, and a means for transmitting the detection output of this means to the transmitting side. A block transfer method comprising: means for counting normal notifications; and means for comparing the count value of the counting means with the number of blocks of transmitted data after completing transmission of a large number of flocks.
JP58199770A 1983-10-24 1983-10-24 Block transfer system Pending JPS6090454A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58199770A JPS6090454A (en) 1983-10-24 1983-10-24 Block transfer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58199770A JPS6090454A (en) 1983-10-24 1983-10-24 Block transfer system

Publications (1)

Publication Number Publication Date
JPS6090454A true JPS6090454A (en) 1985-05-21

Family

ID=16413323

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58199770A Pending JPS6090454A (en) 1983-10-24 1983-10-24 Block transfer system

Country Status (1)

Country Link
JP (1) JPS6090454A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04232559A (en) * 1990-06-05 1992-08-20 Bull Sa Method of conversation between processors of system, system for conducting this method and use for dispatching

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04232559A (en) * 1990-06-05 1992-08-20 Bull Sa Method of conversation between processors of system, system for conducting this method and use for dispatching

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