JPS6066435A - Forming method of thin-film - Google Patents

Abstract

PURPOSE:To form a thin-film having excellent coverage even on the surface of a substrate with a narrow recessed section such as an undercut section by forming a thin-film on the substrate consisting of a semiconductor, etc. with the undercut section, a slender clearance, etc., repeating a process, in which the thin-film is etched through a directional etching method, plural times and forming the thin- film in desired thickness. CONSTITUTION:A CVD SiO2 film 91 is etched through a directional etching method shown by the arrows such as an RIE method in which an Si substrate is positioned between plate electrodes arranged in parallel. A flat section is etched easily through the etching, bu the CVD SiO2 film formed to an undercut section 6 under the end section of a gate electrode 4 is hardly etched because it is shaped by the gate electrode 4. When a CVD SiO2 film 92 is formed again and etched through the directional etching method such as the RIE method, a CVD SiO2 film 9 is formed to the undercut section 6, and the undercut section 6 can be buried. When the undercut section 6 is not buried, a process in which a CVD SiO2 film is shaped and etched through the directional etching method is further repeated.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for forming a thin film on a substrate having an uneven surface by vapor chemical deposition (CVD).

Conventional Structures and Their Problems As semiconductor devices, especially LSIs, become more densely packed, it becomes necessary to form fine patterns on the surface of the semiconductor substrate in the manufacturing process. However, when forming fine patterns on the surface of a semiconductor substrate with large surface irregularities, it is difficult to form a fine photoresist pattern using photolithography, and furthermore, it is difficult to use the photoresist pattern as a mask to select thin films of semiconductors or metals. This is particularly difficult when the semiconductor substrate has narrow gaps or constrictions.

Fig. 1 shows a partial cross-sectional view of the manufacturing process of Stg, -) MOS LSI, and 3 shows the process of manufacturing Stg, -) MOS LSI.
4 is a gate electrode, 6 is an interlayer insulating film, and AF is an electrode wiring.

A field oxide film 2, a gate oxide film 3, and a gate electrode 4 made of polycrystalline St were formed, and S x O films in the source and drain regions were processed for ion implantation at a low acceleration voltage.
After etching, impurity ions of the opposite quaternary type are implanted to form the source and drain 6 (Fig. 1a). At this time, the oxide film under the end of the gate electrode @4 is also etched in the lateral direction, forming an eave-like shape (an undercut portion 6 is formed).

Next, when the S102 film 7, which is an interlayer insulating film, is formed by the CVD method (referred to as the CVD S102 film), the gate voltage
The coverage of the CV D S 102 film 7 on the i4@ region is poor, resulting in a constriction 7o (FIG. 1b). Next Ajlt
When a thin film is formed and etched using a photoresist formed by photolithography as a mask, the thin film is etched by reactive ion etching (RIE), which is a directional etching method.
Since the E method is a directional etching, the coverage is poor at the 4th end of the gate electrode. A portion of 8A of 8 is left unetched. The Al28A remaining in this way causes a short circuit between the AQ wirings.

In this way, if an undercut portion is formed on the substrate surface, the coverage of thin films such as 5 films and 02 films formed by the conventional CVD method will deteriorate, making it difficult to form patterns following the ridges, making it difficult to form LSIs with fine patterns. This was a major cause of lower manufacturing yields.

OBJECTS OF THE INVENTION An object of the present invention is to provide a method for forming a thin film with good coverage even on the surface of a substrate having narrow recesses such as undercuts.

Structure of the Invention The manufacturing method of the present invention involves forming a thin film such as 8102 film on a semiconductor substrate having an undercut or a narrow gap on the surface, and then etching this thin film to a predetermined thickness from the surface using a directional etching method. The method is characterized in that after repeating the process of etching only a plurality of times, a thin film of a desired thickness is further formed. In other words, the present invention takes advantage of the phenomenon that directional etching, which was a drawback of conventional methods, results in insufficient etching for undercuts and narrow gaps, and effectively removes the thin film formed in undercuts and narrow gaps. is intended to be thicker than that of a wide or flat area.

DESCRIPTION OF THE EMBODIMENTS FIG. 2 is a partial process sectional view of the MO3F'ET section after the source and drain are formed in the Si (Si) MO3LSI manufacturing process.

After forming a field oxide film 2 and a gate oxide film 3 on the surface of a P-type Si substrate 10 with a specific resistance of 10 Ω·a and forming a gate electrode 4 made of polycrystalline Ni, the oxide film in the drain region is removed. 88 ions accelerated with an acceleration voltage of 40 KV are implanted to form the source and drain 6 (
Figure 2 a). An undercut portion 6 is formed below the end of the gate electrode 4 .

On the surface of this Si substrate 1, CVD Sl 021FJ 91 having a thickness of about 0.1 μm at the flat portion is formed by CVD (FIG. 2b). At this time, the film was formed under normal pressure (1 atmosphere and at a low temperature of around 460℃).
When carried out by gas reaction (low-temperature normal pressure CVD method), CVD is formed in the undercut portion 6.
The i02 film is thin, sometimes only 0.05 μm thick. On the other hand, film formation occurs at a high temperature of about 800'C.
CV is performed by reacting iH2Cfl 2 scum with N20 gas (high temperature normal pressure CVD method) or reacting a similar reaction gas in a container with a reduced pressure of several mb (low pressure CVD method).
When forming the D S 102 film, it is possible to form a film with a thickness close to that of the flat part also in the undercut part 6 .

Next, a Si substrate is placed between the flat plate electrodes arranged in parallel.
Directional top-touching method CV as shown by arrows like IE method
The D S z 02 film 91 is etched for a time that the flat portion is etched by about 0.087 m (FIG. 2C).

Although the flat portion is easily etched by this etching, most of the C V D S 102 film formed in the undercut portion 6 below the end of the gate electrode 4 is etched because it is in the shadow of the gate electrode 4. There is no.

Next, the thickness is 0.11tm (D CV D S 1o
2) When ljJ 92f is formed and etched by 0.08 μm by a directional etching method such as RIE method (Fig. 2d), the undercut portion 6 has a film thickness of 0. .1 μnt t7) CV D S
An iO2 film 9 is formed to fill the undercut portion 6. If the undercut portion 6 cannot be filled, the steps of forming a further CV D S 102 film and etching using a directional etching method are repeated.

Thereafter, when a CVD Si02 film 1o with a desired thickness, for example, 0.37zη2, is formed, the undercut portion 6 is filled, so that the CVD Si02 film 1o is formed even at the end of the gate electrode 4.
The coverage of the D S 102 film 6 is improved (FIG. 2e).

After heat treatment, the second wiring 8 is formed (second
Figure f), fine print with no etching residue! Wiring 8 can be formed.

In this embodiment, the CVD Sz 02 film is preferably formed by the above-mentioned high temperature normal pressure CVD method or low pressure CVD method, which can sufficiently form the undercut portion 6.
A similar effect can be obtained by low-temperature normal pressure CVD in which the thickness of the CV D S i02 film on the undercut portion 6 is thinner than that on the flat portion.

In addition, as a CVD method, a plasma CVD method in which a reaction gas such as S I H4 gas or N20 gas is excited by plasma to cause a reaction may be selected. A Si substrate is placed on the substrate, a reactive gas is introduced, and high-frequency power is supplied to the flat electrode.However, etching (RIE) is subsequently performed in the same equipment by changing the reactive gas to an etching gas such as 03F8 in the same equipment. You can also do it.

Up to now, we have described the case where an undercut part is formed under the end of the gate electrode, but this is not limited to this case. For example, when using a high melting point metal silicate such as molybdenum silicide on polycrystalline Si as a gate electrode (polycide). Ge by etching: - During pattern formation, the etching speed of the underlying polycrystalline St is higher, so an undercut portion is formed. Undercuts, which are often caused by etching multilayer films with different etching speeds, often pose a problem, but this problem can also be solved by the manufacturing method of the present invention.

A CVD film with good edge can be formed, and fine pattern formation thereon can be facilitated.

[Brief explanation of the drawing]

1A to 1C are partial process cross-sectional views of a conventional method for manufacturing MO8LsI, and FIGS.
FIG. 8 is a partial process cross-sectional view of a method for manufacturing an 8LSI.

Claims (1)

[Claims] A thin film is formed on a substrate with an uneven pattern formed on the surface, and after repeating the process of etching some or all of the film on the flat areas using a directional etching method several times, the desired thickness is achieved. A method for forming a thin film, characterized by forming a thin film of 300 mL.