JPS6049672A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To increase the density of an integrated circuit by making the effective density of one conduction type impurity in an active region smaller than predetermined density extending over prescribed depth from the surface of a substrate and forming an impurity small-density region through self-alignment together with a field insulating film. CONSTITUTION:A thick silicon dioxide film 3 is applied and formed on a field region in a silicon substrate 1 containing boron. An N type impurity is doped into the substrate in an active region 2 in small density. A gate insulating film 5 is shaped, and a gate electrode 6 consisting of polycrystalline silicon is formed. Arsenic ions are implanted in order to form source-drain regions 7 while using the gate electrode 6 as a mask. An inter-layer insulating film 8 is applied and shaped, an electrode opening is bored, and a metallic wiring layer 9 is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to semiconductor integrated circuit devices, and particularly to insulation isolation between circuit elements.

BACKGROUND OF THE INVENTION Field regions are provided for insulating and separating circuit elements formed in an active region of a semiconductor substrate in conventional single-channel integrated circuits, particularly insulated gate integrated circuits. In order to increase the density of integrated circuits, miniaturization of the field area is also an important issue, and various isolation methods have been studied and devised so far. For example, in order to eliminate bird's beaks caused by local oxidation of conventional field oxide films, various methods have been studied, such as forming a groove in the field region of a semiconductor substrate and filling the groove with an insulator.

However, the methods that have been studied up to now require a step of forming grooves in the semiconductor substrate, and the manufacturing process is extremely complicated, which poses problems from the viewpoint of mass production.

The object of the invention is to provide a complete field region and active region structure suitable for mass production in order to increase the density of integrated circuit devices.

The semiconductor integrated circuit device of the present invention includes a field insulating film formed in a field region on the surface of a semiconductor substrate containing conductivity type impurities at a predetermined density, and a plurality of circuit elements formed in an active region. In a semiconductor integrated circuit device having a conductive layer extending over the field insulating film to connect between The impurity density region is lower than the predetermined density, and the low impurity density region is formed in self-alignment with the field insulating film.

Next, the present invention will be explained with reference to the drawings.

The present invention will be explained using an actual example of an iN channel type MO8 integrated circuit device. Boron is 1×101 as shown in Figure 1.
A thick silicon dioxide film 3 is deposited on the field area of a silicon substrate 1 containing 60 m<-3>. Since this silicon dioxide film 3 is not formed by the conventional local oxidation method, no bird's beak occurs. In addition, the substrate of the active region 20 is doped with N-type impurities at a small density, and the original P-type impurity density is completely canceled out to obtain an effective P-type density suitable for forming a MOS transistor. The original P-type impurity density is determined in consideration of the threshold voltage of the parasitic MOS transistor, so l'i, especially P-type impurities, are not doped into the substrate in the field region, and the above-mentioned N-type impurities are not doped. It is doped in self-alignment with the field insulating film 3 so that it does not protrude from the active region, and consideration is given to prevent it from diffusing laterally as well. In this way, in the present invention, the width W of the field region is determined by the patterning accuracy of the field insulating film 3.

Next, the manufacturing process of the present invention will be explained using the drawings. A silicon substrate containing boron atoms at a density of klX1016/cm3 is thermally oxidized to form a silicon dioxide film 3 having a thickness of 0.5 μm. After that, seven etchings later, the silicon dioxide in the area that will become an active region in the future is completely removed using the etch method. The silicon dioxide 3 left here will become a field insulating film in the future.

It is desirable that the width of the field insulating film be as small as possible in order to achieve high density. Therefore, in the silicon dioxide etching process, it is possible to eliminate diside etching and improve dimensional accuracy by using an anisotropic dry etch width. Consideration will be taken.

After this, phosphorus is introduced by total ion implantation method so that the impurity density is suitable for forming future MO8) transistors in the active region. At this time, it is necessary to take measures to make the phosphorus profile uniform throughout the substrate. .

By changing the implantation energy at regular steps and implanting the same amount with each energy, a uniform profile can be obtained.In this way, the P-type impurity density unique to the substrate is 1
By compensating the implanted phosphorus doping so that cmi has a substantially uniform density of 9X1015/cm3, a P-type active region 2 with an effective impurity density of lX1015/Cm3 can be obtained. At this time, as shown in FIG. 2, if the photoresist 4 used in the photoetching step of silicon dioxide 3 is used as a mask for ion implantation until the remaining -1 is used as a mask for high energy implantation, it is most suitable as a mask for high energy implantation. For example, the maximum implantation energy of phosphorus implantation is 600Ke.
If V, the depth of the active region will be approximately 0.7 μm. If a deeper active region is required, the implantation energy may be increased as necessary. During implantation, the scattered phosphorus from the substrate silicon atoms also enters the lateral direction;
In the case of 600KeV, the crowd is practically 0.1μ
That's about it. After ion implantation, only heat treatment for activation is performed to prevent lateral diffusion of silane due to thermal diffusion.

In this manner, if the width of the field insulating film is, for example, 1 μm, the width W of the field region will be about 0.8 μm, taking into account the input of phosphorus.

The subsequent manufacturing steps are the same as the normal order.

A gate insulating film 5 is formed, and then a gate electrode 6 of polycrystalline silicon is entirely formed. Using this gate electrode 6 as a mask, arsenic ions are implanted to form a drain region 7 (Fig. 3). Furthermore, an interlayer insulating film 8'f is deposited, and after electrode openings are formed, metal wiring is performed. A layer 9 is provided. In order to prevent lateral expansion of the active region throughout this manufacturing process, the heat treatment process is performed at as low a temperature as possible and for a short time. Impurity doping for adjusting the threshold voltage of the transistor is performed before forming the gate electrode 6, if necessary.

6- In the present invention, as described above, the effective impurity density of the active region 2 of the same conductivity type as the substrate 1 is smaller than the inherent impurity density that the substrate 1 originally had.

Further, since the opposite conductivity type impurity is implanted into the active region 2 after the thick field insulating film 3 is formed, the implantation is performed at a high temperature similar to that during the formation of the field insulating film.

There is no long-time heat treatment process, so the spread of the low impurity density region 2, which is the active region, from the edge of the field insulating film 3 is reduced to 9.
is so small that it can be virtually ignored, and both are formed in self-alignment. In the present invention, there are no drawbacks such as the diffusion of channel stopper impurities into the active region and the reduction in the effective area of the active region due to bird's beak, as in the prior art, and it is extremely effective in realizing high-density integrated circuits. In addition, the manufacturing process is simple and suitable for mass production.

It should be noted that, although the explanation has been given using an N-channel type metal example, it goes without saying that it is also applicable to P-channel type and 0MO8 type integrated circuit devices.

[Brief explanation of drawings]

FIG. 1 is a sectional view for explaining the present invention in detail, and FIGS. 2 and 3 are step-by-step sectional views for explaining the manufacturing method thereof. In the figure, 1... silicon substrate, 2... active region, 3... field insulating film, 4...
...Photoresist, 5...Gate insulating film, 6
...Gate electrode, 7...Source, drain region, 8...Interlayer insulating film, 9...
Metal wiring layer, Fig. 1 Fig. 3

Claims (1)

[Claims] Iw! is a semiconductor integrated circuit having a field insulating film formed in a field region on the surface of a one-dimensional semiconductor substrate, an active region, and a conductive layer extending over the field insulating film. In the device, the effective density of one conductivity type impurity in the active region is lower than the impurity density in other parts of the semiconductor substrate over a predetermined depth from the surface of the semiconductor substrate, and the effective density of the impurity is A semiconductor integrated circuit device characterized in that a region having a small field insulating film is formed in self-alignment with the field insulating film.