JPS604054U - stereo demodulator - Google Patents
stereo demodulatorInfo
- Publication number
- JPS604054U JPS604054U JP9335583U JP9335583U JPS604054U JP S604054 U JPS604054 U JP S604054U JP 9335583 U JP9335583 U JP 9335583U JP 9335583 U JP9335583 U JP 9335583U JP S604054 U JPS604054 U JP S604054U
- Authority
- JP
- Japan
- Prior art keywords
- subcarrier
- signal
- level
- stereo demodulator
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Stereo-Broadcasting Methods (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の、ステレオ復調回路とブレンド回路とを
示すブロック図。第２図、第３図および第４図は従来の
ブレンド回路の作用の説明に供する特性図。第５図は本
考案の一実施例の構成を示すブロック図。第６図はリニ
ア掛算器の一例を示すブロック図。第７図は本考案の一
実施例の作用 ′説明に供する波形図。
１０・・・副搬送波発生回路、１１・・・レベル可変回
路、１２・・・同調回路、１３・・・リニア掛算器、１
４・・・加算器、１５・・・減算器。FIG. 1 is a block diagram showing a conventional stereo demodulation circuit and a blending circuit. FIG. 2, FIG. 3, and FIG. 4 are characteristic diagrams for explaining the operation of a conventional blending circuit. FIG. 5 is a block diagram showing the configuration of an embodiment of the present invention. FIG. 6 is a block diagram showing an example of a linear multiplier. FIG. 7 is a waveform diagram for explaining the operation of one embodiment of the present invention. 10... Subcarrier generation circuit, 11... Level variable circuit, 12... Tuning circuit, 13... Linear multiplier, 1
4...Adder, 15...Subtractor.
Claims (4)
化するリニア掛算器と、ＦＭ復調されたコンポジット信
号中のパイロット信号に同期しかつ受信信号レベルに応
じて出力レベルが変化させられた副搬送波の基本波周波
数成分を出力する副搬送波信号発生手段とを備え、前記
コンポジット信号と前記副搬送波信号発生手段の出力゛
とを前記リニア掛算器に供給してサブ信号を復調する
ようにしてなることを特徴とするステレオ復調器。(1) A linear multiplier whose output level changes linearly according to changes in the input level, and a sub-multiplier whose output level changes according to the received signal level in synchronization with the pilot signal in the FM demodulated composite signal. subcarrier signal generation means for outputting a fundamental frequency component of a carrier wave, and the composite signal and the output of the subcarrier signal generation means are supplied to the linear multiplier to demodulate the subsignal. A stereo demodulator characterized by:
イロット信号に同期した非正弦波形副搬送波を出力する
副搬送波発生回路と、受信信号レベルに応じた制御信号
が供給されて制御信号レベルに伴って前記副搬送波発生
回路の出力振幅を可変するレベル可変回路と、該レベル
可変回路の出力から副搬送波の基本周波数成分を抽出す
る抽出手段とからなることを特徴とする実用新案登録請
求の範囲第１項記載のステレオ復調器。(2) The subcarrier signal generation means includes a subcarrier generation circuit that outputs a non-sinusoidal waveform subcarrier synchronized with the pilot signal in the composite signal, and a subcarrier generation circuit that is supplied with a control signal according to the received signal level and that Utility model registration claim 1, characterized in that it comprises a level variable circuit that varies the output amplitude of the subcarrier generation circuit, and extraction means that extracts the fundamental frequency component of the subcarrier from the output of the level variable circuit. Stereo demodulator as described in section.
新案登録請求の範囲第２項記載のステレオ復調器。(3) The stereo demodulator according to claim 2, wherein the extraction means is a tuning circuit.
新案登録請求の範囲第２項記載のステレオ復調器。(4) The stereo demodulator according to claim 2, wherein the extraction means is a filter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9335583U JPS604054U (en) | 1983-06-20 | 1983-06-20 | stereo demodulator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9335583U JPS604054U (en) | 1983-06-20 | 1983-06-20 | stereo demodulator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS604054U true JPS604054U (en) | 1985-01-12 |
Family
ID=30224130
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9335583U Pending JPS604054U (en) | 1983-06-20 | 1983-06-20 | stereo demodulator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS604054U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57208743A (en) * | 1981-06-17 | 1982-12-21 | Pioneer Electronic Corp | Stereo demodulation circuit |
| JPS585053A (en) * | 1981-07-02 | 1983-01-12 | Pioneer Electronic Corp | Muting circuit |
-
1983
- 1983-06-20 JP JP9335583U patent/JPS604054U/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57208743A (en) * | 1981-06-17 | 1982-12-21 | Pioneer Electronic Corp | Stereo demodulation circuit |
| JPS585053A (en) * | 1981-07-02 | 1983-01-12 | Pioneer Electronic Corp | Muting circuit |
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