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JPS6022815A - Agc system - Google Patents

Agc system

Info

Publication number
JPS6022815A
JPS6022815A JP58131616A JP13161683A JPS6022815A JP S6022815 A JPS6022815 A JP S6022815A JP 58131616 A JP58131616 A JP 58131616A JP 13161683 A JP13161683 A JP 13161683A JP S6022815 A JPS6022815 A JP S6022815A
Authority
JP
Japan
Prior art keywords
signal
digital
circuit
input
analog
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58131616A
Other languages
Japanese (ja)
Inventor
Kazuto Takagi
高城 一人
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58131616A priority Critical patent/JPS6022815A/en
Publication of JPS6022815A publication Critical patent/JPS6022815A/en
Pending legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Optical Communication System (AREA)

Abstract

PURPOSE:To receive a burst signal without error by storing an output of an AGC circuit while digitizing it during the presence of an input and converting a stored content into an analog signal at the interruption of the input signal so as to control a gain variable amplifier. CONSTITUTION:While a digital signal is inputted, a signal interruption detecting circuit 9 controls a switch circuit 5 and applies an output of the AGC circuit to the gain variable amplifier 2 as a control signal and also digitizes the signal by an A/D converter 7 and stores it to a memory 8. When no digital signal is inputted, the signal interruption detecting circuit 9 controls the switch circuit 5 so as to apply the signal converted into analog signal from the stored content of the memory 8 by a D/A converter 6 to the gain variable amplifier 2. Thus, in transmitting the burst signal, the signal is received without error from the bit of the first input signal.

Description

【発明の詳細な説明】 (a) 発明の技術分野 本発明は利得可変増巾器及び該利得可変増巾器の出力レ
ベルを一定にするAGC回路を持つディジタ信号の光受
信系に係り入力信号がバースト状信号の場合伝送効率を
向上出来るAGC方式に関する。
Detailed Description of the Invention (a) Technical Field of the Invention The present invention relates to an optical receiving system for digital signals having a variable gain amplifier and an AGC circuit that keeps the output level of the variable gain amplifier constant. This invention relates to an AGC method that can improve transmission efficiency when the signal is a burst signal.

(b) 従来技術と問題点 第1図は従来例の光受信系の要部のブロック図、第2図
はバースト信号入力時の第1図の各部のタイムチャート
で囚は光入力信号、(B)は利得可変増巾器の出力振巾
、(C)は利得可変増巾器の利得を示す。
(b) Prior art and problems Figure 1 is a block diagram of the main parts of a conventional optical receiving system, and Figure 2 is a time chart of each part of Figure 1 when a burst signal is input. B) shows the output amplitude of the variable gain amplifier, and (C) shows the gain of the variable gain amplifier.

図中1は受光素子、2は利得可変増巾器、3はAGC回
路、4は識別器を示す。
In the figure, 1 is a light receiving element, 2 is a variable gain amplifier, 3 is an AGC circuit, and 4 is a discriminator.

第1図において、光の変調ディジタル信号は、受光素子
1にて電気信号に変換され利得可変増巾器2を通り識別
器3にてディジタル信号を識別再生して出力される。こ
の時利得可変増巾器2の出力の(i号振巾が一定になる
ようAGC回路3にて制御される。
In FIG. 1, a light modulated digital signal is converted into an electrical signal by a light receiving element 1, passes through a variable gain amplifier 2, is discriminated and reproduced by a discriminator 3, and is output. At this time, the AGC circuit 3 controls the output (i) amplitude of the variable gain amplifier 2 to be constant.

その為ディジクル信号が入力されない時は利得可変増巾
器2の利得は最大値となる0この状態で第2゜図(5)
に示すバースト状の信号が入力すると次のような問題を
生ずる。
Therefore, when no digital signal is input, the gain of the variable gain amplifier 2 is the maximum value, 0. In this state, as shown in Figure 2 (5).
When the burst signal shown in Figure 2 is input, the following problem occurs.

AGC回路3の応答速度は安定性の為ディジタル43号
の伝送速度よりかなり低い速度に設定されている。従っ
て信号が断になって再び入力した時は利得可変槽l]器
2の利得は第2図(0に示す如く最大利得から安定状態
の利得屹変化する。即ち安定状態になる迄aに示す時間
かかる。この時間aの間は利得可変増巾器2の出力は第
2図の)に示す如く大きな振巾の信号が識別器4に入力
し、重畳された雑音等により識別誤りを起こすことがあ
る。この為時間aの間は、識別誤りを起こしてもよいよ
うなアイドリンクパルスを送ってやる必要がある。
The response speed of the AGC circuit 3 is set to a speed considerably lower than the transmission speed of digital No. 43 for stability. Therefore, when the signal is cut off and input again, the gain of the variable gain tank 1 changes from the maximum gain to the stable state gain as shown in FIG. During this time a, the output of the variable gain amplifier 2 is input to the discriminator 4 as a signal with a large amplitude as shown in () in Fig. 2, which may cause a discrimination error due to superimposed noise, etc. There is. For this reason, it is necessary to send idle link pulses that may cause identification errors during the time a.

この為、従来の光受信系では入力信号がバースト状の信
号の場合伝送効率が悪くなる欠点がある。
For this reason, conventional optical receiving systems have the disadvantage that transmission efficiency deteriorates when the input signal is a burst signal.

(c3 発明の目的 本発明の目的は上記の欠点に鑑み、入力信号がバースト
状の信号の場合伝送効率を向上出来るAGC方式の提供
にある。
(c3 Purpose of the Invention In view of the above-mentioned drawbacks, the purpose of the present invention is to provide an AGC method that can improve transmission efficiency when the input signal is a burst signal.

(d) 発明の構成 本発明は上記の目的を達成するために、ディジタル信号
が入力している間はAGC回路は従来通り動作さしてお
くと共にディジタル化して記憶しておき、信号断時は、
上記記憶した内容をアナログ化し利1号lは 可変増巾器の利得を制御するようにして、過渡的l応答
を非常に少なくし、次のバースト状の信号が受信された
時最初のビットから誤りなく受信出来るようにしたこと
を特徴とする。
(d) Structure of the Invention In order to achieve the above object, the present invention allows the AGC circuit to operate as before while a digital signal is being input, and also to digitize and store it, and when the signal is interrupted,
The above memorized content is converted into an analog signal, and the gain No. 1 is controlled to control the gain of the variable amplifier, so that the transient response is minimized, and when the next burst-like signal is received, it starts from the first bit. It is characterized by being able to receive data without errors.

(e) 発明の実施例 以下本発明の一実施例につき図に従って説明する。(e) Examples of the invention An embodiment of the present invention will be described below with reference to the drawings.

第3図は本発明の実施例の光受信系の要部のブロック図
、第4図は第3図において信号が入力している間及び断
時のスイッチ回路の切替状態及び信号の流れを示す図、
第5図はバースト状信号入力時の第3図の各部のタイム
チャートで(4)は光入力信号、(B)は利得可変増巾
器の出力振巾、(0は利得可変増巾器の利得を示す。
Fig. 3 is a block diagram of the main parts of the optical receiving system according to the embodiment of the present invention, and Fig. 4 shows the switching state of the switch circuit and the signal flow while the signal is input and when the signal is cut off in Fig. 3. figure,
Figure 5 is a time chart of each part in Figure 3 when a burst signal is input, where (4) is the optical input signal, (B) is the output amplitude of the variable gain amplifier, and (0 is the output amplitude of the variable gain amplifier). Shows the gain.

図中第1図と同一機能のものは同一記号で示す05はス
イッチ回路、6はディジタル・アナログ変換器(以下D
/A変換器と称す)、7はアナログ・ディジタル変換器
(以下A/D変換器と称す)、8はメモリ、9は信号断
検出回路を示す。
Components with the same functions as those in Figure 1 are designated by the same symbols. 05 is a switch circuit, and 6 is a digital-to-analog converter (hereinafter referred to as D).
7 is an analog/digital converter (hereinafter referred to as an A/D converter), 8 is a memory, and 9 is a signal disconnection detection circuit.

ディジタル信号が入力している間は、信号断検出回路9
の制御によりスイッチ回路5を第4図(5)に示す如く
接続し、従来通りAGC回路3が動作するようにすると
共に、AGC回路3の出力をに勺変換器7によりディジ
タル信号に変換しメモリ81こその情報を書込む。この
メモリ8に書込んだ情報は次々と更新される。信号断に
なると信号断検出回路9はこれを検出し、スイッチ回路
5を制御し、第4図の)に示す如く接続を切替える。こ
のことによりAGC回路3の出力をメモリ8に書込むの
は停止され、メモリ8に最後に書込まれたAGC回路3
の出力のディジタル値をD/A変換器6によりアナログ
変換した値で利得可変増巾器2の利得を制御する0従っ
て第5図(ト)に示すバースト状の信号が入力しても利
得可変増巾器2の利得は第5図(Oに示す如く殆んど変
化せず従って利得可変増巾器2の出力の振巾も第5図(
B)に示す如く変化せず入力ディジタル信号の最初のビ
ットから識別器3は誤りなく識別が出来る。よってアイ
ドリンクパルス等は必要なく伝送効率は向上するO 尚信号断検出回路9はタイミング抽出回路があればその
出力に設ける等信号断が検出出来る所に設ければよい。
While the digital signal is input, the signal disconnection detection circuit 9
Under the control of , the switch circuit 5 is connected as shown in FIG. 4 (5) so that the AGC circuit 3 operates as before, and the output of the AGC circuit 3 is converted into a digital signal by the converter 7 and stored in the memory. 81. Write the information. The information written in this memory 8 is updated one after another. When the signal is disconnected, the signal disconnection detection circuit 9 detects this, controls the switch circuit 5, and switches the connection as shown in FIG. 4). As a result, writing of the output of the AGC circuit 3 to the memory 8 is stopped, and the AGC circuit 3 written last to the memory 8 is stopped.
The gain of the variable gain amplifier 2 is controlled by the value obtained by converting the digital value of the output into analog by the D/A converter 6. Therefore, even if the burst signal shown in FIG. The gain of the amplifier 2 hardly changes as shown in Fig. 5 (O), and therefore the amplitude of the output of the variable gain amplifier 2 also changes
As shown in B), the discriminator 3 can identify without error from the first bit of the input digital signal without any change. Therefore, there is no need for idle link pulses, etc., and the transmission efficiency is improved.The signal disconnection detection circuit 9 may be provided at a location where a signal disconnection can be detected, such as at the output of a timing extraction circuit if there is one.

(f) 発明の効果 以上詳細に説明せる如く本発明によれば、バースト状の
信号を送信する時、光受信系にて最初の入力信号のビッ
トより識別可能となるので伝送効率を向上出来る効果が
ある。
(f) Effects of the Invention As explained in detail above, according to the present invention, when a burst signal is transmitted, it can be identified from the bit of the first input signal in the optical receiving system, so the transmission efficiency can be improved. There is.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例の光受信系の要部のブロック図、第2図
はバースト状信号入力時の第1図の各部のタイムチャー
ト、第3図は本発明の実施例の光受信系の要部のブロッ
ク図、第4図は第3図において、(s号が入力している
間及び断時のスイッチ回路の切替状態及び信号の流れを
示す図、第5図はバ−スト状信号入力時の第3図の回路
の各部のタイムチャートである。 図中1は受光素子、2は利得可変増1]器、3はAGC
回路、4は識別器、5はスイッチ回路、6はディジタル
・アナログ変換器、7はアナログ・ディジタル変換器、
8はメモ1ハ 9は信号断検出回路を示す。 第1 酊 第2図 4 」「 蓼5し■ (す
Fig. 1 is a block diagram of the main parts of a conventional optical receiving system, Fig. 2 is a time chart of each part of Fig. 1 when a burst signal is input, and Fig. 3 is a block diagram of the optical receiving system of an embodiment of the present invention. Figure 4 is a block diagram of the main part, and Figure 4 is a diagram showing the switching state of the switch circuit and the signal flow while the s signal is being input and when it is off. This is a time chart of each part of the circuit in Fig. 3 at the time of input.In the figure, 1 is a light receiving element, 2 is a variable gain amplifier, and 3 is an AGC.
circuit, 4 is a discriminator, 5 is a switch circuit, 6 is a digital-to-analog converter, 7 is an analog-to-digital converter,
8 indicates a memo 1c. 9 indicates a signal disconnection detection circuit. 1st drunkenness 2nd figure 4 ” ” 5 shi■ (Su

Claims (1)

【特許請求の範囲】[Claims] 利得可変増巾器及び該利得可変増巾器の出力信号振巾を
一定にするAGC回路を持つディジタル信号の光受信系
において、信号断を検出する信号断検出回路、アナログ
・ディジタル変換器、ディジタル・アナログ変換器、メ
モリ及びスイッチ回路を設け、信号が受信されている時
は該AGC回路により該利得可変増巾器の利得を制御す
ると共に該AGC回路の出力を該アナログ・ディジタル
変換器によりディジタル信号に変換し該メモリに書込み
、信号断時には該スイッチ回路のスイッチ切換により、
該AGC回路の出力は該利得可変増巾器及び該アナログ
・ディジタル変換器には入力させず、該メモリの記憶内
容を該ディジタル・アナログ変換器によりアナログ信号
に変換した信号を、該利得可変増巾器の利得を制御する
ように加えることを特徴とするAGC方式。
In an optical receiving system for digital signals having a variable gain amplifier and an AGC circuit that makes the amplitude of the output signal of the variable gain amplifier constant, a signal loss detection circuit that detects a signal loss, an analog-to-digital converter, and a digital - An analog converter, a memory, and a switch circuit are provided, and when a signal is being received, the gain of the variable gain amplifier is controlled by the AGC circuit, and the output of the AGC circuit is converted into a digital signal by the analog-to-digital converter. Converts it into a signal and writes it to the memory, and when the signal is cut off, the switch circuit switches,
The output of the AGC circuit is not input to the variable gain amplifier and the analog/digital converter, and the signal obtained by converting the contents of the memory into an analog signal by the digital/analog converter is input to the variable gain amplifier. An AGC method characterized by adding controllable gain to the filter.
JP58131616A 1983-07-19 1983-07-19 Agc system Pending JPS6022815A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58131616A JPS6022815A (en) 1983-07-19 1983-07-19 Agc system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58131616A JPS6022815A (en) 1983-07-19 1983-07-19 Agc system

Publications (1)

Publication Number Publication Date
JPS6022815A true JPS6022815A (en) 1985-02-05

Family

ID=15062225

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58131616A Pending JPS6022815A (en) 1983-07-19 1983-07-19 Agc system

Country Status (1)

Country Link
JP (1) JPS6022815A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04196929A (en) * 1990-11-28 1992-07-16 Nec Corp Automatic gain control circuit
US6014058A (en) * 1997-09-02 2000-01-11 Nec Corporation High-speed AGC circuit
EP1126599A2 (en) * 2000-02-18 2001-08-22 Matsushita Electric Industrial Co., Ltd. Automatic gain control method and apparatus, and radio communications apparatus having automatic gain control function

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04196929A (en) * 1990-11-28 1992-07-16 Nec Corp Automatic gain control circuit
US6014058A (en) * 1997-09-02 2000-01-11 Nec Corporation High-speed AGC circuit
EP1126599A2 (en) * 2000-02-18 2001-08-22 Matsushita Electric Industrial Co., Ltd. Automatic gain control method and apparatus, and radio communications apparatus having automatic gain control function
EP1126599A3 (en) * 2000-02-18 2007-01-24 Matsushita Electric Industrial Co., Ltd. Automatic gain control method and apparatus, and radio communications apparatus having automatic gain control function

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