JPS6022573B2 - Inrush current limit circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in an inrush current limiting circuit for a DC load (capacitive load) with a large capacitance, such as a DC stabilized power supply, and more particularly relates to an improvement in an inrush current limiting circuit for a DC load (capacitive load) with a large capacity capacitor, such as a DC stabilized power supply. There is one related to a circuit that short-circuits.

For example, when supplying DC power to a DC load with a large capacity capacitor, such as in a DC stabilized power supply, conventional inrush current limiting resistors R and SCR are used, as shown in Figure 1.
An input-side inrush current limiting circuit is used that connects the two in parallel.

The SCR, which is a control element, shuts off the input voltage until it is charged with capacitive charge.

The maximum input current during this period, that is, the rush current lin, where the input voltage is Vin, becomes lin=Vin/R,
The magnitude of the rush current can be determined by the rush limiting resistor R. When the capacitive load is nearly charged, a trigger pulse IT is applied to cause the SCR to conduct. Then, most of the input current flows through the SCR and does not flow through the resistor R, so that losses can be reduced. Essentially, by using SCR and operating it in this manner, good results should always be obtained.

However, in reality, malfunctions of the SCR, such as malfunctions in which the SCR becomes conductive at a timing when it should not be conductive due to noise, are often a problem. In addition, the SCR itself does not have a current limiting function, so if the trigger timing is off, the inrush current cannot be limited at all.Furthermore, once the trigger is triggered, it will not be able to limit the inrush current at all even if the input voltage suddenly increases for some reason. Inrush current cannot be limited. It is an object of the present invention to eliminate the drawbacks of the prior art as described above, to limit inrush current in any case, and to prevent any particular inconvenience from occurring even if the timing of drive current supply is slightly different, and to It is an object of the present invention to provide an inrush current protection circuit which is sufficiently protected and causes almost no loss due to circuit insertion.

In order to achieve such an object, in the present invention, a transistor is used as a control element, and this control transistor is connected in parallel with an inrush current limiting resistor, and an overvoltage protection circuit and an overcurrent protection circuit are attached for this transistor, thereby controlling The transistor is configured to be protected.

More specifically, in the inrush current limiting circuit of the present invention, in an inrush current limiting circuit in which a current limiting resistor is connected in series with a circuit that supplies power to a DC load with a large capacity capacitor, An overcurrent protection circuit connects the emitter current of the control transistor to the collector of the control transistor, detects the emitter current of the control transistor, and limits the base current of the control transistor when the emitter current is excessive; , and an overvoltage protection circuit that detects the voltage between the emitters and limits the base current of the control transistor when this voltage is excessive, so that the control transistor always operates within a safe operating area and the control transistor The present invention is characterized in that the inrush current is automatically limited by the current limiting resistor even when the transistor is in a driven state.The present invention will be described in detail below with reference to the drawings.

FIG. 2 is a circuit diagram showing one embodiment of the present invention. A current limiting resistor R is inserted between a DC load 2 with a large capacity capacitor 1 and the DC input side, and a series circuit of a control transistor Q and its emitter resistor R4 is connected in parallel with it.
The base of transistor Q is drawn out via base resistor R2. Two transistors Q combined in parallel
2, Q have their common emitter connected to the load side, and their common collector connected to the base of the control transistor Q.Furthermore, the base of the transistor Q2 is connected to the base resistor R3,
The collector of the control transistor Q is connected through a Zener diode D, and the base of the transistor Q3 is connected to the emitter of the control transistor Q through a base resistor R5. The operation of the circuit configured in this way is as follows.

The control transistor Q, shuts off even if the input voltage is applied until the capacitive load is charged.

The maximum input current during this period, that is, the rush current lin, is lin=Vin/R as in the conventional case, where the input voltage is Vin.
, and the magnitude of the inrush current is determined by the inrush limiting resistor R. When the capacitive load is almost charged, the drive current lo is applied to make the control transistor Q conductive.

For this purpose, a DC voltage may be applied between terminals A and B. For example, if a commercial frequency transformer is available, you can rectify its output and use only DC input, or if a commercial frequency transformer is not available, you can use a DC-DC converter as the drive power source. Unlike the conventional SCR method, there is no need to pay special attention to the timing of flowing the drive current, and the time for the rectifier capacitor of the drive power supply to charge is sufficient.In this way, the control transistor Q, If a sufficiently saturated drive current is applied, most of the input current will flow to the transistor Q and not to the resistor R, so the loss will be small and the use of this circuit will have little effect on the efficiency of the device.

Now, the protection circuit for the control transistor Q operates as follows.

The overvoltage protection circuit composed of a Zener diode D, a resistor R3, and a transistor Q2 is connected to the collector of the control transistor Q. When the emitter voltage becomes abnormally high, the overvoltage protection transistor Q2 becomes conductive and draws the base current of the transistor Q, thereby preventing the transistor Q from becoming conductive. Transistor Q. If the collector voltage of transistor Q2 is Vc8 (Q,), the base voltage of transistor Q2 is VB8 (Q2), and the Zener voltage is V2, then the condition for transistor Q2 to operate is Vc8 (〇,) > VB.
8(Q2)10V2...{1-, and the control transistor Q, when the applied voltage satisfies the expression {1}
Transistor Q, is cut off to prevent excessive power losses from occurring in it.

On the other hand, the circuit composed of resistors R4 and R5 and transistor Q is an overcurrent protection circuit for transistor Q.
detects the emitter current of transistor Q, and in case of overcurrent, transistor Q becomes conductive and
, to limit the emitter current flowing through the transistor Q. The emitter current of transistor Q, is IE (〇,), and the base voltage of Q3 is VB8 (Q3
), the condition for this overcurrent protection circuit to operate is I
E(o,)×R4miVBE×Q3) In other words, the maximum current flowing through transistor Q is -V
BEku03) It can be limited to the value expressed by IE (o skin^x-R4).

Control transistor Q, therefore, always operates within the safe operating area due to these protection circuits.

Therefore, even if the timing of the current that drives transistor Q is off, the inrush current is limited, and the input voltage is turned on and off.
Even if the off interval changes, the inrush current can be reliably limited to a certain value or less. FIG. 3 is a block diagram showing an example of the case where the present invention is applied to a converter type switching power supply.

AC 100V input is connected to rectifier 1 through switch 10.
1', where it is rectified and sent via an inrush current limiting circuit 12 according to the invention to a DC load with a large capacitor 13. Here, the DC load is switching section 1
4 and a load 15. The switching section 14 has a slow start circuit and is synchronized with the circuit of the present invention. FIG. 4 shows the waveform of the current flowing through the inrush current limiting circuit. Time t. When charging is completed after input is applied to t,
During the period TR, a current flows through the resistor R, and after t2 when the control transistor Q is turned on (period TO), a current flows through the resistor R. Note that t3 is the time when the switching section 14 is turned on. Since the present invention is configured as described above,
Inrush current can be automatically limited by the current limiting resistor not only when the control transistor is not driven, but also when the control transistor is driven. Therefore, even if the timing of the drive current source is slightly off, there is no particular inconvenience; therefore, the drive circuit can be simple, the limiting element itself is sufficiently protected, and almost no loss occurs due to circuit insertion. , which has many excellent effects.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram showing the prior art, Fig. 2 is a circuit diagram showing an embodiment of the inrush current limiting circuit according to the present invention, and Fig. 3 is a circuit diagram showing an example of the inrush current limiting circuit according to the present invention, and Fig. 3 is a case where the circuit according to the present invention is applied to a converter type switching power supply. The block diagram of FIG. 4 is a waveform diagram of the fin current flowing through the inrush current limiting circuit. Q. ...Control transistor, Q2...Overvoltage protection transistor, Q3...Overcurrent protection transistor, R.
...Inrush current limiting resistance. Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] 1. In an inrush current limiting circuit in which a current limiting resistor is connected in series with a circuit that supplies power to a DC load with a large capacity capacitor, the collector and emitter of a control transistor are connected in parallel to the current limiting resistor, and An overcurrent protection circuit that detects the emitter current of the control transistor and limits the base current of the control transistor when the emitter current is excessive, and an overcurrent protection circuit that detects the voltage between the collector and emitter of the control transistor and controls the control transistor when this voltage is excessive. By adding an overvoltage protection circuit that limits the base current of the transistor, the control transistor is always operated within a safe operating area, and the current limiting resistor automatically limits the inrush current even when the control transistor is driven. An inrush current limiting circuit characterized in that: