JPS60183465U

JPS60183465U - Structure of hybrid IC

Info

Publication number: JPS60183465U
Application number: JP7083884U
Authority: JP
Inventors: 羽広　哲雄
Original assignee: 東洋通信機株式会社
Priority date: 1984-05-15
Filing date: 1984-05-15
Publication date: 1985-12-05

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図ａ及びｂは本考案の一実施例を示す正面図及び側
面図、第２図ａ及びｂは従来のハイブリッドＩＣのシー
ルド方法を示す断面図、第３図は本考案に係るハイブリ
ッドＩＣの実装例を示す断面図、第４図ａ及びｂは本考
案の他の効用を示す図である。１・・・・・・プリント基板、２・・・・・・樹脂コー
ト、３及び７，７．・・・・・・リード端子、５・・・
・・・部品面、６・・・・・・シールドパターン面、８
・・・・・・導体バタン、１１・・・・・・コンデンサ
を形成する小導体バタン。補正　昭５９．９．１９図面の簡単な説明を次のように補正する。図面の簡単な説明第１図は本考案に係かるノ飄イブリッドＩＣの一実施例
を示す構造図であって、ａはその背面図及びｂはそのＡ
−Ａ’に於ける側面断面図、第２図ａ及びｂは従来のハ
イブリッドＩＣのシールド方法を示す断面図、第３図は
本考案に係かるノ１イブリッドＩＣの実装例を示す断面
図、第４図は本考案の他の実施例を示す図であってａは
斜視構造図及びｂはその側面図である。１・・・・−・・プリント基板、２・・・・・・樹脂コ
ート、３及び７，７．・・・・・・リード端子、５・・
・・・・部品面、６・・・・・・シールドパターン面、
８・・・・・・導体バタン、１１・・・・・・コンデン
サを形成する小導体バタン。Figures 1a and b are front and side views showing an embodiment of the present invention, Figures 2a and b are sectional views showing a conventional hybrid IC shielding method, and Figure 3 is a hybrid IC according to the present invention. FIGS. 4a and 4b are cross-sectional views showing an implementation example of the present invention. 1... Printed circuit board, 2... Resin coat, 3 and 7, 7. ...Lead terminal, 5...
...Component side, 6...Shield pattern side, 8
...Conductor button, 11...Small conductor button that forms a capacitor. Amendment September 19, 1980 The brief description of the drawing is amended as follows. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a structural diagram showing an embodiment of the hybrid IC according to the present invention, in which a is a rear view of the IC and b is a rear view thereof.
- A side sectional view at A', FIGS. 2 a and b are sectional views showing a conventional hybrid IC shielding method, and FIG. 3 is a sectional view showing an example of mounting a hybrid IC according to the present invention; FIG. 4 is a diagram showing another embodiment of the present invention, in which a is a perspective structural view and b is a side view thereof. 1... Printed circuit board, 2... Resin coat, 3 and 7, 7. ...Lead terminal, 5...
...Component side, 6...Shield pattern side,
8...Conductor button, 11...Small conductor button forming a capacitor.

Claims

[Scope of utility model registration request]

In a hybrid IC, in which an electronic circuit is constructed by attaching components or arranging a conductive pattern to one or both sides of a printed circuit board such as an alumina substrate or an epoxy substrate, a conductive thin film is printed or vapor-deposited on the margin of the substrate. 1. A structure of a hybrid IC characterized in that an electronic circuit or a component located on the back side of the IC is shielded from external noise by forming the IC using the same method as above and grounding the part thereof.