JPS6018913A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS6018913A JPS6018913A JP58128144A JP12814483A JPS6018913A JP S6018913 A JPS6018913 A JP S6018913A JP 58128144 A JP58128144 A JP 58128144A JP 12814483 A JP12814483 A JP 12814483A JP S6018913 A JPS6018913 A JP S6018913A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- semiconductor layer
- compound semiconductor
- heating
- heating layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02502—Layer structure consisting of two layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/0242—Crystalline insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02463—Arsenides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02689—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using particle beams
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02691—Scanning of a beam
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Materials Engineering (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
この発明は、半導体装置の製造方法、時に絶縁体上に化
合物半導体結晶膜を形成する方法化量するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and sometimes a method for forming a compound semiconductor crystal film on an insulator.
半導体装置の高速化、高密度化のため、回路素子を誘電
体で分離して浮遊容量の少ない半導体集積回路を製造す
る試みがなされており、その一方法として絶縁体上に半
導体層を形成し、その半導体結晶中に回路素子を構成す
る方法がある。この半導体結晶層を形成する方法として
、絶縁体上に多結晶または非晶質の半導体層を堆積し、
その表面にレーザ光または電子線等のエネルギー線を照
射することによって表面層のみを加熱し、単結晶の半導
体層を形成する方法がある。In order to increase the speed and density of semiconductor devices, attempts have been made to separate circuit elements with dielectrics and manufacture semiconductor integrated circuits with less stray capacitance.One method is to form a semiconductor layer on an insulator. There is a method of configuring circuit elements in the semiconductor crystal. As a method for forming this semiconductor crystal layer, a polycrystalline or amorphous semiconductor layer is deposited on an insulator,
There is a method of heating only the surface layer by irradiating the surface with an energy beam such as a laser beam or an electron beam to form a single crystal semiconductor layer.
第１図は、従来の半導体層の形成方法による半導体装置
の製造中間時の断面図であり、（１） ｆｄ絶縁性基板
となるべき石英基板（ｓｉｏ２） 、（２）は化合物半
導体層となるＭＢＥ法により堆積された厚さ５０００人
の一８層でありＧａＡｓは多結晶の結晶性を示す。FIG. 1 is a cross-sectional view of a semiconductor device in the middle of manufacturing by a conventional semiconductor layer forming method, in which (1) a quartz substrate (SIO2) is to become an FD insulating substrate, (2) is a compound semiconductor layer. It is 18 layers with a thickness of 5000 nm deposited by the MBE method, and the GaAs exhibits polycrystalline crystallinity.
このＧａＡｅに、細く絞ったし〜ザ光を走査しながら照
射してＧａＡ３を溶融し、単結晶ないしけ大きな粒径の
ＧａＡｓにする。後は公知のプロセスに従ってこのｊａ
Ａｓ上にデバイスを作成する。The GaAe is scanned and irradiated with narrowly focused laser light to melt the GaA3 and form GaAs with a single crystal or a large grain size. After this, follow the known process
Create a device on As.
とこるが上記従来の方法では、レーザ光照射の際、Ｇａ
Ａｓが剥き出しの状態にあるため、溶融時にＡｓが、雰
囲気中に放出され再結晶化ＧａＡｓ膜の化学当量性が崩
れるという欠点があった。さらに、レーザ光は細く絞ら
れているため、ＧａＡｓの表面での温度勾配が大きくな
って、再結晶化膜に大きな歪が残るなどの欠点があった
。However, in the conventional method described above, Ga
Since As is exposed, As is released into the atmosphere during melting, and the chemical equivalence of the recrystallized GaAs film is destroyed. Furthermore, since the laser beam is narrowly focused, the temperature gradient on the surface of GaAs becomes large, resulting in a drawback that large distortions remain in the recrystallized film.
この発明は上記のような従来のものの欠点を除去するた
めになされたもので、絶縁性基板に、再結晶される非晶
質又は多結晶の化合物半導体層を設け、この化合物半導
体層上に、化合物半導体より高い融点を有する加熱層を
設け、エネルギー線を上記加熱層に照射し吸収させ、上
記加熱層の熱を伝導して上記化合物半導体層を加熱し再
結晶するという方法により、組成が均一で結晶性も均一
な半導体装置の製造方法を提供することを目的とする。This invention was made in order to eliminate the drawbacks of the conventional ones as described above. An amorphous or polycrystalline compound semiconductor layer to be recrystallized is provided on an insulating substrate, and on this compound semiconductor layer, The composition is uniform by providing a heating layer having a higher melting point than the compound semiconductor, irradiating the heating layer with energy rays and absorbing them, and conducting the heat of the heating layer to heat and recrystallize the compound semiconductor layer. An object of the present invention is to provide a method for manufacturing a semiconductor device with uniform crystallinity.
この発明の一実施例に用いる絶縁基板さしては、例えば
石英基板（Ｓｉ０２）が一般的であり、化合物半導体も
非晶質又は多結晶のものが用いられ、受熱層は例えばレ
ーザ光や電子線などのエネルギー線を吸収できれば半導
体および絶縁体などいずれでもよい。又、拡散防止層は
、受熱層の構成材料により選択され、受熱層中の不純物
が化合物半導体層へ拡散するのを防ぐものであれば良い
。The insulating substrate used in one embodiment of the present invention is generally a quartz substrate (Si02), the compound semiconductor is also amorphous or polycrystalline, and the heat receiving layer is formed by, for example, a laser beam or an electron beam. Any material such as a semiconductor or an insulator may be used as long as it can absorb the energy rays. Further, the diffusion prevention layer may be selected depending on the constituent material of the heat receiving layer, as long as it prevents impurities in the heat receiving layer from diffusing into the compound semiconductor layer.
第２図はこの発明の一実施例による半導体装置の製造中
間時の断面図であり、（１）は絶縁性基板となる石英基
板（ｓｉｏ２） 、（２）は化合物半導体層となる、Ｍ
ＢＥ法により堆積された厚さ５０００１のＧａＡｓ層、
（３）は加熱層であり、加熱層（３）は減圧ＣＶＤ法に
よシ堆積された厚さ１００１のシリコン窒化膜（８１３
Ｎ）からなる拡散防止層（４）と減圧ＣＶＤ法により堆
積された厚さ約８０００人の多結晶シリコン膜からなる
受熱層（５）を備えている。FIG. 2 is a cross-sectional view of a semiconductor device according to an embodiment of the present invention at an intermediate stage of manufacture, in which (1) is a quartz substrate (SIO2) that will be an insulating substrate, (2) is a quartz substrate (SIO2) that will be a compound semiconductor layer;
50001 thick GaAs layer deposited by BE method;
(3) is a heating layer, and the heating layer (3) is a silicon nitride film (813
A diffusion prevention layer (4) made of N) and a heat receiving layer (5) made of a polycrystalline silicon film with a thickness of about 8000 nm deposited by low pressure CVD method.
即ち、受熱層（５）は、例えばレーザ光および電子線な
どのエネルギー線を吸収する材料で構成され、吸収した
熱を化合物半導体層に均一に伝えると共に、化合物半導
体成分の飛散を防ぐために設けられている。That is, the heat receiving layer (5) is made of a material that absorbs energy beams such as laser beams and electron beams, and is provided to uniformly transmit the absorbed heat to the compound semiconductor layer and to prevent the compound semiconductor components from scattering. ing.
次に、第２図に示した製造中間時の半導体装置にレーザ
光を照射して化合物半導体層（２）を再結晶化させるわ
けであるが、レーデ光の照射を受けたＳ１膜（５） Ｉ
″ｉｉ加熱、その熱はｇ イ３１ａＨ４層（４）を経て
、ＧａＡｓ（２）に伝えられる。この熱で（）ａＡｓ
ＦＪ：、溶融し再結晶化する。このように、ＧａＡｓ上
に８ｉ３Ｎ４膜およびＳｉ膜が堆積されているので、Ｇ
ａＡｓの溶融再結晶化時に、Ａｓの雰囲気中への放出が
抑えられる。さらに、受熱層（５）の８１は熱伝導率が
大きいのでレーザビームによって加えられた熱はＳｉ中
に拡がり、ＧａＡｓを均一に加熱する。このため、溶融
時にＧａＡｓの温度勾配は小さくなり、歪などの発生が
抑えられる。この場合、Ｓｉ３Ｎ４はＧａＡｓの溶融時
にＳｉ膜中のＳ ｉ １１子がＧａＡＳ中に拡散しない
ために設けられている。又、加熱層（３）は化合物半導
体層（２）より高い融点を有しているが、融点が化合物
半導体（２）のそれよシ低いと、化合物半導体層（２）
が加熱され溶融している時加熱層（３）が剥離を起こし
、均一に加熱できなくなるのである。Next, the semiconductor device shown in FIG. 2 during the manufacturing process is irradiated with laser light to recrystallize the compound semiconductor layer (2). I
``ii Heating, the heat is transferred to GaAs (2) via the g i31aH4 layer (4). With this heat, ()aAs
FJ: melt and recrystallize. In this way, since the 8i3N4 film and Si film are deposited on GaAs,
During melt recrystallization of aAs, release of As into the atmosphere is suppressed. Furthermore, since the heat-receiving layer 81 has a high thermal conductivity, the heat applied by the laser beam spreads into the Si, uniformly heating the GaAs. Therefore, the temperature gradient of GaAs becomes small during melting, and the occurrence of distortion and the like is suppressed. In this case, Si3N4 is provided to prevent Si 11 molecules in the Si film from diffusing into GaAS when GaAs is melted. Further, although the heating layer (3) has a higher melting point than the compound semiconductor layer (2), if the melting point is lower than that of the compound semiconductor (2), the compound semiconductor layer (2)
When it is heated and melted, the heating layer (3) peels off, making it impossible to heat it uniformly.
さらに、ＧａＡｓ、Ｓｉのバンドギャップはそれぞれ１
．４．１．１ｅＶであるので、例えば波長１μｍのレー
デ光を照射した場合８１には吸収されるが、ＧａＡ ｓ
には吸収されない。したがって第３図に示すよう罠、受
熱層（５）のＳｉ層を厚さの分布を持たせた構造にして
波長１μｍのレーデ光を照射すると、８ｉの厚い部分の
ほうが薄い部分より温度が高くなる。第３図（ａ）は上
記この発明の他の実施例による半導体装置の製造中間時
の断面図、（ｂ）は平面図である。Furthermore, the bandgaps of GaAs and Si are each 1
．． 4.1.1 eV, for example, when irradiated with Raded light with a wavelength of 1 μm, it is absorbed by 81, but GaA s
is not absorbed by. Therefore, as shown in Figure 3, if the Si layer of the heat-receiving layer (5) has a structure with a thickness distribution and is irradiated with radar light with a wavelength of 1 μm, the thicker part of 8i will have a higher temperature than the thinner part. Become. FIG. 3(a) is a cross-sectional view of a semiconductor device according to another embodiment of the present invention at an intermediate stage of manufacture, and FIG. 3(b) is a plan view.
図において（１）〜（５）は第１図と同じであり、（Ａ
）はレーデ光の走査方向、（Ｂ）けレーデ光のビーム径
を示す。In the figure, (1) to (5) are the same as in Figure 1, and (A
) indicates the scanning direction of the Raded light, and (B) indicates the beam diameter of the Raded light.
第３図（ｂ）の平面図に示すように、レーザビームの径
を８１の薄い部分の幅よ９２〜３倍にして、段差に平行
にレーデ光を照射すると、ＧａＡｓけ、Ｓｌの薄い部分
から固化再結晶化するため、ビームの周辺部からのラン
ダムな核成長が抑えられ大きな結晶粒に成長する。As shown in the plan view of FIG. 3(b), when the diameter of the laser beam is set to 92 to 3 times the width of the thin part of 81 and the radar beam is irradiated parallel to the step, the thin part of GaAs and Sl Since the beam solidifies and recrystallizes, random nucleus growth from the periphery of the beam is suppressed and the crystal grains grow into large crystal grains.
なお、化合物半導体層（２）のＧＣＬＡ８の再結晶化後
は、加熱層（３）のＳｉ膜および８ｉ３Ｎ４膜の所定の
個所をエツチングにより除去して用いる。Note that after recrystallization of GCLA8 of the compound semiconductor layer (2), predetermined portions of the Si film and 8i3N4 film of the heating layer (3) are removed by etching before use.
さらに、上記実施例では、上部に加熱層（５）とじて半
導体層を設けたが、レーザ光などのエネルギー線を吸収
できれば絶縁体でもよい。Further, in the above embodiment, a semiconductor layer is provided on top of the heating layer (5), but an insulator may be used as long as it can absorb energy rays such as laser light.
以上説明したとうり、この発り」は絶縁性基板に、再結
晶される非晶質又は多結晶の化合物半導体層を設け、こ
の化合物半導体層上に、化合物半導体より高い融点を有
する加熱層を設け、エネルギー線を上記加熱層に照射し
吸収させ、上記加熱層の熱を伝導して上記化合物半導体
層を加熱し再結晶するという方法により、組成が均一で
、結晶性も均一な半導体装置の製造方法を得ることがで
きる。As explained above, the origin of this invention is to provide an amorphous or polycrystalline compound semiconductor layer to be recrystallized on an insulating substrate, and a heating layer having a higher melting point than the compound semiconductor layer on top of this compound semiconductor layer. A semiconductor device with a uniform composition and uniform crystallinity can be produced by the method of heating and recrystallizing the compound semiconductor layer by irradiating and absorbing energy rays into the heating layer and conducting the heat of the heating layer to heat and recrystallize the compound semiconductor layer. A manufacturing method can be obtained.
第１図は、従来の半導体層の形成方法による半導体装置
の製造中間時の断面図、第２図はこの発明の一実施例に
よる半導体装置の製造中間時の断面図、第３図（ａ）は
この発明の他の実施例による半導体装置の製造中間時の
断面図、第３図（ｂ）はその平面図である。
図において、（１）は絶縁性基板、（２）は化合物半導
体層、（３）は加熱層、（４）は拡散防止層、（５）は
受熱層、η）はレーザ光の走査方向、（Ｂ）ｌｌ′ｌｉ
レーザ光のビーム径である。
なお、図中同一符号は同−又は相当部分を示す。
代理人大岩 増雄
第１図
第３図
（０−）FIG. 1 is a cross-sectional view of a semiconductor device at an intermediate stage in its manufacture by a conventional semiconductor layer forming method, FIG. 2 is a cross-sectional view at an intermediate stage in the manufacture of a semiconductor device according to an embodiment of the present invention, and FIG. 3(a) 3(b) is a cross-sectional view of a semiconductor device according to another embodiment of the present invention at an intermediate stage of manufacture, and FIG. 3(b) is a plan view thereof. In the figure, (1) is an insulating substrate, (2) is a compound semiconductor layer, (3) is a heating layer, (4) is a diffusion prevention layer, (5) is a heat receiving layer, η) is a scanning direction of laser light, (B)ll'li
This is the beam diameter of the laser beam. Note that the same reference numerals in the figures indicate the same or equivalent parts. Agent Masuo Oiwa Figure 1 Figure 3 (0-)
Claims (1)
化合物半導体層を設ける工程、この化合物半導体層上に
化合物半導体よシ高い融点を有する加熱層を設ける工程
、およびエネルギー線を上記加熱層に照射し吸収させ、
上記加熱層の熱を伝導して上記化合物半導体層を加熱し
再結晶する工程を（２）加熱層は受熱層表、受熱層中の
不純物が化合製造方法。 （３）加熱層の厚さが不均一である特許請求の範囲第１
項又は第２項記載の半導体装置の製造方法。[Claims] (1) Step of providing an amorphous or polycrystalline compound semiconductor layer to be recrystallized on an insulating substrate, and providing a heating layer having a higher melting point than the compound semiconductor on the compound semiconductor layer. step, and irradiating and absorbing energy rays on the heating layer,
(2) The heating layer is a heat-receiving layer surface, and impurities in the heat-receiving layer are compounded. (3) Claim 1 in which the thickness of the heating layer is non-uniform
A method for manufacturing a semiconductor device according to item 1 or 2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58128144A JPS6018913A (en) | 1983-07-12 | 1983-07-12 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58128144A JPS6018913A (en) | 1983-07-12 | 1983-07-12 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6018913A true JPS6018913A (en) | 1985-01-31 |
Family
ID=14977474
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58128144A Pending JPS6018913A (en) | 1983-07-12 | 1983-07-12 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6018913A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0202718A2 (en) * | 1985-05-22 | 1986-11-26 | Koninklijke Philips Electronics N.V. | A method of producing a semiconductor device comprising a monocrystalline silicon layer on a substrate |
| JPS61289620A (en) * | 1985-06-18 | 1986-12-19 | Sony Corp | Heat treatment for semiconductor thin film |
| US5523240A (en) * | 1990-05-29 | 1996-06-04 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a thin film transistor with a halogen doped blocking layer |
| KR100718265B1 (en) * | 2005-05-23 | 2007-05-14 | 삼성전자주식회사 | Method for manufacturing a semiconductor device |
| JP2008085318A (en) * | 2006-08-31 | 2008-04-10 | Semiconductor Energy Lab Co Ltd | Crystalline semiconductor film, and manufacturing method of semiconductor device |
| US7629208B2 (en) | 2006-05-10 | 2009-12-08 | Sony Corporation | Method of manufacturing thin film transistor, thin film transistor, and display unit |
-
1983
- 1983-07-12 JP JP58128144A patent/JPS6018913A/en active Pending
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0202718A2 (en) * | 1985-05-22 | 1986-11-26 | Koninklijke Philips Electronics N.V. | A method of producing a semiconductor device comprising a monocrystalline silicon layer on a substrate |
| JPS61289620A (en) * | 1985-06-18 | 1986-12-19 | Sony Corp | Heat treatment for semiconductor thin film |
| US5523240A (en) * | 1990-05-29 | 1996-06-04 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a thin film transistor with a halogen doped blocking layer |
| US6607947B1 (en) | 1990-05-29 | 2003-08-19 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a semiconductor device with fluorinated layer for blocking alkali ions |
| US7355202B2 (en) | 1990-05-29 | 2008-04-08 | Semiconductor Energy Co., Ltd. | Thin-film transistor |
| KR100718265B1 (en) * | 2005-05-23 | 2007-05-14 | 삼성전자주식회사 | Method for manufacturing a semiconductor device |
| US7629208B2 (en) | 2006-05-10 | 2009-12-08 | Sony Corporation | Method of manufacturing thin film transistor, thin film transistor, and display unit |
| US8222643B2 (en) | 2006-05-10 | 2012-07-17 | Sony Corporation | Method of manufacturing thin film transistor, thin film transistor, and display unit |
| US8482008B2 (en) | 2006-05-10 | 2013-07-09 | Sony Corporation | Method of manufacturing thin film transistor, thin film transistor, and display unit |
| JP2008085318A (en) * | 2006-08-31 | 2008-04-10 | Semiconductor Energy Lab Co Ltd | Crystalline semiconductor film, and manufacturing method of semiconductor device |
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