JPS60169800U - Sample/hold circuit - Google Patents
Sample/hold circuitInfo
- Publication number
- JPS60169800U JPS60169800U JP5601784U JP5601784U JPS60169800U JP S60169800 U JPS60169800 U JP S60169800U JP 5601784 U JP5601784 U JP 5601784U JP 5601784 U JP5601784 U JP 5601784U JP S60169800 U JPS60169800 U JP S60169800U
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- terminal
- operational amplifier
- sample
- hold circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Analogue/Digital Conversion (AREA)
- Electronic Switches (AREA)
- Amplifiers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図はサンプル・ホールド回路の基本的な回路図、第
2図はチャージ・トランスファ現象を説明するための波
形図、第3図は従来のサンプル・ホールド回路の回路図
、第4図はこの考案によるサンプル・ホールド回路の回
路図である。
11.11’:入力端子、12:出力端子、13:制御
用端子、14:演算増幅器、15:第一スイッチ、16
:第二スイッチ、17:第一抵抗器、18:第二抵抗器
、19:第三抵抗器、20:第四抵抗器、21:第一コ
ンデンサ、22:第二コンテ゛ンサ、23:トリマ・コ
ンデンサ、24:反転回路、25:定電流源、26:交
流信号源。Figure 1 is a basic circuit diagram of a sample and hold circuit, Figure 2 is a waveform diagram to explain the charge transfer phenomenon, Figure 3 is a circuit diagram of a conventional sample and hold circuit, and Figure 4 is a circuit diagram of a conventional sample and hold circuit. 1 is a circuit diagram of a sample and hold circuit according to the invention; FIG. 11.11': Input terminal, 12: Output terminal, 13: Control terminal, 14: Operational amplifier, 15: First switch, 16
: Second switch, 17: First resistor, 18: Second resistor, 19: Third resistor, 20: Fourth resistor, 21: First capacitor, 22: Second capacitor, 23: Trimmer capacitor , 24: Inverting circuit, 25: Constant current source, 26: AC signal source.
Claims (1)
一抵抗器と、 C該第−抵抗器の他方の端子と第一入力端子の間に接続
された第二抵抗器、と、 D 一方の端子が接地された第三抵抗器と、E 該第三
抵抗器の他方の端子と第二人力端子の間に接続された第
四抵抗器と、 F 上記演算増幅器の出力側と一方の入力側の間に接続
された第一コンデンサと、 G 一方の端子が上記演算増幅器の他方の入力側に接続
された第二コンデンサと、 H上記第−抵抗器及び第二抵抗器の接続点と上記演算増
幅器の一方の入力側との間に接続された第一スイッチ手
段と、 ■ 上記第三抵抗器及び第四抵抗器の接続点と上記演算
増幅器の他方の入力側との間に接続された第二スイッチ
手段と、 から成ることを特徴とするサンプル・ホールド回路。[Claims for Utility Model Registration] A: an operational amplifier; B: a first resistor with one terminal connected to the output side of the operational amplifier; and C: the other terminal of the first resistor and the first input terminal. A second resistor connected between D, a third resistor whose one terminal is grounded, and E a fourth resistor connected between the other terminal of the third resistor and the second human power terminal. F a first capacitor connected between the output side and one input side of the operational amplifier; G a second capacitor one terminal of which is connected to the other input side of the operational amplifier; H the above. a first switch means connected between the connection point of the first resistor and the second resistor and one input side of the operational amplifier; A sample-and-hold circuit comprising: second switch means connected between the other input side of the operational amplifier;
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5601784U JPS60169800U (en) | 1984-04-17 | 1984-04-17 | Sample/hold circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5601784U JPS60169800U (en) | 1984-04-17 | 1984-04-17 | Sample/hold circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60169800U true JPS60169800U (en) | 1985-11-11 |
Family
ID=30579227
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5601784U Pending JPS60169800U (en) | 1984-04-17 | 1984-04-17 | Sample/hold circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60169800U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6470997A (en) * | 1987-08-12 | 1989-03-16 | Honeywell Inc | Amplifier device interchangeable between operational mode |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS558656A (en) * | 1978-07-04 | 1980-01-22 | Nec Corp | Sample hold circuit |
JPS56107398A (en) * | 1980-01-17 | 1981-08-26 | Trw Inc | Differential sampleeholding circuit |
-
1984
- 1984-04-17 JP JP5601784U patent/JPS60169800U/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS558656A (en) * | 1978-07-04 | 1980-01-22 | Nec Corp | Sample hold circuit |
JPS56107398A (en) * | 1980-01-17 | 1981-08-26 | Trw Inc | Differential sampleeholding circuit |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6470997A (en) * | 1987-08-12 | 1989-03-16 | Honeywell Inc | Amplifier device interchangeable between operational mode |
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