JPS60134292A - Liquid crystal display driver - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Technical Field] The present invention relates to a liquid crystal display driving device, and for example, to a technique effective for forming a driving signal for a signal electrode of a liquid crystal display panel having a dot matrix structure. .

[Background technology]

Conventionally, liquid crystal display devices with a dot matrix configuration have been
For example, R Electronic Materials J, October 1980 issue, page 1, 21
- Page 43, in a display device using a conventional dot matrix liquid crystal display panel, the pixel data is formed by a microprocessor or the like and R
The data is written in AM (Random Access Memory) and read out repeatedly at a certain lm11 period to drive the signal electrode. In such a display operation, R
Serial image data read from the AM is converted into parallel signals by a shift register, thereby forming drive signals for each signal line electrode.

In this case, in order to expand the display area, it has been considered to configure the same display panel into two layers, upper and lower. For example, the signal electrodes of the display panel are arranged one after the other from left to right in both the upper and lower stages.
.about.n pixel data). When such a fixed assignment of signal electrodes and pixel data is performed, the pin arrangement of the output terminals will differ between the lower LCD driver and the upper LCD driver in the LCD driver that forms the display signal. becomes the opposite. For this reason, for example, when the upper-stage liquid crystal drive device is connected to the signal electrode of the upper-stage liquid crystal panel by cross wiring, or when writing the display data, the input/output terminals 0 to 49 of the liquid crystal drive device are
It is conceivable to convert and write in advance like ~0.

However, in the former case, the wiring space for a large number of crossing wirings is increased, and the wiring pattern of the printed wiring board becomes complicated, which increases the price of the printed wiring board accordingly. The latter has the disadvantage that a special address conversion program is required when writing display data.

[Purpose of the invention]

An object of the present invention is to provide a liquid crystal display driving device that allows flexibility in mounting on a liquid crystal display panel.

The above and other objects and novel features of this invention include:
It will become clear from the description of this specification and the accompanying drawings.

[Summary of the invention]

A brief overview of typical inventions disclosed in this application is as follows.

In other words, in a liquid crystal display drive device that forms display signals to be supplied to reference electrodes in a liquid crystal display panel with a dot matrix configuration, a plurality of launch circuits are provided in parallel for serial image data, and the order in which they are taken in is determined in chronological order. By making variable, the degree of freedom in mounting matching between the signal electrode of the liquid crystal display panel and the output terminal is increased.

[Embodiment 1] FIG. 1 shows a block diagram of an embodiment of the present invention.

Each circuit block in the figure is formed on a single semiconductor substrate such as single crystal silicon by a known method for manufacturing semiconductor circuit devices.

The semiconductor integrated circuit bag WLsI (CDRV) in the figure drives the signal line electrodes of a dot-configured liquid crystal display panel composed of scanning line electrodes and signal line electrodes, and one M line w1#. ) is configured to form a drive signal.

- Note The following circuits are provided to form drive signals for the n signal line electrodes in synchronization with the selection timing of the scanning line electrodes and in accordance with the characters or figures to be displayed.

The second launch circuit FF2 converts character or graphic pixel data serially supplied from the input data terminal according to the scanning timing into a parallel signal. That is, the data input terminals of the n launch circuits are commonly connected to receive the pixel data in parallel. The clock terminal of each launch circuit is connected to a decoder DCT? which will be described later. A timing signal S L '' 3 n is supplied in a time-series manner.

The output fd of the launch circuit FF2 (182) is the same as the clock signal CL, 1, J!gL, and the first launch circuit 1.
sFl l:)': Incorporated into Rarel. Drive circuit D
v processes the pixel data input into the first launch circuit FF1 according to a timing signal (not shown),
Forms a drive signal using multi-value pulses for AC driving the liquid crystal. Voltages (1) to (4) are power supply voltages for forming the multivalued pulse.

Since the method of AC driving the liquid crystal in this manner is well known, detailed explanation thereof will be omitted.

In this embodiment, in order to selectively switch between pixel data and its output terminal by serial/parallel conversion in the second launch circuit FF2, the above-mentioned capture timing signals 81 to Sn are set as follows. It is formed.

The Cunlough circuit C0NT receives the clock signal CL2 supplied in synchronization with the pixel data and counts it. Although not particularly limited, this counter circuit COND is
It performs up/down counting operations in accordance with control signals supplied from external terminals U/D. For example, if the external terminal LJ/D is at a high level, it operates as an up counter, and if the external terminal LJ/D is at a low level, it operates as a down counter.
The count output signal of T is formed in time series by the decoder DCR, and is generated by the timing signals 31 to 31 to Sn
is converted to

Note that the clock signal CL1 supplied from the external terminal is
It is also used as a clear signal for the counter circuit, and all outputs are cleared to logic "0" during up operation, and all outputs are cleared to logic "1" during down operation.

In the liquid crystal display driving device CDRV of this embodiment, when the external terminal U/D is set to high level, the counter circuit C0
NT increases the count value every time the clock signal CL2 arrives. Therefore, the decoder DCR sequentially forms timing signals from 81 to Sn in time series, so that the pixel data supplied in synchronization with the clock signal CL2 is
The signals are taken in sequentially from the left end of the second launch circuit FF2 to the right. As a result, display signals are sent out from the display output terminals 01 to On in accordance with the order of the serially supplied pixel data.

On the other hand, when the external terminal U/D is set to low level, the counter circuit C0NT decreases the count value every time the clock signal CL2 arrives. Therefore, since the decoder DCR sequentially forms timing signals from Sn to 31 in chronological order, the pixel data supplied in synchronization with the clock signal CL2 is sequentially sent to the left from the right end of the second launch circuit FF2. It is captured. As a result, the above display output terminal O
From n to 01, display signals are sent out in accordance with the order of serially supplied pixel data. That is, the display output signal is sent out in the opposite direction to the above case, in other words, under a pin arrangement that is opposite to the order of serially supplied pixel data.

[Embodiment 2] FIG. 2 shows a block diagram of main parts of another embodiment of the present invention.

In this embodiment, the following circuit is used to selectively switch the arrangement of display output terminals between the forward direction and the reverse direction for the serially supplied pixel data string. That is, in this embodiment, the counter circuit c performs only a count amplifier operation.

Exclusive OR circuit EX1~ for each output bit of NT
A match/mismatch circuit such as EX4 is provided. A switching signal C is supplied from an external terminal C to the other input of these coincidence/mismatch circuits.

This allows, for example, matching/mismatching times 1i'/)EX
When 1 to EX4 form a coincidence output of logic "0" and a mismatch signal of logic "1", if the control signal C is set to logic "0", the output of the counter circuit C0NT is transmitted as is to the decoder DCH. , its output signals are sequentially formed in time series from timing signals S1 to Sn.

On the other hand, when the control signal C is set to logic "1", all the outputs of the counter circuit CON T are inverted, in other words, logic "0" becomes logic "1", logic "1" becomes logic "0", and logic "1" becomes logic "0". " is transmitted to the decoder DCR as follows. As a result, from the input side of the decoder D CH, a count signal in the opposite direction from all logic "1" to all logic "0" is supplied, so that the timing signal % S r+ -
51 in the reverse direction of the above case. By such a control signal C, the above [Example 1]
Similarly, the actual pin arrangement of the display output terminals can be changed.

[Embodiment 3] FIG. 3 shows a block diagram of an embodiment of a display device using the liquid crystal display driving device according to the present invention.

In the figure, the liquid crystal display panel LCD is
Two display panels ULCD! :DLCD, each of which has scanning electrodes running in the horizontal direction and signal electrodes running in the vertical direction. A display dot is formed at the intersection of the two, and a predetermined display is performed depending on the brightness and darkness of the display dot. Therefore, the input terminals of the signal electrodes of the upper display panel ULCD are arranged on the upper side, and the input terminals of the signal electrodes of the upper display panel ULCD are arranged on the upper side, and
The input terminal of the signal electrode of the CD is arranged on the lower side.

A selection drive signal is sequentially supplied to the scan electrodes of the liquid crystal display panel LCD by a scan electrode drive circuit RDRV. This scanning electrode drive time 1? @RDRV is a one-chip monolithic semiconductor integrated circuit device 1, although it is not particularly limited.
It is composed of CI and forms a multi-value pulse drive signal for AC driving the liquid crystal. For example, such a scanning electrode drive circuit RDRV can use a semiconductor integrated circuit device such as the product name 'HD44103CJ sold by Hitachi, Ltd.

In this embodiment, the signal electrodes of the liquid crystal display panel LCD are provided with liquid crystal display drive devices CDRVI and CDRV for driving the signal electrodes shown in the embodiment of FIG. 1 or FIG.
2 is used.

As in this example, liquid crystal display panels ULCD and DLC
When the arrangement of the output terminals of the signal electrodes is reversed as shown in D, the liquid crystal drive device CI) RV l and CDRV2 are as follows.
Pixel data that is serially supplied is taken in in opposite directions through the external terminals U/D or C. This allows the display output terminals to be aligned and arranged in order from the left. In addition, in the figure, the upper liquid crystal display driving device CD I? The output terminals of V2 are arranged like n-1 from the left, but by taking in pixel data in the opposite direction, they are arranged like 1.~n, which is the same as the lower liquid crystal display driving device CDRV1. It is something that can be done.

Note that a timing generation circuit (not shown) generates IAi! based on the generated reference frequency pulse. The scanning electrode drive circuit R
DRV, liquid crystal drive device CDRVI, C for the above signal electrodes
It is sent to DRV2.

[Embodiment 4] FIG. 4 shows a schematic diagram of a liquid crystal display panel for explaining another embodiment of the present invention.

In the liquid crystal display panel LCD of this embodiment, the input terminals of the signal line electrodes are alternately arranged vertically as the electrode lines are miniaturized. Therefore, the lower terminal is arranged with odd numbered signal line electrodes such as 1, 3.5, and the upper terminal is arranged with 2 signal line electrodes.
, 4.6, even numbered signal line electrodes are arranged. The liquid crystal display driving device CDRV, which forms driving signals for such a liquid crystal panel, uses the following methods to improve the consistency of its bin arrangement:
In the embodiment of FIG. 2 or FIG. 2, the decoder generates the timing signals in the following order. For example, if the number of signal lines is 80, the second launch circuit FF2
is divided into a left half (40 lines) and a right half (40 lines), and in the odd-numbered clock signal CL2, timing signals Sl, 32, etc. are formed in order from the left in the left half,
In the even-numbered clock signal CL2, the timing signals S80 . Due to the grooves formed like S79..., the output terminals 1 to 40 on the left half are
The right half output terminals 80 to 41 can be connected to the upper signal line electrodes 1, 3.5...79 without passing through the lower side of the liquid crystal panel. 4.
6...80.

The Ia order of the timing signal S 1 =S 80 may be reversed. And the above first
A game C may also be used, which is constructed by combining the pin arrangement with the flexible pin arrangement as shown in the figure or the second embodiment.

Note that the circuit that forms the timing signal as described above is
This can be easily realized by preparing a plurality of sets of decoder circuits and having their operations selectively performed by control signals from external terminals.

[Su J Ka]

(1) In one liquid crystal display drive device, by providing a parallel circuit for serially supplied pixel data and changing the chronological order of the fetch timing signals, the display output i sent from the terminal
i! ii) The elementary data can be changed. As a result, the pin arrangement of the display output terminals can be arbitrarily switched, so that it is possible to improve the consistency with respect to the electrode arrangement direction of the liquid crystal display panel.

(2) According to (1) above, the liquid I constituting the liquid crystal display device
! i! By ensuring the consistency of the bin arrangement between the I display panel and its driving device, high-density packaging can be achieved.

(3) In accordance with (1) above, the range of continuous use of the liquid crystal display device is expanded, so that the book productivity can be improved.

The invention made by Akira Kito has been specifically explained based on the examples above, but this invention is not limited to the above examples, and it is understood that various changes can be made without departing from the gist of the invention. Needless to say. If you call me, I would like to know the timing of taking in the latch circuit which is arranged in parallel with respect to the serially supplied pixel data (the circuit forming the number j is
Various embodiments can be adopted.

[Application field]

The present invention can be widely used as a liquid crystal display driving device that forms a driving signal for the No. 18 electrode of a liquid crystal display panel.

[Brief explanation of the drawing]

Fig. 1 is a professional diagram showing one embodiment of this invention, Fig. 2 is a block diagram of main parts showing another embodiment of this invention, and Fig. 3 is a liquid crystal display according to this invention. A block diagram showing one embodiment of a liquid crystal display device using a driving device, the fourth indentation is a schematic diagram for explaining still another embodiment of the present invention. DV...drive circuit, FFI, FF2...latch circuit, D
CR...Decoder, C0NT...Counter circuit, EXI
~EX4... Match/mismatch circuit, LCD, (ULCD,
DI, CD)...Product display panel, RDRV...Scanning electrode drive circuit, CDRV. CDRVl, CDRV2...Liquid crystal display drive device (signal line electrode drive device) Fig. 1 Fig. 2 Fig. 3 Fig. 4

Claims (1)

[Claims] 1. A liquid crystal display drive composed of an l-chip semiconductor integrated circuit device that outputs a display signal to be supplied to a signal electrode of a liquid crystal display panel having a dot matrix structure composed of a scanning electrode and a signal electrode. The device includes a plurality of launch circuits arranged in parallel for serially supplied display data, a counter circuit for forming a timing signal synchronized with the display data, and a counter circuit for forming a timing signal synchronized with the display data. a decoder circuit that receives an output and controls the chronological order of acquisition of the launch circuit; and a drive circuit that receives an output signal of the launch circuit and forms a liquid crystal drive signal;
A liquid crystal display driving device characterized by having a function of controlling the counter circuit or the decoder circuit according to information from an external terminal to switch the chronological order of acquisition in the launch circuit. 2. A patent claim characterized in that the counter circuit is an up/down counter circuit, and selectively performs up or down stitch count operation and setting of its initial value according to information from the external terminal. The liquid crystal display driving device according to item 1.