JPS60112306A - Electronic attanuator - Google Patents
Electronic attanuatorInfo
- Publication number
- JPS60112306A JPS60112306A JP22018783A JP22018783A JPS60112306A JP S60112306 A JPS60112306 A JP S60112306A JP 22018783 A JP22018783 A JP 22018783A JP 22018783 A JP22018783 A JP 22018783A JP S60112306 A JPS60112306 A JP S60112306A
- Authority
- JP
- Japan
- Prior art keywords
- high frequency
- diode
- type
- diodes
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/24—Frequency- independent attenuators
- H03H7/25—Frequency- independent attenuators comprising an element controlled by an electric or magnetic variable
- H03H7/253—Frequency- independent attenuators comprising an element controlled by an electric or magnetic variable the element being a diode
- H03H7/255—Frequency- independent attenuators comprising an element controlled by an electric or magnetic variable the element being a diode the element being a PIN diode
Landscapes
- Attenuators (AREA)
Abstract
Description
【発明の詳細な説明】
技術分野
この発明はPINダイオード全用いた電子式減衰器、特
にUHF及び5)JF帯帯層周波信号減衰制御に好適す
る電子減衰器に関する。TECHNICAL FIELD The present invention relates to an electronic attenuator using all PIN diodes, and particularly to an electronic attenuator suitable for UHF and 5) JF band frequency signal attenuation control.
背景技術
一般のテレビジョンチューナではそのRF増1i段でh
G、cがかけられ、入力端子への高周波信号の変動?制
御している。例えば、RFF幅素子の動作点全変えてフ
ォワード方式又はリバース方式でAGO駆動されたり、
PIN (ビン)ダイオードの禄−R8特性全利用し
て1個又はE型接続の3個のダイオードから成るAGO
回路を付設したりしていた。しかし、これらのAGO回
路では高周波信号が高くなりUl(F帯辺上になると十
分な減衰量が得られなくなる欠点があった。特に、高周
波に有利な3個のPINダイオード全用いたr型減衰回
路の場合でもその減衰量はUHF帯域のl GHzで2
5dB。BACKGROUND TECHNOLOGY In general television tuners, the RF increase is 1i stage.
G and c are applied and the high frequency signal to the input terminal fluctuates? It's in control. For example, the operating point of the RFF width element is completely changed and the AGO is driven in a forward or reverse manner.
AGO consisting of one or three diodes in E-type connection, making full use of the Roku-R8 characteristics of PIN diodes.
A circuit was also installed. However, in these AGO circuits, the high frequency signal becomes high and when it reaches the Ul (F band), sufficient attenuation cannot be obtained. Even in the case of a circuit, the amount of attenuation is 2 GHz in the UHF band.
5dB.
2 GHzで16dB程度であり、衛星放送受信システ
ムに使用するBSチューナに所要の2GHzで3゜d]
3の減衰全稈ることができなかった。加えて、E型ダイ
オードでの駆動バイアス回路が棲雑であり、満足な制御
が行ない難いなどの欠点があり、こ」1を1賓消するよ
うな簡素化された広帯域で減衰量の大きいAGO回路の
提案が望まれていた。It is about 16 dB at 2 GHz, and 3° dB at 2 GHz is required for a BS tuner used in a satellite broadcast receiving system]
3, it was not possible to complete the entire culm. In addition, the drive bias circuit using the E-type diode is complicated and it is difficult to perform satisfactory control. Circuit proposals were requested.
発明の開示
従って本発明は上記に鑑み提案されたものであり、入出
力端子間に2個以上のP工Nダイオード全使用する新規
且つ改良された電子減衰器の提供全目的とするものであ
る。DISCLOSURE OF THE INVENTION Accordingly, the present invention has been proposed in view of the above, and it is an object thereof to provide a new and improved electronic attenuator that utilizes two or more P-N diodes between input and output terminals. .
本発明によれば、高周波信号の入力端子と出力端子間に
2個以上のP工Nダイオード全高周波的に直列接続した
直列腕及び各端子側でそれぞれ高周波的に接地したP工
Nダイオードの並列腕全具備しドライブ回路からの直流
バイアス全並列腕?介して供給する電子式減衰器が開示
される。好ましくけ、入力端子と出力端子間に直列接続
した第1及び第2のP工Nダイオード、入力側の第1の
P工NダイオードとW 地IJIに挿入した第3のP工
Nダイオード、出力側の第2のP工Nダイオ曾ドと接地
間に挿入した第40PINダイオード、第1及び第3の
PINダイオードにバイアス伺与する第1のドライブ回
路、及び第2及び第40PINダイオードにバイアス付
与する第2のドライブ回路全具備して構成芒れ、各ドラ
イブ回路の生成する直流信号により入出力端子間?通過
でる高周波信号全減衰制御する馬子減衰器が提供される
。ここで4個のPINダイ7−ドは基本的にE型抵抗減
衰器と同様に機能するもので、3個の抵抗からπ型減衰
器と等価であり、それぞれの抵抗値に応じて減衰量が決
められる。特に、4個のP工Nダイオードは直流的に2
個のL字形回′#6構成としてそれぞれにドライブ回路
全役け、所定の制御信号に応じた直流バイアス全生成し
作動させる。According to the present invention, two or more P-type N diodes are connected in series between a high-frequency signal input terminal and an output terminal, and a series arm of two or more P-type N diodes is connected in series at high frequency, and a parallel P-type N diode is connected in series at high frequency on each terminal side. Direct current bias from the drive circuit with all arms, all parallel arms? An electronic attenuator is disclosed. Preferably, first and second P-type N diodes are connected in series between the input terminal and the output terminal, the first P-type N diode on the input side and the third P-type N diode inserted in the W ground IJI, and the output. A 40th PIN diode inserted between the second PIN diode on the side and the ground, a first drive circuit that applies bias to the first and third PIN diodes, and a bias applied to the second and 40th PIN diodes. The configuration includes all the second drive circuits, and the direct current signals generated by each drive circuit are used to connect input and output terminals. A Umako attenuator is provided that controls the total attenuation of high frequency signals passing through. Here, the four PIN diodes basically function in the same way as an E-type resistor attenuator, and are equivalent to a π-type attenuator using three resistors, and the amount of attenuation depends on each resistance value. can be determined. In particular, the four P-N diodes are
Each of the L-shaped circuits '#6' has a total drive circuit, and generates and operates a DC bias according to a predetermined control signal.
本発明に係る電子減衰器は、π型減衰器の構成と同様に
π型減衰器の構成にも適用されるものであり、BSチュ
ーナにおけるUl(F帯高域の1〜2゛GHzでの大き
な減衰?得るものであってこの種のAGO回路として極
めて実用性が高し)。特に、2GHz1で30dBの減
衰量全とることができた点は本発明の注目点てもある。The electronic attenuator according to the present invention can be applied to the configuration of a π-type attenuator as well as the configuration of a π-type attenuator, and is suitable for U1 (at 1 to 2 GHz in the F band high frequency range) in a BS tuner. It provides a large amount of attenuation and is extremely practical for this type of AGO circuit). Particularly, the present invention is noteworthy in that it was able to obtain the entire attenuation amount of 30 dB at 2 GHz1.
発明全実施するための最良の形態
以下本発明に係る実施例について従来回路と対比して図
面により詳述する。BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments according to the present invention will be described in detail with reference to the drawings in comparison with a conventional circuit.
第1図は従来のP工N/゛イオード使用の減衰器である
。この減衰器は入力端子(1)と出力端子(2)間に直
流阻止コンデンサ(3)を介して3個のP工Nり゛イオ
ード(4)〜(6)がπ型回路で挿入され、この夕゛イ
メ−一ドへのドライブ回路(ワ)からのノ・イアスイ」
与により減衰制御全行なっている。ドライブ回路(7)
は十B端子の電圧とA G O、%子からの信号で駆動
制御されるトランジスタ(8)を含み構成され、トラン
ジスタ(8)の出力電流でダイオード(4)〜(6)の
抵抗を変えて高周波信号のAGO信号に応した自動的な
減衰制御全行なっている。しかLlこのような回路構成
ではIGH2c高周波信号で256.B、20Hz(1
)高IAJ波信号に対して16d、Bの減衰量?得るの
みてあり、。FIG. 1 shows a conventional attenuator using P/N/diodes. In this attenuator, three P-type N-diodes (4) to (6) are inserted in a π-type circuit between the input terminal (1) and the output terminal (2) via a DC blocking capacitor (3). No input from the drive circuit (W) to this evening image.
All damping control is performed by the input. Drive circuit (7)
consists of a transistor (8) whose drive is controlled by the voltage at the B terminal and signals from the AGO and % terminals, and the resistance of the diodes (4) to (6) is changed by the output current of the transistor (8). Automatic attenuation control is performed in accordance with the AGO signal of the high frequency signal. However, in such a circuit configuration, the IGH2c high frequency signal is 256. B, 20Hz (1
) Attenuation amount of 16d,B for high IAJ wave signal? I know I'll get it.
所望される受信帯の1.40H2〜2 GHz帯におい
て、減衰量30d8全得ることは非常に田面[であった
。In the desired reception band of 1.40H2 to 2 GHz, it was extremely difficult to obtain a total attenuation of 30d8.
第2図は第1図の欠点全解消する本発明に係る電子it
2衰器であり、入力端子(11)と出力端子(12)間
に直流阻止コンデンサ(1司〜(]→P介在させて高周
波的KM列接続した第1及び第2のP工Nダイオード(
Dl)(Dl)全含む直流腕部分、入力端子側の第]の
P工Nダイオ−)”(DI)に一端全接続し他端全コン
デンサ(16)全経て高周波的に接地した第3のP工N
ダイオード(Dl)と出力端子側の第2のP工Nダイオ
ード(Dl )に一端ku糾し他端?コンデンサ(17
)全経て高周波的に接地した第4のP工Nダイオード(
D4)全含む並列腕部分、及び前記4個のP工Nダイオ
ード(Dl)〜(D4)全バイアスするAGO信号によ
る駆動手段(2り全具備して構成される。駆動手段(2
つは共通のAt]O端子Cすと駆動電源端子(22)に
接続される第コ−及び第2のドライブ回路f23) (
24)から成り、それぞれL字形に接続の2個のダイオ
ード(DI)(Dl)あるいは(Dl)(D4)にAG
O信号に応じたバイアス全付与する。各ドライブ回路(
23) (24) nそれぞれトランジスタ(Trl)
(Tr2)、抵抗及びチョークコイル全含む直流駆動回
路であり、各P工Nダイオード(Dl)〜(D4)に流
入するダイオードバイアス電流に応じて生ずるダイオー
ドの高周波抵抗(■a−Ra特性)全利用し高周波信号
の減衰量を制御する。Figure 2 shows an electronic IT system according to the present invention that eliminates all the drawbacks of Figure 1.
It is a two-attenuator, and includes first and second P-type N diodes (1 and 2) connected in a high-frequency KM series with a DC blocking capacitor (1) interposed between the input terminal (11) and the output terminal (12).
Dl) (Dl) (Dl) DC arm part including all of the input terminal side, one end is fully connected to the input terminal side P N diode)" (DI), and the other end is all connected to the third capacitor (16), which is grounded at high frequency. P engineering N
One end is connected to the diode (Dl) and the second P-N diode (Dl) on the output terminal side, and the other end? Capacitor (17
) The fourth P-type N diode (
D4) Parallel arm portion including all the above-mentioned four P-type N diodes (Dl) to (D4) Drive means (2) using an AGO signal that biases all of them. Drive means (2)
One is the common At]O terminal C and the second drive circuit f23) connected to the drive power supply terminal (22).
24) and two diodes (DI) (Dl) or (Dl) (D4) connected in an L shape, respectively, and AG
Apply the full bias according to the O signal. Each drive circuit (
23) (24) n each transistor (Trl)
(Tr2) is a DC drive circuit that includes all resistors and choke coils, and the high frequency resistance (■ a-Ra characteristics) of the diode that occurs in response to the diode bias current flowing into each P-type N diode (Dl) to (D4). It is used to control the amount of attenuation of high-frequency signals.
本発明の特徴は、第3図に示fF型抵抗減衰器における
抵抗値(R1)〜(R3)全、第4図に示す本発明の高
周波等価回路における4個のP工Nダイオード(Dl)
〜(D4)により得るものであり、抵抗値(R2)の成
分?直列接続の2個のダイオード(DI) (D2)に
置換するものとして動作説明式れる。ここで各Pエトダ
イオード(Dl)〜(D4)の高周波抵抗(Rd)id
、P工1qダイオード(DI) (D3)とPINダイ
オード(D2) (D4)全それぞれ互に直流的に遮断
し駆動する第2図のドライブ回路[”3) +24)か
らのバイアス電流で決められ、各ドライブ回路へのAG
O信号で制御ぴれる。従って、入力端子Qりに入力され
る高周波信号はAGO信号で減衰制御ばれて出力端子(
]→から導出式れる。The characteristics of the present invention are that the total resistance values (R1) to (R3) in the fF type resistance attenuator shown in FIG.
It is obtained by ~(D4), and is the component of resistance value (R2)? The operation will be explained as replacing two diodes (DI) (D2) connected in series. Here, the high frequency resistance (Rd) id of each P etdiode (Dl) to (D4)
, the P-type 1q diode (DI) (D3) and the PIN diode (D2) (D4) are determined by the bias current from the drive circuit ["3) +24) in Figure 2, which cuts off and drives each of the PIN diodes (D2) (D4). , AG to each drive circuit
It is controlled by the O signal. Therefore, the high frequency signal input to the input terminal Q is attenuated by the AGO signal and output terminal (
] → can be derived from the formula.
このときの減衰量は本発明の具体的回路では2GH2ま
で約30dBであり、第1図の従来回路に比べてブ回路
は能動素子にトランジスタ?用いたが大きなAGO電流
?得るにはFITの使用が好−ELい。The amount of attenuation at this time is about 30 dB up to 2GH2 in the specific circuit of the present invention, and compared to the conventional circuit shown in FIG. 1, the B circuit uses transistors as active elements. Did you use a large AGO current? It is preferable to use FIT to obtain EL.
haa信号はリバース方式で使用されているがこれに反
転器を付加してフォワード方式にすることもてきる。更
に別の具体例としてダイオードの接続方式により本発明
の減衰回路は、第5図乃至第7図に示f等価回路により
、π型抵抗減衰器全基本構成として形成1できる。すな
わち、第5図のπ型抵抗減衰器の3個の抵抗値(R4)
〜(R6)は第6図に示すように直がε阻止コンテンサ
(C1)全介在して直流的、vc’;r離して考えられ
るので、これ全第7図に示f4個のPINダイオード(
Dl)〜(D4)と直流阻止コンデンサ(01)とによ
り構成できることが明白である。具体的には第2図のP
X Nダイオード(Dl)〜(D4)の接続方向の変
更でよく、それによりπ型抵抗減衰器全基本構成として
動作説明されよう。The haa signal is used in a reverse format, but an inverter can be added to it to create a forward format. As yet another specific example, the attenuation circuit of the present invention using the diode connection method can be formed as the entire basic configuration of a π-type resistive attenuator using the f equivalent circuit shown in FIGS. 5 to 7. That is, the three resistance values (R4) of the π-type resistance attenuator in FIG.
~(R6) can be considered as a direct current with the ε blocking capacitor (C1) all intervening, as shown in FIG.
It is clear that it can be constructed by Dl) to (D4) and a DC blocking capacitor (01). Specifically, P in Figure 2
The connection direction of the XN diodes (Dl) to (D4) may be changed, and the operation can be explained as the overall basic configuration of a π-type resistive attenuator.
特に、本発明は入出力端子間の直列腕部分の減衰度合音
大きくするものであるから、共通のドラ1プ回路のもと
で、直列接続の2個またはそれ以上のP工Nダイオード
に直流ノくイアスに付与すればよく、種々の変形が可能
である。In particular, since the present invention is intended to increase the attenuation of the series arm portion between the input and output terminals, direct current is applied to two or more series-connected P/N diodes under a common driver circuit. It is only necessary to apply it to the base, and various modifications are possible.
第1図は従来のE型P工Nダイオード減衰器の回路図、
第2図は本発明の電子減衰器の回路図、第3図は第2図
に説明でるπ型抵抗減衰器の回路図第4図は第2図の高
周波等価回路図、第5図はイ児の具体例に説明するπ型
抵抗減衰器の回路図、第6図は第5図の変形回路図、及
び第7図は本発明の能の具体例の高周波等価回路図であ
る。
(IX)−・ 入力端子
(12)・ 出力端子
(13) (14) (IQ (]F+) (17)・
・・直流阻止コンデンサ(2→(24) ・ ドライブ
回路
(Trl)(“rr2) −、、)ランジスタ(DI)
(D2)(D3)<D4)・・ P工Nダイオード特許
出I自大 関西日本電気株式会社
第1図
AC3C
第5図 第6図
第7図Figure 1 is a circuit diagram of a conventional E-type P-N diode attenuator.
Fig. 2 is a circuit diagram of the electronic attenuator of the present invention, Fig. 3 is a circuit diagram of the π-type resistive attenuator explained in Fig. 2, Fig. 4 is a high frequency equivalent circuit diagram of Fig. 2, and Fig. 5 is an illustration of the FIG. 6 is a modified circuit diagram of FIG. 5, and FIG. 7 is a high frequency equivalent circuit diagram of a specific example of the present invention. (IX)-・ Input terminal (12)・ Output terminal (13) (14) (IQ (]F+) (17)・
・・DC blocking capacitor (2 → (24) ・Drive circuit (Trl) (“rr2) −,,) transistor (DI)
(D2) (D3)<D4)... P-type N diode Patented I Jidai Kansai NEC Co., Ltd. Figure 1 AC3C Figure 5 Figure 6 Figure 7
Claims (1)
間に高周波的に直列接続した直列腕、及び前記入力及び
出力端子のそれぞれの側でP工Nダイオード全高周波的
に接地接続した並列腕?具備し、前記並列腕のP工Nダ
イオード全介して前記直列腕のP工Nダイオードに直流
バイアス?付与し入力信号全減衰)七〇御するようにし
たこと?特徴とでる電子減衰器。 2)前記直列腕は第1(1)P工Nダイオード、直流阻
止コンデンサ及び第2のP工Nダイオード全含み、前記
並列腕は第1のドライブ回路に接続された第3のP工N
ダイオード及び第2のドライブ回路に接続された第4の
P工Nダイオードを含み、前記第1及び第2のドライブ
回路の生成する直流信号により減衰度を制御させる特許
請求の範囲第1項に記載の電子減衰器。[Claims] 1) A series arm in which two or more P-type N diodes are connected in series at high frequency between an input terminal and an output terminal, and a P-type N diode connected in series at high frequency on each side of the input and output terminals; Parallel arm connected to ground? DC bias is applied to the P-type N diode in the series arm through all the P-type N diodes in the parallel arm. Have you tried controlling the total attenuation of the input signal? Features: Electronic attenuator. 2) The series arm includes a first (1) P-type N diode, a DC blocking capacitor, and a second P-type N diode, and the parallel arm includes a third P-type N diode connected to the first drive circuit.
A fourth P-N diode connected to a diode and a second drive circuit, the attenuation degree being controlled by DC signals generated by the first and second drive circuits. electronic attenuator.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22018783A JPS60112306A (en) | 1983-11-22 | 1983-11-22 | Electronic attanuator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22018783A JPS60112306A (en) | 1983-11-22 | 1983-11-22 | Electronic attanuator |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60112306A true JPS60112306A (en) | 1985-06-18 |
JPH0510843B2 JPH0510843B2 (en) | 1993-02-10 |
Family
ID=16747241
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP22018783A Granted JPS60112306A (en) | 1983-11-22 | 1983-11-22 | Electronic attanuator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60112306A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63173981U (en) * | 1987-04-30 | 1988-11-11 | ||
EP0993112A2 (en) * | 1998-10-07 | 2000-04-12 | NOKIA TECHNOLOGY GmbH | A circuit arrangement improving the control characteristics of an attenuator |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6677267B2 (en) * | 2018-03-30 | 2020-04-08 | ダイキン工業株式会社 | Refrigeration cycle device |
Citations (5)
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US3577103A (en) * | 1969-04-01 | 1971-05-04 | Zenith Radio Corp | Variable attenuator for a wave signal receiver |
US4097827A (en) * | 1977-02-04 | 1978-06-27 | The United States Of America As Represented By The Secretary Of The Air Force | Constant impedance, constant phase pin diode with attenuator |
JPS5521654U (en) * | 1978-07-27 | 1980-02-12 | ||
JPS57157613A (en) * | 1981-03-24 | 1982-09-29 | Maspro Denkoh Corp | Attenuator |
JPS5999877A (en) * | 1982-11-29 | 1984-06-08 | Maspro Denkoh Corp | Agc system of receiving amplifier |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5129352A (en) * | 1974-09-06 | 1976-03-12 | Hitachi Metals Ltd | YAKIBAMEHOHO |
-
1983
- 1983-11-22 JP JP22018783A patent/JPS60112306A/en active Granted
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3577103A (en) * | 1969-04-01 | 1971-05-04 | Zenith Radio Corp | Variable attenuator for a wave signal receiver |
US4097827A (en) * | 1977-02-04 | 1978-06-27 | The United States Of America As Represented By The Secretary Of The Air Force | Constant impedance, constant phase pin diode with attenuator |
JPS5521654U (en) * | 1978-07-27 | 1980-02-12 | ||
JPS57157613A (en) * | 1981-03-24 | 1982-09-29 | Maspro Denkoh Corp | Attenuator |
JPS5999877A (en) * | 1982-11-29 | 1984-06-08 | Maspro Denkoh Corp | Agc system of receiving amplifier |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63173981U (en) * | 1987-04-30 | 1988-11-11 | ||
EP0993112A2 (en) * | 1998-10-07 | 2000-04-12 | NOKIA TECHNOLOGY GmbH | A circuit arrangement improving the control characteristics of an attenuator |
EP0993112A3 (en) * | 1998-10-07 | 2002-02-13 | NOKIA TECHNOLOGY GmbH | A circuit arrangement improving the control characteristics of an attenuator |
Also Published As
Publication number | Publication date |
---|---|
JPH0510843B2 (en) | 1993-02-10 |
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