JPS6010167A - Ultrasonic flaw detection signal processor - Google Patents

Abstract

PURPOSE:To enable a fast digital processing of a better ultrasonic deficiency signal with a microcomputer by an analytic processing of a distance signal based on a deficiency signal depending on the threshold level signal varying with time, a gate range signal and the like after stored temporarily into an FIFO memory. CONSTITUTION:An ultrasonic flaw detection is performed with a trigger circuit 4 responding to a clock, an ultrasonic flaw detector 2, a flaw detection element and the like and a flaw detection signal, a threshold signal almost twice or otherwise the erection signal varying with time from a threshold level generator 5, a gate signal or the like are displayed on a CRT. A deficiency signal above the threshold and constant in the S/N ratio regardless of distance passing through a comparator 6 undergoes a high speed processing with a sample holding circuit 7, an A/D converter 8 and the like and stored temporarily into an FIFO memory 9. On the other hand, a distance signal with a counter 10, a coincidence circuit 11 and the like is also stored temporarily into an FIFO memory 12. The contents of the memories 9 and 12 undergoes an analytic processing with a CPU13 thereby enabling a fast digital processing of a better ultrasonic deficiency signal in substance with a low speed microcomputer.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an ultrasonic flaw detection signal processing device, which non-destructively detects internal cracks and cavities occurring in pipes and objects, and processes them as flaw detection signals by an electronic computer.

In a conventional system in which the flaw detection signal from ultrasonic flaw detection is sent to an electronic meter and processed as information, the flaw detection signal received by the probe and amplified by the ultrasonic flaw detector is detected within a set time range (gate range). A signal that exceeds a temporally constant threshold level is peak-held or sample-held, subjected to analog-to-digital conversion (hereinafter referred to as A/D conversion), and then sent to an electronic computer. The characteristics of ultrasonic waves are that they weaken in inverse proportion to the distance from the probe, and the level received changes depending on the distance even if the defect size is the same. Similarly, forest-like echoes generated in the crystalline structure of the inspected material also change depending on the distance. Therefore, when processing a signal that is more than twice as large as a forest-like echo as a defect signal, the forest-like echo from a short distance to a long distance is processed as a defect signal. It is not possible to distinguish the same ratio (SN) from the echoed defect signal.

For this reason, the device is equipped with an additional function to temporally reduce the amount of amplification in the input amplification section of the flaw detector, so that the display on the CRT display is a forest echo or a defect signal that remains constant over changes in distance. There is also. However, the amount of decrease over time in the amplifier itself is not displayed, making it unreliable, and it is necessary to create test materials for each product to measure the amount of decrease and guarantee the flaw detection results, and to check it at each step of flaw detection. there were.

In addition, since programming control using an electronic meter requires a certain amount of time, it is not possible to process signals obtained repeatedly from flaw detectors at supersonic speeds, and peak The maximum value within a certain period of time is calculated using an electronic meter 1I using a hold circuit or digital comparison circuit.
It was information about the Ai machine. For this reason, a high-precision data processing system that receives and processes a plurality of defect signals using -pulse signals requires a large, high-speed computer that can handle the processing speed. For this reason, the processing speed of the microcomputer could not process it, and only the largest signal among the plurality of defects was processed. In such a device, if there are multiple defects and defect information is obtained at a level that would result in a failure, it is necessary for one person to confirm the defect again. When the received signal is directly A/D converted as described in the publication, the amount of data becomes enormous.

In particular, for the purpose of processing a defect signal that is one or more times the noise level, all noise echoes near the surface layer must be processed as signals. Even in the above-mentioned publication, A/D conversion is performed only between SOμeea after receiving a defect signal, and A/N conversion is performed over the entire area, which seems to be at the limit of processing capacity.

Considering the above points, the present invention displays a flaw detection signal on a CRT display using a time-varying threshold level signal that can be adjusted manually or by a signal from a computer, and also displays these ( It is possible to extract only the defect signal by comparing No. i 11 times, so that defect No. 4M, which is more than one times as large as the forest echo, can be extracted without changing the original flaw detection signal. .

In addition, when multiple defective signals are received as one pulse signal, A/D converted at ultra-high speed, and processed by n sub-machines, the digital signal is temporarily converted to correspond to the processing speed of the electronic computer. It is possible to process digital signals at high speeds even at the processing speed of a microcomputer by storing them in the FO memory.

In addition, the speed of the received signal by ultrasonic flaw detection is 200μθOQ
degree (o, syn day ea), and since the flaw detection signal is a pulse signal, the interval between each pulse signal 0 amount is //A
O~t/loo sea (/4m5ec~/θm5
ec). In addition, in order to be able to process multiple defects, it is necessary to process data every /μsec.In this respect, by using an F-process FO memory (F-process FO buffer register or temporary storage buffer memory), It is sufficient to perform data processing during the pulse signal (/Am5ec to /θ7g 5ec). Note that the FO is a response to processing speed, and a signal that is more than twice that of a forest echo can be obtained by comparing the threshold level and the flaw detection signal.

Figure 3 is an example signal diagram in this case, where a is a pulse signal, b is a defective signal, C is the time θ at which the defective signal is received,
jmBec,d 1i Processing time without FIFO memory.

Thus, the present invention generates a threshold level signal and a gate range signal that change over time in response to a trigger signal generated based on a clock signal when processing an ultrasonic flaw detection signal via an electronic computer. a threshold circuit, a comparison circuit that receives the flaw detection signal and the threshold level signal and takes only the defect signal, a sample bold circuit and an A/Di conversion circuit that digitizes the defect (g), and a comparison circuit that digitizes the defect (g); a first FO memory for temporarily storing defective signals; a counter circuit to which the start and end signals of the gate range signal are sent and the number of clocks is counted; It is equipped with a matching circuit that takes out the counter amount and takes it out as a distance signal by matching it with a defect signal, and a first FO memory that temporarily stores the distance signal, and these stored signals can be incorporated into the CPU. The present invention is characterized in that the data analysis process is performed in the program, and the results are stored in the main memory.
0 Therefore, according to the present invention, the above-mentioned special public show! ;t-3'lOA
Unlike the θ publication, the maximum lμ! When it is necessary to process between ooHH and HH, a huge amount of memory and ultra-high-speed processing are required, which is practically impossible, but by reducing the amount of data using an analog comparison circuit, the range of A/D conversion is limited. This allows processing to be carried out without having to do anything.

To explain the present invention with reference to the illustrated embodiment, FIG. 7 is a block diagram of an ultrasonic flaw detection signal processing device. In the figure, l is the probe 52, an ultrasonic flaw detector, 3 is a clock circuit, Hiro is a trigger circuit, S is a threshold circuit, O is a comparison circuit, ri is a sample hold circuit, %g is an A/D conversion circuit,
? is the first FO memory, IO is the counter circuit, l
/ is a matching circuit, and l is the first FO memory.

Among those belonging to the low-electronic computers, 13 is the CPU, /
4I is a memory or an input/output controller (not shown)
, an arithmetic controller, etc., and /3 is a pass line, which is composed of, for example, a 16-bit data bus, a 1-bit address bus, and a λ-bit control bus. Next, the operation will be explained with reference to FIG.

First of all, OPU/? gives a start signal to the clock circuit 3, thereby generating a clock signal in the clock circuit 3, and based on this, the clock signal is given to the trigger circuit to generate a trigger signal. By applying this trigger signal to the ultrasonic flaw detector, an ultrasonic wave is generated as a pulse signal from the probe towards the object to be inspected. It is included as a flaw detection signal in the reflected wave from the flaw detector l to the flaw detector and extracted. On the other hand, the threshold circuit 3 receives the trigger signal from the trigger circuit j11151I and generates a threshold level signal and a gate signal that change over time, which are sent to the flaw detector and displayed simultaneously with the flaw detection signal on the ORT display of the flaw detector. .

In addition, the flaw detection signal from the flaw detector λ and the threshold level signal (!: gate range signal, that is, the gate start signal and end signal generated by the threshold circuit l) are sent to the comparator circuit B, and only the defect signal is extracted. Since it is an analog signal, it is extracted as a digitized voltage level signal by the sample and hold circuit 7 and the A/D conversion circuit g, and is temporarily stored in the first FIFO memory tape.Also, the clock signal from the clock circuit is sent to the counter circuit io by the start signal of the gate range from the threshold circuit, and the number of clocks starts counting and is counted out by the end signal. The number of counts given to /l and ° is taken out as a distance signal, that is, a time signal from the probe l to the time when the ultrasonic wave is reflected by a crack etc. and received by the flaw detector.
Temporarily stored in IFO memory/co. Note that since this distance signal is processed by the counter circuit io, the numerical processing is already digital and an A/D converter is unnecessary. The signals stored in the seventh and first FIFO memories 12 are analyzed based on the program built into the CPU, and the results are stored in the main memory IJ-tll and read out as necessary. be able to.

In addition, Fig. 1 is a flaw detection line diagram at the conventional threshold level, and Fig. 3 is a flaw detection line diagram using the same distance amplitude correction circuit.
FIG. 9 is a flaw detection diagram according to the present invention. - For example, the trigger signal is 60-2 kHz, the sample and hold is 30 μsec, and the defect signal is sampled /μsec.
The maximum differential pressure between them is extracted by continuously quantizing 1, and the differential pressure extracted by the sample hold circuit is quantized by 1.
The data is digitized into a 2g bit value in IsoμSec using an analog-to-digital converter.

As explained above, this invention is capable of extracting a signal that is more than twice as large as the forest echo without changing the flaw detection signal, and further processes the repeatedly generated high-speed digitized signal using a microcomputer. However, it has become impossible to obtain reliable ultrasonic flaw detection signals using an inexpensive system.

[Brief explanation of the drawing]

The drawings show an embodiment of the ultrasonic flaw detection signal processing device of the present invention, and Fig. 7 is a diagram showing the construction of four blocks, Fig. 2 is a flaw detection diagram at a conventional threshold level, and Fig. 3 is a flaw detection diagram using the same distance amplitude correction circuit. The diagram, FIG. 9 is the flaw detection diagram according to the present invention, No. S
The figure is an example signal diagram for explanation. In the figure / is the probe, C is the ultrasonic flaw detector, 3 is the clock generation circuit, Da is the trigger circuit, 5 is the threshold level generation circuit, O is the comparison circuit, ri is the sample hold circuit, g
is the analog-to-digital conversion circuit, wa is the first FO memo IJ-1/θ is part of the counter, // is the matching circuit, /2
is the FIFO memory of No. 1, 13 is the CPU% lg is the memory

Claims (1)

[Claims] (1) Threshold that generates a threshold level signal and gate range signal that change over time in response to a trigger signal generated based on an η clock signal when processing an ultrasonic flaw detection signal via an electronic computer. circuit, a comparison circuit that receives the probe signal and the threshold level signal and extracts only the defect signal, a sample and hold circuit that digitizes the defect signal, and an A/
a D conversion circuit, a first FO memory for temporarily storing the defect signal to be digitized, and a counter circuit to which the start and end signals of the gate range signal and the clock signal are sent and the number of clocks is counted. , comprising a matching circuit that extracts the counter amount of the clock signal and extracts it as a distance signal based on a match with the defect signal, and a fourth F-operation FO memory that temporarily stores the distance signal,
Ultrasonic flaw detection signal processing device 0 characterized in that these stored signals are applied to a program built into the CPH, data is analyzed, and the results are stored in the main memory.