JPS6469124A - Decoder circuit - Google Patents
Decoder circuitInfo
- Publication number
- JPS6469124A JPS6469124A JP62227611A JP22761187A JPS6469124A JP S6469124 A JPS6469124 A JP S6469124A JP 62227611 A JP62227611 A JP 62227611A JP 22761187 A JP22761187 A JP 22761187A JP S6469124 A JPS6469124 A JP S6469124A
- Authority
- JP
- Japan
- Prior art keywords
- signal line
- circuit
- nch
- sense amplifier
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Static Random-Access Memory (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Dram (AREA)
Abstract
PURPOSE:To facilitate the detection of an input fault of a decoder circuit by adding a circuit applying abnormality discrimination depending on a current sensing between a test signal line and a reference signal line. CONSTITUTION:The titled circuit consists of a test signal line 490 connecting to N-channel transistors(NCH-TR) 405.415...475 turned on when outputs of inverters 400.410...470 go to '1', NCH-TR 800-807, a reference signal line 890 connected to the NCH-TRs 800-807, a known current sense amplifier (sense amplifier) 700 sensing a current flowing to the test signal line 490 and the reference signal line 890, an output signal line 900 of the sense amplifier 700, a power supply line 600 of each circuit and a ground line 650. The impedance between the circuit connected with plural TRs in parallel and the reference circuit is compared to output a comparison signal. Thus, a fault of the decoder output is detected easily.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62227611A JPH0691469B2 (en) | 1987-09-10 | 1987-09-10 | Decoder circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62227611A JPH0691469B2 (en) | 1987-09-10 | 1987-09-10 | Decoder circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6469124A true JPS6469124A (en) | 1989-03-15 |
JPH0691469B2 JPH0691469B2 (en) | 1994-11-14 |
Family
ID=16863649
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62227611A Expired - Fee Related JPH0691469B2 (en) | 1987-09-10 | 1987-09-10 | Decoder circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0691469B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2554378B2 (en) * | 1988-01-27 | 1996-11-13 | 沖電気工業株式会社 | Microcomputer and test method thereof |
JP2015118728A (en) * | 2013-12-18 | 2015-06-25 | インフィネオン テクノロジーズ アクチエンゲゼルシャフトInfineon Technologies AG | Word line address scan |
-
1987
- 1987-09-10 JP JP62227611A patent/JPH0691469B2/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2554378B2 (en) * | 1988-01-27 | 1996-11-13 | 沖電気工業株式会社 | Microcomputer and test method thereof |
JP2015118728A (en) * | 2013-12-18 | 2015-06-25 | インフィネオン テクノロジーズ アクチエンゲゼルシャフトInfineon Technologies AG | Word line address scan |
Also Published As
Publication number | Publication date |
---|---|
JPH0691469B2 (en) | 1994-11-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |