[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

JPS6465654A - Channel control system - Google Patents

Channel control system

Info

Publication number
JPS6465654A
JPS6465654A JP22187187A JP22187187A JPS6465654A JP S6465654 A JPS6465654 A JP S6465654A JP 22187187 A JP22187187 A JP 22187187A JP 22187187 A JP22187187 A JP 22187187A JP S6465654 A JPS6465654 A JP S6465654A
Authority
JP
Japan
Prior art keywords
transfer mode
data width
equipment
requested
overrun
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22187187A
Other languages
Japanese (ja)
Inventor
Yuji Hidaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP22187187A priority Critical patent/JPS6465654A/en
Publication of JPS6465654A publication Critical patent/JPS6465654A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • G06F13/12Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To attain the set up of plural modes included in a bus from the external and to prevent the generation of overrun, by providing the title system with a transfer mode storing means, a channel device specifying means, a comparing means, a transfer mode selecting means, and so on. CONSTITUTION:When a request signal is inputted from one of channel devices 8 to the channel device specifying means 2, the means 2 specifies a sender equipment 8 stored in a transfer mode data storing means 1 and reads out maximum data width to be transferred by the equipment 8. Then, the comparing means 3 decodes the data width of the requested transfer mode in the request signal and compares the decoded result with the data width obtained from the means 1. When the data width of the requested transfer mode is less than the maximum data width as the result of the comparison of the means, the transfer mode selecting means 4 selects the data width of the requested transfer mode, and in the other case, selects the maximum data width. Thus, data access can be controlled from the equipment 8 through a memory access control part 5, so that a transfer mode can be set up from the external and the generation of overrun can be prevented.
JP22187187A 1987-09-07 1987-09-07 Channel control system Pending JPS6465654A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22187187A JPS6465654A (en) 1987-09-07 1987-09-07 Channel control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22187187A JPS6465654A (en) 1987-09-07 1987-09-07 Channel control system

Publications (1)

Publication Number Publication Date
JPS6465654A true JPS6465654A (en) 1989-03-10

Family

ID=16773486

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22187187A Pending JPS6465654A (en) 1987-09-07 1987-09-07 Channel control system

Country Status (1)

Country Link
JP (1) JPS6465654A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11500599A (en) * 1993-12-17 1999-01-12 ヴィスタ インターナショナル,インコーポレイテッド Charging device for galvanic dry cells using asymmetric current
US5872999A (en) * 1994-10-12 1999-02-16 Sega Enterprises, Ltd. System for peripheral identification obtained by calculation and manipulation data collecting for determining communication mode and collecting data from first terminal contacts

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11500599A (en) * 1993-12-17 1999-01-12 ヴィスタ インターナショナル,インコーポレイテッド Charging device for galvanic dry cells using asymmetric current
US5872999A (en) * 1994-10-12 1999-02-16 Sega Enterprises, Ltd. System for peripheral identification obtained by calculation and manipulation data collecting for determining communication mode and collecting data from first terminal contacts

Similar Documents

Publication Publication Date Title
Akarli THE PROBLEMS OF EXTERNAL PRESSURES, POWER STRUGGLES, AND BUDGETARY DEFICITS IN OTTOMAN POLITICS UNDER ABDULHAMID II (1876-1909): ORIGINS AND SOLUTIONS.
DE3176548D1 (en) Data-processing system with main and buffer storage control
DE69803871D1 (en) REMOTE CONTROL SYSTEM WITH MINIMIZATION OF SCREEN UPDATE BY SELECTING THE COMPRESSION ALGORITHM
JPS6465654A (en) Channel control system
JPS6437640A (en) Control system for cache memory
JPS564857A (en) Access system for memory unit
EP0228745A3 (en) Raster scan video controller provided with an update cache, update cache for use in such video controller, and crt display station comprising such controller
JPS54129845A (en) Buffer unit for bidirectional data line
JPS6481469A (en) Facsimile equipment
JPS6473966A (en) Facsimile equipment
JPS5621260A (en) Access unit
JPS5348433A (en) Precedence control system
JPS54143033A (en) Buffer unit
JPS54143005A (en) Data transfer system
JPS6422140A (en) Method for shifting control right in gp-ib connecting system
JPS5765983A (en) Catv system
JPS56129473A (en) Facsimile device with memory device
JPS56166529A (en) Control system for input and output device
IE840161L (en) GLUCOAMYLASE cDNA
JPS6486651A (en) Program load system for electronic exchange terminal equipment
JPS5735433A (en) Connector
JPS5347240A (en) Control system for intermediate buffer
JPS57160272A (en) Storage device of compressed data
JPS54161855A (en) Input/output control system
JPS57164324A (en) Input and output interruption controlling system