JPS6457648U

JPS6457648U -

Info

Publication number: JPS6457648U
Application number: JP15172787U
Authority: JP
Priority date: 1987-10-05
Filing date: 1987-10-05
Publication date: 1989-04-10

Description

[Brief explanation of drawings]

第１図ａ，ｂは本考案の実施例ＩＣチツプパツ
ケージ半製品の表面及び裏面の要部拡大図、第２
図ａ，ｂ，ｃは第１図とは異る実施例半製品の表
面、裏面及び側面を示す要部拡大図、第３図は第
２図ｃで示す半製品切断面の要部拡大図、第４図
ａ，ｂは第１図及び第２図に示す切断面を形成す
る装置の一部工程を示す要部断面図、第５図は第
３図に相当する厚さの異る銅線により振動熱成形
された切断面の要部拡大図を示す。１……本体、２……半導体素子（ＩＣチツプ）
、２′……ＩＣチツプの嵌入凹部、３……スルー
ホール、４……銅線、１０……切断面。 1a and 1b are enlarged views of main parts of the front and back surfaces of a semi-finished IC chip package according to an embodiment of the present invention;
Figures a, b, and c are enlarged views of the main parts showing the front, back, and side surfaces of the semi-finished product of the example different from those shown in Fig. 1, and Fig. 3 is an enlarged view of the main parts of the cut section of the semi-finished product shown in Fig. 2 c. , FIGS. 4a and 4b are cross-sectional views of main parts showing some steps of the apparatus for forming the cut surfaces shown in FIGS. 1 and 2, and FIG. An enlarged view of the main part of the cut surface subjected to vibration thermoforming is shown by lines. 1...Main body, 2...Semiconductor element (IC chip)
, 2'... IC chip insertion recess, 3... Through hole, 4... Copper wire, 10... Cut surface.

Claims

[Scope of utility model registration request]

It is made of plastic or a composite material having a plastic matrix and has an IC chip on the top surface, a large number of through holes for pin mounting surrounding the outer periphery and penetrating from the top surface to the back surface, and the IC chip and each of the through holes formed on the top surface. and an IC chip package semi-finished product having electric wires extending further outward from each through hole, and electric wires extending from each through hole penetrated through the lower surface to the outer outer circumference, from the through hole to the outer outer circumference. The thickness of the electric wires on the upper and lower surfaces extending to approximately 18 μm
and the IC chip package semi-finished product is formed using upper and lower dies having holes that complement the cut surface of the outer periphery, and upper and lower punches that are fitted into the complementary holes and have outer periphery pressing surfaces. A synchronous vibration is applied vertically to the upper and lower dies or the upper and lower punches with an amplitude that is such that the portion that is clamped and becomes the cutting surface is plastically deformed, and when the portion that becomes the cutting surface is locally thermally softened, the upper and lower punch or the upper and lower dies are removed. An IC chip package semi-finished product characterized by having a cut surface cut by punching and feeding.