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JPS6454428U - - Google Patents

Info

Publication number
JPS6454428U
JPS6454428U JP14890787U JP14890787U JPS6454428U JP S6454428 U JPS6454428 U JP S6454428U JP 14890787 U JP14890787 U JP 14890787U JP 14890787 U JP14890787 U JP 14890787U JP S6454428 U JPS6454428 U JP S6454428U
Authority
JP
Japan
Prior art keywords
circuit
parallel
analog
converts
combination
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14890787U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14890787U priority Critical patent/JPS6454428U/ja
Publication of JPS6454428U publication Critical patent/JPS6454428U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Analogue/Digital Conversion (AREA)

Description

【図面の簡単な説明】
第１図はこの考案に係るＡ／Ｄ変換器の一実施
例を示すブロツク回路図、第２図は同実施例の動
作を説明するためのタイミング図である。 １１……Ｓ／Ｈ回路、１２……Ａ／Ｄ変換回路
、１３……タイミング発生回路、１４……データ
変換回路、Ｐ１〜ＰＮ……タイミングパルス。

Claims (1)

    【実用新案登録請求の範囲】
  1. アナログ信号をサンプルホールドするサンプル
    ホールド回路及びこのサンプルホールド回路のホ
    ールド電圧をデジタルデータに変換するアナログ
    ／デジタル変換回路の組合わせを複数個並列に接
    続してなる並列回路と、この並列回路の各組合わ
    せを巡回的に位相をずらして動作させるタイミン
    グ発生回路と、前記各組合わせの出力データを時
    系列に変換するデータ変換回路とを具備するアナ
    ログ／デジタル変換器。
JP14890787U 1987-09-29 1987-09-29 Pending JPS6454428U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14890787U JPS6454428U (ja) 1987-09-29 1987-09-29

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14890787U JPS6454428U (ja) 1987-09-29 1987-09-29

Publications (1)

Publication Number Publication Date
JPS6454428U true JPS6454428U (ja) 1989-04-04

Family

ID=31420649

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14890787U Pending JPS6454428U (ja) 1987-09-29 1987-09-29

Country Status (1)

Country Link
JP (1) JPS6454428U (ja)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5810921A (ja) * 1981-07-14 1983-01-21 Hitachi Ltd アナログデイジタル変換方式

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5810921A (ja) * 1981-07-14 1983-01-21 Hitachi Ltd アナログデイジタル変換方式

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