JPS6447058A - Package for semiconductor device - Google Patents
Package for semiconductor deviceInfo
- Publication number
- JPS6447058A JPS6447058A JP62204799A JP20479987A JPS6447058A JP S6447058 A JPS6447058 A JP S6447058A JP 62204799 A JP62204799 A JP 62204799A JP 20479987 A JP20479987 A JP 20479987A JP S6447058 A JPS6447058 A JP S6447058A
- Authority
- JP
- Japan
- Prior art keywords
- resin substrate
- section
- tips
- piece
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
PURPOSE:To increase a device of this design in number of pins and also improve it in moisture resistant and heat dissipating properties by a method wherein leads are formed in one piece with a resin substrate through an insert molding in such a manner that tips of them are positioned at the peripheral section of a resin substrate surface and a part of the surface of their chips is at least partially exposed from the resin substrate surface, and an internal circuit pattern section is formed on the surface of the resin substrate which surrounds a semiconductor element mounting section. CONSTITUTION:A resin substrate 30 and a lead frame 32 are formed into one piece by making lead 38 tips of the lead frame 32 be inserted into a mold. In this process, at least a part of the lead 38 tips is so set as to be exposed from the resin substrate 30 to be connected with an internal circuit pattern section 48. A flange section 46 extending outward is provided to a base of a heat sink 44 which is formed through an insert molding so as to bury its base in the resin substrate 30 in one piece, where the flange section 46 prevents moisture from infiltrating through the interface between the heat sink 44 and the resin substrate 30. The internal circuit pattern section 48 is formed in such a manner that a copper foil is adhered onto a heat resistant resin sheet and incorporated in with the lead frame 32, performing a position alignment and a tine pattern is transferred on the surface of the resin substrate 30 which is formed by injecting resin into the mold.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62204799A JPS6447058A (en) | 1987-08-18 | 1987-08-18 | Package for semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62204799A JPS6447058A (en) | 1987-08-18 | 1987-08-18 | Package for semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6447058A true JPS6447058A (en) | 1989-02-21 |
Family
ID=16496552
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62204799A Pending JPS6447058A (en) | 1987-08-18 | 1987-08-18 | Package for semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6447058A (en) |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02251166A (en) * | 1989-03-24 | 1990-10-08 | Matsushita Electric Works Ltd | Semiconductor package for surface mounting |
JPH0389539A (en) * | 1989-08-31 | 1991-04-15 | Mitsui High Tec Inc | Lead frame and semiconductor device using thereof and manufacture of semiconductor device |
US5328870A (en) * | 1992-01-17 | 1994-07-12 | Amkor Electronics, Inc. | Method for forming plastic molded package with heat sink for integrated circuit devices |
US6271583B1 (en) * | 1992-06-02 | 2001-08-07 | Fujitsu Limited | Semiconductor device having resin encapsulated package structure |
US6858930B2 (en) * | 2002-10-07 | 2005-02-22 | Lsi Logic Corporation | Multi chip module |
US7105919B2 (en) * | 2003-11-11 | 2006-09-12 | Samsung Electronics Co., Ltd. | Semiconductor package having ultra-thin thickness and method of manufacturing the same |
JP2009296708A (en) * | 2008-06-02 | 2009-12-17 | Honda Motor Co Ltd | Power conversion apparatus |
CN102543913A (en) * | 2010-10-29 | 2012-07-04 | 新光电气工业株式会社 | Wiring substrate, electronic device, and method of manufacturing wiring substrate |
JP2015214137A (en) * | 2014-04-22 | 2015-12-03 | 株式会社日昌製作所 | Metal insert component, method for producing resin molded part using the metal insert component, monitoring method for high frequency induction heating, and heating temperature grasp method |
-
1987
- 1987-08-18 JP JP62204799A patent/JPS6447058A/en active Pending
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02251166A (en) * | 1989-03-24 | 1990-10-08 | Matsushita Electric Works Ltd | Semiconductor package for surface mounting |
JPH0389539A (en) * | 1989-08-31 | 1991-04-15 | Mitsui High Tec Inc | Lead frame and semiconductor device using thereof and manufacture of semiconductor device |
US5328870A (en) * | 1992-01-17 | 1994-07-12 | Amkor Electronics, Inc. | Method for forming plastic molded package with heat sink for integrated circuit devices |
US6271583B1 (en) * | 1992-06-02 | 2001-08-07 | Fujitsu Limited | Semiconductor device having resin encapsulated package structure |
US6858930B2 (en) * | 2002-10-07 | 2005-02-22 | Lsi Logic Corporation | Multi chip module |
US7105919B2 (en) * | 2003-11-11 | 2006-09-12 | Samsung Electronics Co., Ltd. | Semiconductor package having ultra-thin thickness and method of manufacturing the same |
JP2009296708A (en) * | 2008-06-02 | 2009-12-17 | Honda Motor Co Ltd | Power conversion apparatus |
CN102543913A (en) * | 2010-10-29 | 2012-07-04 | 新光电气工业株式会社 | Wiring substrate, electronic device, and method of manufacturing wiring substrate |
US8436249B2 (en) | 2010-10-29 | 2013-05-07 | Shinko Electric Industries Co., Ltd. | Wiring substrate, electronic device, and method of manufacturing wiring substrate |
JP2015214137A (en) * | 2014-04-22 | 2015-12-03 | 株式会社日昌製作所 | Metal insert component, method for producing resin molded part using the metal insert component, monitoring method for high frequency induction heating, and heating temperature grasp method |
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