JPS6433672A - Cumulative multiplier - Google Patents
Cumulative multiplierInfo
- Publication number
- JPS6433672A JPS6433672A JP19357687A JP19357687A JPS6433672A JP S6433672 A JPS6433672 A JP S6433672A JP 19357687 A JP19357687 A JP 19357687A JP 19357687 A JP19357687 A JP 19357687A JP S6433672 A JPS6433672 A JP S6433672A
- Authority
- JP
- Japan
- Prior art keywords
- register
- value
- data
- cumulative
- result
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Complex Calculations (AREA)
Abstract
PURPOSE:To eliminate a loss time with which the result of cumulative arithmetic is saved into an external register, by using individual registers. CONSTITUTION:Individual registers A and B are used for each channel. When cumulative arithmetic is carried out for X1Y1+X2Y2... serving as data on a single channel, the register A, for example, is selected by a selection means 4. Then the value X1Y1 multiplied by a multiplication part 1 is added to the value A0 (initial value) of the register A via an adder part 2. This addition result X1Y1+A0 is set as the register value of the register A. Then the value X2Y2 multiplied by the part 1 is subjected to addition in the same way and the cumulative result X2Y2+X1Y1+A0 is set at the register A. Thus the data on plural channels are processed individually so that the excessive time is eliminated for saving those data into the external register and for resetting said saved data.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19357687A JPS6433672A (en) | 1987-07-29 | 1987-07-29 | Cumulative multiplier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19357687A JPS6433672A (en) | 1987-07-29 | 1987-07-29 | Cumulative multiplier |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6433672A true JPS6433672A (en) | 1989-02-03 |
Family
ID=16310301
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19357687A Pending JPS6433672A (en) | 1987-07-29 | 1987-07-29 | Cumulative multiplier |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6433672A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03138759A (en) * | 1989-10-23 | 1991-06-13 | Internatl Business Mach Corp <Ibm> | Signal processor |
JPH04365170A (en) * | 1991-06-12 | 1992-12-17 | Mitsubishi Electric Corp | Digital signal processing semiconductor integrated circuit |
-
1987
- 1987-07-29 JP JP19357687A patent/JPS6433672A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03138759A (en) * | 1989-10-23 | 1991-06-13 | Internatl Business Mach Corp <Ibm> | Signal processor |
JPH04365170A (en) * | 1991-06-12 | 1992-12-17 | Mitsubishi Electric Corp | Digital signal processing semiconductor integrated circuit |
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