JPS5387A - Automatic design system - Google Patents
Automatic design systemInfo
- Publication number
- JPS5387A JPS5387A JP7462776A JP7462776A JPS5387A JP S5387 A JPS5387 A JP S5387A JP 7462776 A JP7462776 A JP 7462776A JP 7462776 A JP7462776 A JP 7462776A JP S5387 A JPS5387 A JP S5387A
- Authority
- JP
- Japan
- Prior art keywords
- design system
- automatic design
- wiring
- pattern
- area
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
PURPOSE: To decrease the number of the wiring at the through area by constituting the wiring pattern of the logical circuit block in such a way that the pattern pierces through in the longitudinal direction of the block. Thus, the semiconductor chip area can be decreased.
COPYRIGHT: (C)1978,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7462776A JPS5387A (en) | 1976-06-24 | 1976-06-24 | Automatic design system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7462776A JPS5387A (en) | 1976-06-24 | 1976-06-24 | Automatic design system |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP24303387A Division JPS6399545A (en) | 1987-09-28 | 1987-09-28 | Integrated circuit using building block system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5387A true JPS5387A (en) | 1978-01-05 |
JPS623584B2 JPS623584B2 (en) | 1987-01-26 |
Family
ID=13552610
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7462776A Granted JPS5387A (en) | 1976-06-24 | 1976-06-24 | Automatic design system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5387A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5715440A (en) * | 1980-07-03 | 1982-01-26 | Nec Corp | Semiconductor device |
US4549041A (en) * | 1983-11-07 | 1985-10-22 | Fujikura Ltd. | Flame-retardant cross-linked composition and flame-retardant cable using same |
EP0182222A2 (en) * | 1984-11-09 | 1986-05-28 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit device constructed by polycell technique |
US5026568A (en) * | 1988-06-22 | 1991-06-25 | Lotte Company Limited | Soybean snack and a process for producing it |
US9516931B2 (en) | 2012-05-22 | 2016-12-13 | Effe Effe Immobiliare S.R.L. | Customizable ornament for jewelry or costume jewelry products |
-
1976
- 1976-06-24 JP JP7462776A patent/JPS5387A/en active Granted
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5715440A (en) * | 1980-07-03 | 1982-01-26 | Nec Corp | Semiconductor device |
JPH0127580B2 (en) * | 1980-07-03 | 1989-05-30 | Nippon Electric Co | |
US4549041A (en) * | 1983-11-07 | 1985-10-22 | Fujikura Ltd. | Flame-retardant cross-linked composition and flame-retardant cable using same |
EP0182222A2 (en) * | 1984-11-09 | 1986-05-28 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit device constructed by polycell technique |
US4716452A (en) * | 1984-11-09 | 1987-12-29 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit device constructed by polycell technique |
US5026568A (en) * | 1988-06-22 | 1991-06-25 | Lotte Company Limited | Soybean snack and a process for producing it |
US9516931B2 (en) | 2012-05-22 | 2016-12-13 | Effe Effe Immobiliare S.R.L. | Customizable ornament for jewelry or costume jewelry products |
Also Published As
Publication number | Publication date |
---|---|
JPS623584B2 (en) | 1987-01-26 |
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