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JPS5369546A - Method and apparatus for memory unit test - Google Patents

Method and apparatus for memory unit test

Info

Publication number
JPS5369546A
JPS5369546A JP14473376A JP14473376A JPS5369546A JP S5369546 A JPS5369546 A JP S5369546A JP 14473376 A JP14473376 A JP 14473376A JP 14473376 A JP14473376 A JP 14473376A JP S5369546 A JPS5369546 A JP S5369546A
Authority
JP
Japan
Prior art keywords
memory unit
unit test
tested
unit
combining
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14473376A
Other languages
Japanese (ja)
Inventor
Toshio Karino
Masaki Ogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14473376A priority Critical patent/JPS5369546A/en
Publication of JPS5369546A publication Critical patent/JPS5369546A/en
Pending legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

PURPOSE: At the memory unit which operates by combining a defective memory unit, a complete block is tested and the unit is turned OFF by a selecting signal, so that it will be tested whether the desired output can be obtained or not.
COPYRIGHT: (C)1978,JPO&Japio
JP14473376A 1976-12-03 1976-12-03 Method and apparatus for memory unit test Pending JPS5369546A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14473376A JPS5369546A (en) 1976-12-03 1976-12-03 Method and apparatus for memory unit test

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14473376A JPS5369546A (en) 1976-12-03 1976-12-03 Method and apparatus for memory unit test

Publications (1)

Publication Number Publication Date
JPS5369546A true JPS5369546A (en) 1978-06-21

Family

ID=15369062

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14473376A Pending JPS5369546A (en) 1976-12-03 1976-12-03 Method and apparatus for memory unit test

Country Status (1)

Country Link
JP (1) JPS5369546A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5558896A (en) * 1978-10-24 1980-05-01 Fujitsu Ltd Analyzer for memory defect
JPS5562598A (en) * 1978-10-31 1980-05-12 Nec Corp Memory check unit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5558896A (en) * 1978-10-24 1980-05-01 Fujitsu Ltd Analyzer for memory defect
JPS5562598A (en) * 1978-10-31 1980-05-12 Nec Corp Memory check unit

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