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JPS5368047A - Input signal buffer circuit - Google Patents

Input signal buffer circuit

Info

Publication number
JPS5368047A
JPS5368047A JP14314176A JP14314176A JPS5368047A JP S5368047 A JPS5368047 A JP S5368047A JP 14314176 A JP14314176 A JP 14314176A JP 14314176 A JP14314176 A JP 14314176A JP S5368047 A JPS5368047 A JP S5368047A
Authority
JP
Japan
Prior art keywords
input signal
buffer circuit
signal buffer
retioless
actuating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14314176A
Other languages
Japanese (ja)
Inventor
Isao Ogura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP14314176A priority Critical patent/JPS5368047A/en
Publication of JPS5368047A publication Critical patent/JPS5368047A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356017—Bistable circuits using additional transistors in the input circuit
    • H03K3/356052—Bistable circuits using additional transistors in the input circuit using pass gates
    • H03K3/35606—Bistable circuits using additional transistors in the input circuit using pass gates with synchronous operation

Landscapes

  • Logic Circuits (AREA)

Abstract

PURPOSE:To obtain an input signal buffer circuit which reduces the power consumption as well as the component elements, by actuating the FF using MOS transistor Tr in a retioless state.
JP14314176A 1976-11-29 1976-11-29 Input signal buffer circuit Pending JPS5368047A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14314176A JPS5368047A (en) 1976-11-29 1976-11-29 Input signal buffer circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14314176A JPS5368047A (en) 1976-11-29 1976-11-29 Input signal buffer circuit

Publications (1)

Publication Number Publication Date
JPS5368047A true JPS5368047A (en) 1978-06-17

Family

ID=15331876

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14314176A Pending JPS5368047A (en) 1976-11-29 1976-11-29 Input signal buffer circuit

Country Status (1)

Country Link
JP (1) JPS5368047A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4561702A (en) * 1984-05-09 1985-12-31 Texas Instruments Incorporated CMOS Address buffer circuit
JP2002290227A (en) * 2001-03-26 2002-10-04 Nec Corp Input circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4561702A (en) * 1984-05-09 1985-12-31 Texas Instruments Incorporated CMOS Address buffer circuit
JP2002290227A (en) * 2001-03-26 2002-10-04 Nec Corp Input circuit

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