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JPS5238885A - Method for production of semiconductor device - Google Patents

Method for production of semiconductor device

Info

Publication number
JPS5238885A
JPS5238885A JP11530975A JP11530975A JPS5238885A JP S5238885 A JPS5238885 A JP S5238885A JP 11530975 A JP11530975 A JP 11530975A JP 11530975 A JP11530975 A JP 11530975A JP S5238885 A JPS5238885 A JP S5238885A
Authority
JP
Japan
Prior art keywords
production
semiconductor device
pellet
perfect
welding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11530975A
Other languages
Japanese (ja)
Inventor
Yoshihiko Muraki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP11530975A priority Critical patent/JPS5238885A/en
Publication of JPS5238885A publication Critical patent/JPS5238885A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3205—Shape
    • H01L2224/32057—Shape in side view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE: To beforehand form projections on a metal substrate thereby making solder-welding of pellet perfect and preventing deterioration in thermal conductivity.
COPYRIGHT: (C)1977,JPO&Japio
JP11530975A 1975-09-22 1975-09-22 Method for production of semiconductor device Pending JPS5238885A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11530975A JPS5238885A (en) 1975-09-22 1975-09-22 Method for production of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11530975A JPS5238885A (en) 1975-09-22 1975-09-22 Method for production of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5238885A true JPS5238885A (en) 1977-03-25

Family

ID=14659424

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11530975A Pending JPS5238885A (en) 1975-09-22 1975-09-22 Method for production of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5238885A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4546409A (en) * 1982-04-02 1985-10-08 Mitsubishi Denki Kabushiki Kaisha Device for cooling semiconductor elements
US4589010A (en) * 1981-04-28 1986-05-13 Matsushita Electronics Corporation Method for manufacturing a plastic encapsulated semiconductor device and a lead frame therefor
US4807022A (en) * 1987-05-01 1989-02-21 Raytheon Company Simultaneous formation of via hole and tub structures for GaAs monolithic microwave integrated circuits
US5262674A (en) * 1991-02-04 1993-11-16 Motorola, Inc. Chip carrier for an integrated circuit assembly
US5514913A (en) * 1991-12-05 1996-05-07 Consorzio Per La Ricerca Sulla Microelettronica Net Mezzogiorno Resin-encapsulated semiconductor device having improved adhesion
US6288451B1 (en) * 1998-06-24 2001-09-11 Vanguard International Semiconductor Corporation Flip-chip package utilizing a printed circuit board having a roughened surface for increasing bond strength
JP2010040881A (en) * 2008-08-07 2010-02-18 Fuji Electric Systems Co Ltd Positioning tool and method for manufacturing semiconductor device
JP2014154756A (en) * 2013-02-12 2014-08-25 Calsonic Kansei Corp Conductive member and temporary joining method of sheet

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4922866A (en) * 1972-06-20 1974-02-28

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4922866A (en) * 1972-06-20 1974-02-28

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4589010A (en) * 1981-04-28 1986-05-13 Matsushita Electronics Corporation Method for manufacturing a plastic encapsulated semiconductor device and a lead frame therefor
US4546409A (en) * 1982-04-02 1985-10-08 Mitsubishi Denki Kabushiki Kaisha Device for cooling semiconductor elements
US4807022A (en) * 1987-05-01 1989-02-21 Raytheon Company Simultaneous formation of via hole and tub structures for GaAs monolithic microwave integrated circuits
US5262674A (en) * 1991-02-04 1993-11-16 Motorola, Inc. Chip carrier for an integrated circuit assembly
US5514913A (en) * 1991-12-05 1996-05-07 Consorzio Per La Ricerca Sulla Microelettronica Net Mezzogiorno Resin-encapsulated semiconductor device having improved adhesion
US5766985A (en) * 1991-12-05 1998-06-16 Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno Process for encapsulating a semiconductor device having a heat sink
US6288451B1 (en) * 1998-06-24 2001-09-11 Vanguard International Semiconductor Corporation Flip-chip package utilizing a printed circuit board having a roughened surface for increasing bond strength
JP2010040881A (en) * 2008-08-07 2010-02-18 Fuji Electric Systems Co Ltd Positioning tool and method for manufacturing semiconductor device
JP2014154756A (en) * 2013-02-12 2014-08-25 Calsonic Kansei Corp Conductive member and temporary joining method of sheet

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